KR970052731A - A method of oblique etching the conductive layer of the semiconductor device - Google Patents
A method of oblique etching the conductive layer of the semiconductor device Download PDFInfo
- Publication number
- KR970052731A KR970052731A KR1019950050981A KR19950050981A KR970052731A KR 970052731 A KR970052731 A KR 970052731A KR 1019950050981 A KR1019950050981 A KR 1019950050981A KR 19950050981 A KR19950050981 A KR 19950050981A KR 970052731 A KR970052731 A KR 970052731A
- Authority
- KR
- South Korea
- Prior art keywords
- etching
- conductive layer
- tungsten silicide
- film
- photoresist pattern
- Prior art date
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Drying Of Semiconductors (AREA)
Abstract
본 발명은 폴리실리콘막/텅스텐 실리사이드막으로 이루어진 2중 구조의 전도층을 경사식각하는 방법에 있어서, 상기 텅스텐 실리사이드막 상에 감광막 패턴을 형성하는 단계; 상기 감광막 패턴을 식각 마스크로하여 상기 텅스텐 실리사이드막을 건식식각하되 식각시 다량의 폴리머가 발생되도록 식각하는 단계; 폴리머 형성없이 상기 폴리실리콘막을 수직하게 식각하는 단계; 및 전체구조 상부에 도포하는 단계를 포함하여 이루어지는 것을 특징으로 하는 폴리실리콘막/텅스텐 실리사이드막으로 이루어진 2중 구조의 전도층을 식각하는 방법에 관한 것이다.According to an aspect of the present invention, there is provided a method of etching an electrically conductive layer having a double structure of a polysilicon film / tungsten silicide film, the method comprising: forming a photoresist pattern on the tungsten silicide film; Dry etching the tungsten silicide layer using the photoresist pattern as an etching mask, and etching a large amount of polymer during etching; Vertically etching the polysilicon film without forming a polymer; And it relates to a method for etching a conductive layer of a double structure consisting of a polysilicon film / tungsten silicide film comprising the step of applying on top of the entire structure.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도 내지 제5도는 본 발명에 따른 전도층의 경사식각을 설명하는 단면도.2 to 5 are cross-sectional views illustrating the inclined etching of the conductive layer according to the present invention.
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950050981A KR100194786B1 (en) | 1995-12-16 | 1995-12-16 | Semiconductor device manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950050981A KR100194786B1 (en) | 1995-12-16 | 1995-12-16 | Semiconductor device manufacturing method |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970052731A true KR970052731A (en) | 1997-07-29 |
KR100194786B1 KR100194786B1 (en) | 1999-06-15 |
Family
ID=66595122
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950050981A KR100194786B1 (en) | 1995-12-16 | 1995-12-16 | Semiconductor device manufacturing method |
Country Status (1)
Country | Link |
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KR (1) | KR100194786B1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100435785B1 (en) * | 2001-12-22 | 2004-06-12 | 동부전자 주식회사 | Fabricating method of metal wire in semiconductor device |
-
1995
- 1995-12-16 KR KR1019950050981A patent/KR100194786B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
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KR100194786B1 (en) | 1999-06-15 |
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