KR970019084A - Programmable counter - Google Patents
Programmable counter Download PDFInfo
- Publication number
- KR970019084A KR970019084A KR1019950030466A KR19950030466A KR970019084A KR 970019084 A KR970019084 A KR 970019084A KR 1019950030466 A KR1019950030466 A KR 1019950030466A KR 19950030466 A KR19950030466 A KR 19950030466A KR 970019084 A KR970019084 A KR 970019084A
- Authority
- KR
- South Korea
- Prior art keywords
- gate
- counting
- output
- reset
- logic
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
- H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/38—Starting, stopping or resetting the counter
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- Saccharide Compounds (AREA)
- Pulse Circuits (AREA)
Abstract
본 발명은 입력되는 조건에 따라 동작범위를 결정하여 원하는 값을 카운트할 수 있는 프로그램 가능한 카운터에 관한 것이다.The present invention relates to a programmable counter capable of counting a desired value by determining an operating range according to an input condition.
본 발명의 프로그램 가능한 카운터는 인가되는 클럭신호에 따라 소정의 값을 카운트하는 4개의 연속적으로 연결된 제1 내지 제4T필립플롭으로 구성된 카운팅수단과, 사용자에 의해 정해진 카운팅값과 카운팅부의 카운팅 값을 비교 출력하기 위한 익스클루시브 오아 게이트로 구성된 비교수단과, 상기 비교수단의 출력을 입력하여 논리 노아하는 제1노아 게이트와, 제1노아 게이트의 출력을 입력으로 하고 인버터를 통해 반전된 클럭신호가 클럭 단자에 인가되는 D 플립플롭와, D플립플롭의 출력과 인버터를 통해 반전된 클럭신호를 입력하여 논리 앤드하는 앤드 게이터와, 앤드 게이트의 출력과 리세트신호를 입력하여 논리 노아하고 논리 노아된 값을 상기의 카운팅수단에 리세트신호로서 출력하기 위한 제2노아 게이트로 구성되어 비교수단의 출력신호에 따라 카운팅부의 제1내지 제4T플립플롭을 리세트시켜 주기 위한 리세트수단으로 이루어졌다.The programmable counter of the present invention compares a counting means composed of four consecutively connected first through fourth T-flop flops which count a predetermined value according to an applied clock signal, and a counting value determined by a user and a counting value of the counting part. A comparator comprising an exclusive ora gate for output, a first noah gate for logic input by inputting the output of the comparator, and a clock signal inverted through an inverter with the output of the first noah gate as a clock D flip-flop applied to the terminal, the output of the D flip-flop and the inverted clock signal through the inverter and the logic gate and input gate and the gate and the output signal of the reset gate and reset the logic A second noar gate for outputting the counting means as a reset signal to the counting means; According to the present invention, the first to fourth T flip flops of the counting unit are provided as reset means for resetting.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제 1 도는 본 발명에 의한 바람직한 실시예에 따른 프로그램 가능한 카운터의 회로구성을 나타낸 회로도,1 is a circuit diagram showing a circuit configuration of a programmable counter according to a preferred embodiment of the present invention;
제 2 도는 제 2 도의 동작을 설명하기 위한 타이밍도.2 is a timing diagram for explaining the operation of FIG.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950030466A KR0153112B1 (en) | 1995-09-18 | 1995-09-18 | Counter enable to program |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950030466A KR0153112B1 (en) | 1995-09-18 | 1995-09-18 | Counter enable to program |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970019084A true KR970019084A (en) | 1997-04-30 |
KR0153112B1 KR0153112B1 (en) | 1998-12-15 |
Family
ID=19427089
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950030466A KR0153112B1 (en) | 1995-09-18 | 1995-09-18 | Counter enable to program |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0153112B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100429554B1 (en) * | 2002-04-19 | 2004-05-03 | 주식회사 하이닉스반도체 | Programmable counter circuit |
-
1995
- 1995-09-18 KR KR1019950030466A patent/KR0153112B1/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100429554B1 (en) * | 2002-04-19 | 2004-05-03 | 주식회사 하이닉스반도체 | Programmable counter circuit |
Also Published As
Publication number | Publication date |
---|---|
KR0153112B1 (en) | 1998-12-15 |
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