KR960035968A - Contact formation method of semiconductor device - Google Patents

Contact formation method of semiconductor device Download PDF

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Publication number
KR960035968A
KR960035968A KR1019950004449A KR19950004449A KR960035968A KR 960035968 A KR960035968 A KR 960035968A KR 1019950004449 A KR1019950004449 A KR 1019950004449A KR 19950004449 A KR19950004449 A KR 19950004449A KR 960035968 A KR960035968 A KR 960035968A
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KR
South Korea
Prior art keywords
semiconductor device
forming
metal layer
contact
etched
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Application number
KR1019950004449A
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Korean (ko)
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KR0172254B1 (en
Inventor
조경수
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950004449A priority Critical patent/KR0172254B1/en
Publication of KR960035968A publication Critical patent/KR960035968A/en
Application granted granted Critical
Publication of KR0172254B1 publication Critical patent/KR0172254B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs

Abstract

본 발명은 반도체 소자의 비아 홀(via hole) 형성 방법에 관한 것으로 보다 자세하게는 다층 금속 배선 공정에서의 바아 홀을 형성하기 위한 과도 식각시 하부의 금속 배선층이 식각되는 것을 방지할 수 있는 반도체 소자의 비아 홀 형성 방법에 관한 것으로 종래의 다층 금속 배선 공정에서 비아 홀을 형성하는데 있어서, 산화막을 금속층이 노출될때까지 과도 식각을 이룰 경우 금속층의 일부가 식각되어 박막의 금속층의 단선 유발 및 내구성이 저하되는 문제점을 개선하기 위하여 하부의 금속층의 소정영역에 불순물 이온을 주입하여 금속층이 식각되는 것을 방지함으로써, 과도식각시 하부의 금속층의 단선을 방지할 수 있고, 내구성이 향상되어 소자의 신뢰성을 확보할 수 있다.The present invention relates to a method of forming a via hole of a semiconductor device, and more particularly, to a semiconductor device capable of preventing the underlying metal wiring layer from being etched during transient etching for forming a bar hole in a multilayer metal wiring process. The present invention relates to a via hole forming method. In the case of forming a via hole in a conventional multi-layer metal wiring process, when the oxide film is excessively etched until the metal layer is exposed, a part of the metal layer is etched to cause disconnection of the metal layer of the thin film and durability is reduced. In order to improve the problem, by implanting impurity ions into a predetermined region of the lower metal layer to prevent the metal layer from being etched, disconnection of the lower metal layer can be prevented during excessive etching, and durability can be improved to ensure device reliability. have.

Description

반도체 소자의 콘택 형성방법Contact formation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제7도는 본 발명의 일실시예의 다층 금속 배선 공정의 비아 홀 제조 방법을 설명하기 위한 각 제조공정에 있어서의 반도체 소자의 요부 단면도.7 is a sectional view of principal parts of the semiconductor device in each manufacturing step for explaining the via hole manufacturing method in the multilayer metal wiring step according to the embodiment of the present invention.

Claims (7)

금속 도전체 상부에 확산 방지막을 형성하고,콘택 홀 내지는 비어 홀을 형성한 후 금속 배선을 이루는 반도체 소자의 콘택 형성방법에 있어서, 상기 금속 도전체의 소정 부위에 감광막 패턴을 형성하고 불순물 이온을 주입하는 것을 특징으로 하는 반도체 소자의 콘택 형성방법.In the method for forming a contact of a semiconductor device in which a diffusion barrier layer is formed on a metal conductor, contact holes or via holes are formed, and metal wiring is formed, a photoresist pattern is formed on a predetermined portion of the metal conductor and impurity ions are implanted. A contact forming method for a semiconductor device, characterized in that. 제1항에 있어서, 상기 분순물 이온이 주입된 영역이 비아 홀의 크기보다 큰 것을 특징으로 하는 반도체 소자의 콘택 형성방법.The method of claim 1, wherein the region into which the impurities are implanted is larger than the size of the via hole. 제1항에 있어서, 상기 금속 도전체는 알루미늄 또는 알루미늄 합금막인 것을 특징으로 하는 반도체 소자의 콘택 형성방법.The method of claim 1, wherein the metal conductor is an aluminum or aluminum alloy film. 제1항 니지 제3항 중 어느 한 항에 있어서, 상기 불순물 이온을 실리콘 원자인 것을 특징으로 하는 반도체 소자의 콘택 형성방법.The method for forming a contact of a semiconductor device according to claim 1, wherein the impurity ions are silicon atoms. 제1항 내지 제3항중 어느 한 항에 있어서, 상기 불순물 이온을 탄탈륨인 것을 특징으로 하는 반도체소자의 콘택 형성방법.The method for forming a contact of a semiconductor device according to any one of claims 1 to 3, wherein the impurity ions are tantalum. 제1항 내지 제3항중 어느 한 항에 있어서, 상기 확산 방지막은 알루이늄및 구리보다 각각 열팽창 계수가 작은 물질인 것을 특징으로 하는 반도체 소자의 콘택 형성방법.The method according to any one of claims 1 to 3, wherein the diffusion barrier is made of a material having a smaller coefficient of thermal expansion than aluminum and copper. 제6항에 있어서, 상기 확산 방지막은 티타늄 질화막인 것을 특징으로 하는 반도체 소자의 콘택 형성방법.7. The method of claim 6, wherein the diffusion barrier is a titanium nitride film. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950004449A 1995-03-04 1995-03-04 Method of forming metal wire of semiconductor device KR0172254B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950004449A KR0172254B1 (en) 1995-03-04 1995-03-04 Method of forming metal wire of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950004449A KR0172254B1 (en) 1995-03-04 1995-03-04 Method of forming metal wire of semiconductor device

Publications (2)

Publication Number Publication Date
KR960035968A true KR960035968A (en) 1996-10-28
KR0172254B1 KR0172254B1 (en) 1999-03-30

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KR1019950004449A KR0172254B1 (en) 1995-03-04 1995-03-04 Method of forming metal wire of semiconductor device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100752189B1 (en) * 2006-08-07 2007-08-27 동부일렉트로닉스 주식회사 Method of fabricating semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990027836A (en) * 1997-09-30 1999-04-15 윤종용 Via hole formation method of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100752189B1 (en) * 2006-08-07 2007-08-27 동부일렉트로닉스 주식회사 Method of fabricating semiconductor device

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Publication number Publication date
KR0172254B1 (en) 1999-03-30

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