KR960026597A - Device Separation Method of Semiconductor Device - Google Patents
Device Separation Method of Semiconductor Device Download PDFInfo
- Publication number
- KR960026597A KR960026597A KR1019940039098A KR19940039098A KR960026597A KR 960026597 A KR960026597 A KR 960026597A KR 1019940039098 A KR1019940039098 A KR 1019940039098A KR 19940039098 A KR19940039098 A KR 19940039098A KR 960026597 A KR960026597 A KR 960026597A
- Authority
- KR
- South Korea
- Prior art keywords
- oxide film
- thermal oxide
- trench
- forming
- silicon substrate
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract 3
- 238000000926 separation method Methods 0.000 title claims 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract 11
- 229910052710 silicon Inorganic materials 0.000 claims abstract 11
- 239000010703 silicon Substances 0.000 claims abstract 11
- 238000002955 isolation Methods 0.000 claims abstract 9
- 239000000758 substrate Substances 0.000 claims abstract 8
- 150000004767 nitrides Chemical class 0.000 claims abstract 7
- 239000013078 crystal Substances 0.000 claims abstract 3
- 238000000034 method Methods 0.000 claims 10
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims 2
- 238000005530 etching Methods 0.000 claims 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims 1
- 230000004888 barrier function Effects 0.000 claims 1
- 238000009835 boiling Methods 0.000 claims 1
- 238000000151 deposition Methods 0.000 claims 1
- 239000007789 gas Substances 0.000 claims 1
- 229910000040 hydrogen fluoride Inorganic materials 0.000 claims 1
- 238000000206 photolithography Methods 0.000 claims 1
- 239000012495 reaction gas Substances 0.000 claims 1
- 238000001039 wet etching Methods 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76294—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
Abstract
본 발명은 반도체 장치의 소자 분리방법에 관한 것으로, 특히 소자분리영역을 최소화 하여 활성영역을 충분히 확보할 수 있는 소자 분리방법으로, 이와 같은 본 발명은 실리콘 기판상에 제1열산화막과 질화막을 증착한 다음 소정의 트렌치를 형성하여 소자 분리 영역을 구축하는 단계, 상기 소자 분리 영역의 트렌치에 제2열산화막을 형성하는 단계, 상기 제2열산화막을 비등성 식각하여 트렌치 저면의 실리콘 기판을 노출시키는 단계, 상기 노출된 실리콘 기판을 성장시켜 트렌치에 단결정 에피택셜 실리콘층을 형성하는 단계, 및 상기 제1열산화막과 질화막을 제거하여 소정의 필드 산화막을 형성하는 단계로 이루어진다.The present invention relates to a device isolation method of a semiconductor device, and more particularly, to a device isolation method capable of sufficiently securing an active region by minimizing device isolation regions. The present invention is to deposit a first thermal oxide film and a nitride film on a silicon substrate. Forming a device isolation region by forming a predetermined trench; forming a second thermal oxide film in the trench of the device isolation region; Forming a single crystal epitaxial silicon layer in the trench by growing the exposed silicon substrate; and forming a predetermined field oxide layer by removing the first thermal oxide layer and the nitride layer.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도의 (가)(나)(다)(라)(마)는 본 발명의 소자 분리방법을 설명하기 위한 공정 수순도.(A) (b) (c) (d) (e) of FIG.
Claims (12)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940039098A KR0179555B1 (en) | 1994-12-30 | 1994-12-30 | Isolation method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940039098A KR0179555B1 (en) | 1994-12-30 | 1994-12-30 | Isolation method of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960026597A true KR960026597A (en) | 1996-07-22 |
KR0179555B1 KR0179555B1 (en) | 1999-04-15 |
Family
ID=19405279
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940039098A KR0179555B1 (en) | 1994-12-30 | 1994-12-30 | Isolation method of semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0179555B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100672760B1 (en) * | 2000-08-18 | 2007-01-22 | 주식회사 하이닉스반도체 | A method of forming trench isolation layer in semiconductor device |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100639198B1 (en) * | 2000-06-01 | 2006-10-31 | 주식회사 하이닉스반도체 | Method for forming isolation layer in semiconductor device |
KR100842487B1 (en) * | 2005-12-28 | 2008-07-01 | 동부일렉트로닉스 주식회사 | Method for separating region of semiconductor device |
-
1994
- 1994-12-30 KR KR1019940039098A patent/KR0179555B1/en active IP Right Grant
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100672760B1 (en) * | 2000-08-18 | 2007-01-22 | 주식회사 하이닉스반도체 | A method of forming trench isolation layer in semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
KR0179555B1 (en) | 1999-04-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS6340337A (en) | Method of isolating integrated circuit | |
KR960043106A (en) | Method of forming insulating film in semiconductor device | |
KR970060447A (en) | Isolation method of semiconductor device | |
KR870004523A (en) | Method of forming dielectric embedded device isolation groove in semiconductor device | |
KR880014691A (en) | Manufacturing Method of Semiconductor Device | |
US6194286B1 (en) | Method of etching thermally grown oxide substantially selectively relative to deposited oxide | |
US5061653A (en) | Trench isolation process | |
KR960026597A (en) | Device Separation Method of Semiconductor Device | |
KR100209714B1 (en) | Isolation film of semiconductor device and method for forming the same | |
JP3680521B2 (en) | Manufacturing method of semiconductor device | |
KR960026608A (en) | Field oxide film formation method of semiconductor device | |
KR960026729A (en) | Device Separating Method of Semiconductor Device | |
KR980006083A (en) | Method for forming an element isolation film of a semiconductor element | |
KR950029849A (en) | Device Separator Formation Method | |
KR960026727A (en) | Manufacturing method of high frequency semiconductor device | |
JPS595644A (en) | Manufacture of semiconductor device | |
KR970053437A (en) | Device isolation film formation method using trench | |
KR960026595A (en) | Device Separation Method of Semiconductor Device | |
KR100396792B1 (en) | Method for chemical mechanical polishing isolation region of semiconductor device | |
KR960026592A (en) | Device Separation Method of Semiconductor Device | |
KR970054111A (en) | Manufacturing method of semiconductor device | |
JPH0258848A (en) | Manufacture of semiconductor device | |
KR920007149A (en) | How to remove bird beak shape in semiconductor device manufacturing process | |
KR970003800A (en) | Device Separating Method of Semiconductor Device | |
KR970053423A (en) | Method for manufacturing device isolation insulating film of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20121022 Year of fee payment: 15 |
|
FPAY | Annual fee payment |
Payment date: 20131017 Year of fee payment: 16 |