KR960005837A - 반도체 소자의 산화막 형성방법 - Google Patents

반도체 소자의 산화막 형성방법 Download PDF

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Publication number
KR960005837A
KR960005837A KR1019940016085A KR19940016085A KR960005837A KR 960005837 A KR960005837 A KR 960005837A KR 1019940016085 A KR1019940016085 A KR 1019940016085A KR 19940016085 A KR19940016085 A KR 19940016085A KR 960005837 A KR960005837 A KR 960005837A
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KR
South Korea
Prior art keywords
oxide film
semiconductor device
tube
forming
dce
Prior art date
Application number
KR1019940016085A
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English (en)
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KR0125310B1 (ko
Inventor
엄금용
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940016085A priority Critical patent/KR0125310B1/ko
Publication of KR960005837A publication Critical patent/KR960005837A/ko
Application granted granted Critical
Publication of KR0125310B1 publication Critical patent/KR0125310B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

본 발명은 반도체 소자의 산화막 형성방법에 관한 것으로, 튜브내에서 산화막 성장공정전에 정화공정을 실시하고 산화막 성장공정후에 표면 처리공저을 실시하여 튜브내의 소디움 이온(sodium ion) 제거와 튜브내부를 패시베이션(passivation)하는 효과를 증대시켜 산화막의 질을 향상시킬 수 있는 반도체 소자의 산화막 형성방법에 관한 것이다.

Description

반도체 소자의 산화막 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음

Claims (2)

  1. 산화막을 형성할 웨이퍼를 소정의 튜브에 장착한 후 산화공정을 실시하고, 온도를 상승시킨 상태에서 열처리하고, 이후 웨이퍼를 꺼냄으로써 산화막 형성을 완료하는 반도체 소자의 산화막 형성방법에 있어서, 상기 산화공정을 실시하기 전에 O2, DCE를 주입하여 튜브내부를 정화하고, 상기 웨이퍼를 꺼내기 전에 O2N2및 DCE를 주입하여 튜브 표면을 처리하는 공정을 포하하는 것을 특징으로 하는 반도체 소자의 산화막 형성방법.
  2. 제1항에 있어서, 상기 정화공정은 O2/DCE=3∼8/0.3∼0.6SLPM 정도로 주입하고, 상기 표면처리공정은 O2/N2/DCE=3∼8/25∼30/0.3∼0.6SLPM 정도로 주입하는 것을 특징으로 하는 반도체 소자의 산화막 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940016085A 1994-07-06 1994-07-06 반도체 소자의 산화막 형성방법 KR0125310B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940016085A KR0125310B1 (ko) 1994-07-06 1994-07-06 반도체 소자의 산화막 형성방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940016085A KR0125310B1 (ko) 1994-07-06 1994-07-06 반도체 소자의 산화막 형성방법

Publications (2)

Publication Number Publication Date
KR960005837A true KR960005837A (ko) 1996-02-23
KR0125310B1 KR0125310B1 (ko) 1997-12-10

Family

ID=19387330

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940016085A KR0125310B1 (ko) 1994-07-06 1994-07-06 반도체 소자의 산화막 형성방법

Country Status (1)

Country Link
KR (1) KR0125310B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100250234B1 (ko) * 1997-08-09 2000-04-01 밍 루 차륜잠김 방지장치의 전자제어 회로

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106548937B (zh) * 2015-09-18 2019-06-25 上海先进半导体制造股份有限公司 退火的工艺方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100250234B1 (ko) * 1997-08-09 2000-04-01 밍 루 차륜잠김 방지장치의 전자제어 회로

Also Published As

Publication number Publication date
KR0125310B1 (ko) 1997-12-10

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