KR960002695A - 반도체소자의 모스펫 형성방법 - Google Patents

반도체소자의 모스펫 형성방법 Download PDF

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Publication number
KR960002695A
KR960002695A KR1019940014253A KR19940014253A KR960002695A KR 960002695 A KR960002695 A KR 960002695A KR 1019940014253 A KR1019940014253 A KR 1019940014253A KR 19940014253 A KR19940014253 A KR 19940014253A KR 960002695 A KR960002695 A KR 960002695A
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KR
South Korea
Prior art keywords
gate electrode
forming
oxide
semiconductor device
mosfet
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Application number
KR1019940014253A
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English (en)
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KR100337199B1 (ko
Inventor
윤경일
양예석
백동원
김세정
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority to KR1019940014253A priority Critical patent/KR100337199B1/ko
Publication of KR960002695A publication Critical patent/KR960002695A/ko
Application granted granted Critical
Publication of KR100337199B1 publication Critical patent/KR100337199B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Ceramic Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

본 발명은 반도체소자의 모스펫 형성방법에 관한 것으로, 모스펫 형성시 활성영역과 비활성영역의 경계부에 산화막 스페이서 형성시 발생되는 결함으로 인하여 야기되는 문제점을 해결하기 위하여, 상기 경계부에 고농도의 불순물 이온을 주입하지 않음으로써 디스로케이션 루우프로 인하여 발생되는 접합누설을 방지하여 반도체소자의 신뢰성을 향상시키는 기술이다.

Description

반도체소자의 모스펫 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2A도 및 제2B도는 본 발명의 실시예로서 반도체소자의 모스펫 형성공정을 도시한 단면도

Claims (2)

  1. 반도체소자의 모스펫 형성방법에 있어서, 반도체기판 상부에 게이트산화막 및 게이트 전극용 다결정실리콘막을 일정두께 증착하는 공정과, 마스크 공정으로 상기 게이트전극용 다결정실리콘막과 게이트산화막을 순차적으로 식각하여 게이트전극과 게이트산화막패턴을 형성한 다음, 상기 게이트전극을 마스크로하여 상기 반도체기판 상부에 저농도의 불순물이온을 주입하는 공정과, 상기 게이트전극과 게이산화막패턴의 측벽에 산화막 스페이서를 형성하는 공정과, 별도의 마스크를 이용하여 상기 산화막 스페이시와 일정간격 떨어져 양측으로부터 바깥쪽의 활성영역에 고농도의 불순물이온을 주입하여 모스펫을 형성하는 공정을 포함하는 반도체소자의 모스펫 형성방법.
  2. 제1항에 있어서, 상기 별도의 마스크는 비활성영역과 활성영역의 경계면에 산화막 스페이서 형성시 결합이 발생되는 부분을 포함하여 상기 게이트전극과 산화막 스페이서를 도포하는 것을 특징으로 하는 반도체소자의 모스펫 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940014253A 1994-06-22 1994-06-22 반도체소자의모스펫형성방법 KR100337199B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940014253A KR100337199B1 (ko) 1994-06-22 1994-06-22 반도체소자의모스펫형성방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940014253A KR100337199B1 (ko) 1994-06-22 1994-06-22 반도체소자의모스펫형성방법

Publications (2)

Publication Number Publication Date
KR960002695A true KR960002695A (ko) 1996-01-26
KR100337199B1 KR100337199B1 (ko) 2002-10-30

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KR1019940014253A KR100337199B1 (ko) 1994-06-22 1994-06-22 반도체소자의모스펫형성방법

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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7307320B2 (en) 2005-11-07 2007-12-11 Samsung Electronics Co., Ltd. Differential mechanical stress-producing regions for integrated circuit field effect transistors

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6126263A (ja) * 1984-07-16 1986-02-05 Canon Inc 半導体装置の製造方法

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KR100337199B1 (ko) 2002-10-30

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