KR960002563A - 반도체소자의 콘택홀 형성방법 - Google Patents
반도체소자의 콘택홀 형성방법 Download PDFInfo
- Publication number
- KR960002563A KR960002563A KR1019940014254A KR19940014254A KR960002563A KR 960002563 A KR960002563 A KR 960002563A KR 1019940014254 A KR1019940014254 A KR 1019940014254A KR 19940014254 A KR19940014254 A KR 19940014254A KR 960002563 A KR960002563 A KR 960002563A
- Authority
- KR
- South Korea
- Prior art keywords
- forming
- word line
- etch
- film
- contact hole
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 9
- 239000004065 semiconductor Substances 0.000 title claims abstract description 8
- 230000015572 biosynthetic process Effects 0.000 title 1
- 230000004888 barrier function Effects 0.000 claims abstract 7
- 238000005530 etching Methods 0.000 claims abstract 4
- 229910000838 Al alloy Inorganic materials 0.000 claims abstract 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract 3
- 239000012153 distilled water Substances 0.000 claims abstract 2
- 239000000758 substrate Substances 0.000 claims abstract 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract 2
- 239000010410 layer Substances 0.000 claims 7
- 239000011229 interlayer Substances 0.000 claims 4
- 238000000151 deposition Methods 0.000 claims 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 2
- 229920005591 polysilicon Polymers 0.000 claims 2
- QOSATHPSBFQAML-UHFFFAOYSA-N hydrogen peroxide;hydrate Chemical compound O.OO QOSATHPSBFQAML-UHFFFAOYSA-N 0.000 claims 1
- 125000006850 spacer group Chemical group 0.000 claims 1
- 238000009279 wet oxidation reaction Methods 0.000 claims 1
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 abstract 2
- 239000000463 material Substances 0.000 abstract 2
- 230000010354 integration Effects 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
본 발명은 반도체소자의 콘택홀 형성방법에 관한 것으로, 종래 기술에서 식각장벽으로 사용되는 물질이 식각공정시 발생시키는 문제점을 해결하기 위하여, 알루미늄합금에 뜨거운 증류수나 과산화수소수에 습식산화시킨 알루미나를 식각장벽 물질로 사용함으로써 평탄화층에 대하여 높은 식각선택비를 갖도록하여 워드라인이나 반도체기판을 손상시키지 않고 자기 정렬적으로 콘택홀을 형성하여 반도체소자의 신뢰성 및 생산성을 향상시키고 반도체소자의 고집적화를 가능하게 하는 기술이다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도 내지 제3도는 본 발명의 실시예에 의한 반도체소자의 콘택홀 형성공정을 도시한 단면도.
Claims (4)
- 반도체소자의 콘택홀 형성방법에 있어서, 반도체기판 상부에 게이트산화막, 워드라인용 다결정실리콘막 및 층간절연막을 산화막을 순차적으로 증착하고 그 상부에 워드라인 마스크를 형성하는 공정과, 상기 워드라인 마스크를 이용하여 상기 층간절연막을 산화막, 워드라인용 다결정실리콘막을 순차적으로 식각하고 층간절연막과 워드라인을 형성한 다음, 상기 워드라인 마스크를 제거하고 상기 워드라인의 측벽에 산화막 스페이서를 형성하는 공정과, 전체구조상부에 일정두께의 식각장벽층을 증착하고 그 상부에 평탄화층과 콘택마스크를 순차적으로 형성하는 공정과, 상기 콘택마스크를 이용하고 상기 식각장벽층을 식각장벽으로하여 상기 평탄화층을 식각한 다음, 상기 식각장벽층을 이방성식각하되 과식각하여 상기 게이트산화막을 식각하고 상기 콘택마스크를 제거함으로써 콘택홀을 형성하는 공정을 포함하는 반도체소자의 콘택홀 형성방법.
- 제1항에 있어서, 상기 식각장벽층은 알루미나막으로 형성하는 것을 특징으로 하는 반도체소자의 콘택홀 형성방법.
- 제2항에 있어서, 상기 알루미나막은 알루미늄합금을 뜨거운 증류수나 과산화수소수로 습식산화시켜 형성하는 것을 특징으로 하는 반도체소자의 콘택홀 형성방법.
- 제3항에 있어서, 상기 알루미늄합금은 1000Å 미만의 두께로 형성하는 것을 특징으로 하는 반도체소자의 콘택홀 형성방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940014254A KR100305642B1 (ko) | 1994-06-22 | 1994-06-22 | 반도체소자의콘택홀형성방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940014254A KR100305642B1 (ko) | 1994-06-22 | 1994-06-22 | 반도체소자의콘택홀형성방법 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR960002563A true KR960002563A (ko) | 1996-01-26 |
| KR100305642B1 KR100305642B1 (ko) | 2001-11-30 |
Family
ID=37530161
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019940014254A KR100305642B1 (ko) | 1994-06-22 | 1994-06-22 | 반도체소자의콘택홀형성방법 |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR100305642B1 (ko) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100752196B1 (ko) | 2006-09-12 | 2007-08-27 | 동부일렉트로닉스 주식회사 | 모스 트랜지스터 |
-
1994
- 1994-06-22 KR KR1019940014254A patent/KR100305642B1/ko not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR100305642B1 (ko) | 2001-11-30 |
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