KR950028014A - Manufacturing method of thin film transistor for liquid crystal display device - Google Patents

Manufacturing method of thin film transistor for liquid crystal display device Download PDF

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KR950028014A
KR950028014A KR1019940005869A KR19940005869A KR950028014A KR 950028014 A KR950028014 A KR 950028014A KR 1019940005869 A KR1019940005869 A KR 1019940005869A KR 19940005869 A KR19940005869 A KR 19940005869A KR 950028014 A KR950028014 A KR 950028014A
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thin film
film transistor
active layer
driving circuit
pixel
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KR1019940005869A
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KR970006264B1 (en
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양명수
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이헌조
엘지전자 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1237—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a different composition, shape, layout or thickness of the gate insulator in different devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1229—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with different crystal properties within a device or between different devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)

Abstract

본 발명은 액정표시소자용 박막트랜지스터 제조방법에 관한 것으로, 게이트와 소오스간의 커패시턴스를 줄여 화소부의 플릭커현상을 없애고 구동회로부의 구동주파수를 높이며, 활성층과 게이트절연막 사이의 계면특성을 좋게 하기 위한 것이다. 본 발명은 구동회로부 영역 및 화소부 영역을 포함하는 투명절연기판위에 열화학기상증착법에 의해 비정질실리콘을 증착하는 공정과, 상기 비정질실리콘층을 패터닝하여 구동회로부 박막트랜지스터의 활성층패턴 및 화소부 박막트랜지스터의 활성층패턴을 형성하는 공정, 상기 구동회로부 박막트랜지스터의 활성층패턴을 레이저 어닐링에 의해 선택적으로 결정화하는 공정, 상기 구동회로부 박막트랜지스터의 활성층패턴을 포함한 구동회로부 영역 상부에만 선택적으로 산화막을 증착하여 제1게이트 절연막을 형성하는 공정, 상기 구동회로부 박막트랜지스터의 활성층패턴 및 화소부 박막트랜지스터의 활성층패턴을 수소화하여 구동회로부 박막트랜지스터의 다결정수소화실리콘 활성층 및 화소부 박막트랜지스터의 비정질수소화실리콘 활성층을 형성하는 공정, 상기 구동회로부 박막 트랜지스터의 활성층 및 화소부 박막트랜지스터 활성층을 포함한 기판 전면에 SiNx막을 증착하여 제2게이트절연막을 형성하는 공정, 상기 제2게이트절연막위에 산화막을 증착하여 제3게이트절연막을 형성하는 공정 상기 제3게이트절연막상의 상기 구동회로부 박막트랜지스터 활성층 및 화소부 박막트랜지스터 활성층 상부에 각각 게이트전극을 형성하는 공정, 상기 게이트전극을 마스크로 하여 상기 구동회로부 박막트랜지스터 활성층 및 화소부 박막트랜지스터 활성층에 불순물이온을 주입하여 소오스 및 드레인영역을 형성하는 공정을 포함하는 것을 특징으로 하는 액정표시소자용 박막트랜지스터 제조방법을 제공한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thin film transistor for a liquid crystal display device, and to reduce the capacitance between the gate and the source, to eliminate the flicker phenomenon of the pixel portion, to increase the driving frequency of the driving circuit portion, and to improve the interface characteristics between the active layer and the gate insulating film. The present invention provides a process of depositing amorphous silicon by thermochemical vapor deposition on a transparent insulating substrate including a driving circuit region and a pixel region, and patterning the amorphous silicon layer to form an active layer pattern of a thin film transistor and a thin film transistor of a pixel circuit. Forming an active layer pattern, selectively crystallizing an active layer pattern of the thin film transistor by laser annealing, and selectively depositing an oxide film only on an upper portion of the driving circuit portion including the active layer pattern of the thin film transistor of the driving circuit part to form a first gate Forming an insulating layer, hydrogenating the active layer pattern of the thin film transistor of the driving circuit unit and the active layer pattern of the thin film transistor of the pixel unit to form a polysilicon active layer of the thin film transistor of the driving circuit unit and the amorphous silicon active layer of the thin film transistor of the pixel unit thin film transistor Forming a second gate insulating film by depositing a SiNx film on an entire surface of the substrate including the active layer of the driving circuit thin film transistor and the pixel thin film transistor active layer; depositing an oxide film on the second gate insulating film to form a third gate insulating film Forming a gate electrode on the driving circuit portion thin film transistor active layer and the pixel portion thin film transistor active layer on the third gate insulating layer, and using the gate electrode as a mask, the driving circuit portion thin film transistor active layer and the pixel portion thin film transistor active layer It provides a method for manufacturing a thin film transistor for a liquid crystal display device comprising the step of implanting impurity ions into the source and drain regions.

Description

액정표시소자용 박막트랜지스터 제조방법Manufacturing method of thin film transistor for liquid crystal display device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 액정표시소자용 박막트랜지스터 제조방법을 도시한 공정순서도.2 is a process flowchart showing a method of manufacturing a thin film transistor for a liquid crystal display device according to the present invention.

Claims (3)

구동회로부 영역 및 화소부 영역을 포함하는 투명절연기판위에 열화학기상증착법에 의해 비정질실리콘을 증착하는 공정과, 상기 비정질실리콘층을 패터닝하여 구동회로부 박막트랜지스터의 활성층패턴 및 화소부 박막트랜지스터의 활성층패턴을 형성하는 공정, 상기 구동회로부 박막트랜지스터의 활성층패턴을 레이저 어닐링에 의해 선택적으로 결정화하는 공정, 상기 구동회로부 박막트랜지스터의 활성층패턴을 포함한 구동회로부 영역 상부에만 선택적으로 산화막을 증착하여 제1게이트 절연막을 형성하는 공정, 상기 구동회로부 박막트랜지스터의 활성층패턴 및 화소부 박막트랜지스터의 활성층패턴을 수소화하여 구동회로부 박막트랜지스터의 다결정수소화실리콘 활성층 및 화소부 박막트랜지스터의 비정질수소화실리콘 활성층을 형성하는 공정, 상기 구동회로부 박막트랜지스터의 활성층 및 화소부 박막트랜지스터 활성층을 포함한 기판 전면에 SiNx막을 증착하여 제2게이트절연막을 형성하는 공정, 상기 제2게이트절연막위에 산화막을 증착하여 제3게이트절연막을 형성하는 공정 상기 제3게이트절연막상의 상기 구동회로부 박막트랜지스터 활성층 및 화소부 박막트랜지스터 활성층 상부에 각가 게이트전극을 형성하는 공정, 상기 게이트전극을 마스크로 하여 상기 구동회로부 박막트랜지스터 활성층 및 화소부 박막트랜지스터 활성층에 불순물이온을 주입하여 소오스 및 드레인영역을 형성하는 공정을 포함하는 것을 특징으로 하는 액정표시소자용 박막트랜지스터 제조방법.Depositing amorphous silicon on the transparent insulating substrate including the driving circuit portion region and the pixel portion region by thermochemical vapor deposition, and patterning the amorphous silicon layer to form an active layer pattern of the driving circuit portion thin film transistor and an active layer pattern of the pixel portion thin film transistor. Forming a first gate insulating film by selectively depositing an oxide layer only on an upper portion of a driving circuit portion including the active layer pattern of the thin film transistor of the driving circuit portion by laser annealing; And hydrogenating the active layer pattern of the thin film transistor of the driving circuit unit and the active layer pattern of the thin film transistor of the pixel unit to form the polycrystalline silicon active layer of the thin film transistor of the driving circuit unit and the amorphous silicon active layer of the thin film transistor of the pixel unit. Forming a second gate insulating film by depositing a SiNx film on an entire surface of the substrate including the active layer of the driving circuit thin film transistor and the pixel thin film transistor active layer; and depositing an oxide film on the second gate insulating film to form a third gate insulating film. Forming a gate electrode on the driving circuit portion thin film transistor active layer and the pixel portion thin film transistor active layer on the third gate insulating layer; and the impurity in the driving circuit portion thin film transistor active layer and the pixel portion thin film transistor active layer using the gate electrode as a mask. A method of manufacturing a thin film transistor for a liquid crystal display device, comprising the step of implanting ions to form a source and a drain region. 제1항에 있어서, 상기 열화학기상증착법에 의해 형성되는 비정질실리콘막의 수소함량은 1-5atom%이하이고, 표면거칠기는 20Å 이하임을 특징으로 하는 액정표시소자용 박막트랜지스터 제조방법.The method of claim 1, wherein the hydrogen content of the amorphous silicon film formed by the thermochemical vapor deposition method is 1-5 atom% or less, and the surface roughness is 20 kW or less. 제1항에 있어서, 상기 소오스 및 드레인영역을 형성하는 공정후에 상기 게이트절연막상에 층간절연막을 형성하는 공정과, 상기 층간절연막 및 게이트절연막을 선택적으로 식각하여 상기 소오스 및 드레인영역을 노출시키는 콘택홀을 형성하는 공정, 상기 층간절연막상에 상기 콘택홀을 통해 상기 소오스 및 드레인영역과 접속되는 소오스 및 드레인 금속전극을 형성하는 공정이 더 포함되는 것을 특징으로 하는 액정표시소자용 박막트랜지스터 제조방법.2. The method of claim 1, further comprising: forming an interlayer insulating film on the gate insulating film after forming the source and drain regions, and selectively etching the interlayer insulating film and the gate insulating film to expose the source and drain regions. And forming a source and drain metal electrode connected to the source and drain regions through the contact hole on the interlayer insulating layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR94005869A 1994-03-23 1994-03-23 Fabrication method of tft KR970006264B1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100355713B1 (en) * 1999-05-28 2002-10-12 삼성전자 주식회사 Top gate type TFT LCD and Method of forming it

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100355713B1 (en) * 1999-05-28 2002-10-12 삼성전자 주식회사 Top gate type TFT LCD and Method of forming it

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