KR950015597A - Contact hole formation method of semiconductor device - Google Patents

Contact hole formation method of semiconductor device Download PDF

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Publication number
KR950015597A
KR950015597A KR1019930025122A KR930025122A KR950015597A KR 950015597 A KR950015597 A KR 950015597A KR 1019930025122 A KR1019930025122 A KR 1019930025122A KR 930025122 A KR930025122 A KR 930025122A KR 950015597 A KR950015597 A KR 950015597A
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KR
South Korea
Prior art keywords
layer
semiconductor device
contact hole
forming
intermediate layer
Prior art date
Application number
KR1019930025122A
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Korean (ko)
Other versions
KR100256809B1 (en
Inventor
김진웅
김준모
Original Assignee
김주용
현대전자산업 주식회사
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Priority to KR1019930025122A priority Critical patent/KR100256809B1/en
Publication of KR950015597A publication Critical patent/KR950015597A/en
Application granted granted Critical
Publication of KR100256809B1 publication Critical patent/KR100256809B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)

Abstract

본 발명은 반도체 소자의 콘택홀 형성방법에 관한 것으로, 반도체소자의 집적도가 높아지면서 선폭이 점점 좁아지게 되기 때문에 CD 로스(loss)로 인하여 원하는 콘택을 형성하기가 어려웠으나, 미세콘택의 형성시에 경화된 감광막을 사용하고 저온에서 PECVD 방법으로 산화막을 증착하고 이방성식각하여 스페이서와 콘택을 형성함으로써 필요로하는 CD를 맞출 수 있고 콘택의 형성후에 상기 산화막 스페이서를 습식방법으로 완전히 제거하여 콘택의 CD변화를 최소로하는 기술이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a contact hole in a semiconductor device, and since the line width becomes narrower as the degree of integration of the semiconductor device increases, it is difficult to form a desired contact due to CD loss. By using a hardened photoresist and depositing an oxide film by PECVD method at low temperature and anisotropically etching to form a contact with the spacer, it is possible to match the required CD, and after the formation of the contact, the oxide spacer is completely removed by a wet method to change the CD of the contact It is a technique to minimize.

Description

반도체소자의 콘택홀 형성방법Contact hole formation method of semiconductor device

제1도 내지 제5도는 본 발명의 실시예에 의해 반도체소자의 콘택홀의 형성공정을 도시한 단면도.1 to 5 are cross-sectional views showing a process of forming contact holes in a semiconductor device according to an embodiment of the present invention.

Claims (3)

반도체소자의 콘택홀 형성방법에 있어서, 실리콘기판의 상부에 산화막을 형성한 다음, 그 상부에 하층감광막, 중간층 및 상층감광막으로 구성되는 3층감광막을 도포하고 노광 및 현상하여 상층감광막패턴을 형성하는 공정과, 상기 상층감광막패턴을 마스크로 하여 중간층과 하층감광막을 식각하여 중간층패턴과 하층감광막패턴을 형성하는 공정과, 상기 상층감광막패턴 및 중간층을 제거한 후, 콘택이 형설될 부분의 산화막을 일정두께 부분식각하여 홈을 형성하는 공정과, 산화막을 전체구조상부에 증착하는 공정과, 상기 증착된 산화막을 건식방법으로 이방성 식각하여 홈 측벽에 산화막 스페이서를 형성하고 홈저부의 중간층을 식각하여 콘택홀을 형성하는 공정과, 상기 하층감과암패턴을 제거한 후, 습식방법으로 산화막 스페이서를 제거하여 상부는 폭이 넓고 저부는 폭이 좁은 콘텍홀을 형성하는 공정을 포함하는 반도체소자의 미세콘택홀 형성방법.In the method for forming a contact hole in a semiconductor device, an oxide film is formed on an upper part of a silicon substrate, and then an upper layer photoresist pattern is formed by coating, exposing and developing a three-layer photoresist film consisting of a lower photoresist film, an intermediate layer, and an upper photoresist film. Forming a middle layer pattern and a lower photoresist pattern by etching the intermediate layer and the lower photoresist layer using the upper photoresist pattern as a mask; and removing the upper photoresist pattern and the intermediate layer, and then removing an oxide film at a portion where a contact is formed. Forming a groove by partial etching; depositing an oxide film on the entire structure; and anisotropically etching the deposited oxide film by a dry method to form an oxide spacer on the sidewall of the groove and etching the intermediate layer of the groove bottom to form a contact hole. After the forming process and the lower layer and dark pattern are removed, the oxide spacers are removed by a wet method. How to form fine contact hole of the semiconductor device of wider bottom portion comprises a step of forming a narrow cone tekhol width. 제1항에 있어서, 상기 중간층으로는 SOG막을 사용하는 것을 특징으로 하는 반도체소자의 미세콘택홀 형성 방법.The method of claim 1, wherein an SOG film is used as the intermediate layer. 제1항에 있어서, 상기 산화막 스페이서를 BOE를 사용한 습식방법으로 제거하는 것을 특징으로 하는 반도체 소자의 미세콘택홀 형성 방법.The method of claim 1, wherein the oxide spacer is removed by a wet method using a BOE. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930025122A 1993-11-24 1993-11-24 Method for forming contact hole in semiconductor device KR100256809B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930025122A KR100256809B1 (en) 1993-11-24 1993-11-24 Method for forming contact hole in semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930025122A KR100256809B1 (en) 1993-11-24 1993-11-24 Method for forming contact hole in semiconductor device

Publications (2)

Publication Number Publication Date
KR950015597A true KR950015597A (en) 1995-06-17
KR100256809B1 KR100256809B1 (en) 2000-05-15

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KR1019930025122A KR100256809B1 (en) 1993-11-24 1993-11-24 Method for forming contact hole in semiconductor device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100586538B1 (en) * 1999-12-30 2006-06-07 주식회사 하이닉스반도체 Method for forming contact hole of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100586538B1 (en) * 1999-12-30 2006-06-07 주식회사 하이닉스반도체 Method for forming contact hole of semiconductor device

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Publication number Publication date
KR100256809B1 (en) 2000-05-15

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