KR950004724A - Digital / Analog Converters Can Compensate for Output Voltage Errors - Google Patents

Digital / Analog Converters Can Compensate for Output Voltage Errors Download PDF

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Publication number
KR950004724A
KR950004724A KR1019930012439A KR930012439A KR950004724A KR 950004724 A KR950004724 A KR 950004724A KR 1019930012439 A KR1019930012439 A KR 1019930012439A KR 930012439 A KR930012439 A KR 930012439A KR 950004724 A KR950004724 A KR 950004724A
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KR
South Korea
Prior art keywords
digital
signal
difference
decoding
analog converter
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Application number
KR1019930012439A
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Korean (ko)
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KR950015049B1 (en
Inventor
박종석
Original Assignee
문정환
금성일렉트론 주식회사
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Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019930012439A priority Critical patent/KR950015049B1/en
Publication of KR950004724A publication Critical patent/KR950004724A/en
Application granted granted Critical
Publication of KR950015049B1 publication Critical patent/KR950015049B1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0634Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

본 발명은 출력전압을 보상할 수 있는 디지탈/아날로그 변환기에 관한 것으로, 입력된 디지탈 신호의 현재의 디코딩신호와 전(前) 디코딩신호를 비교하여 그 차를 검출하기 위한 비교검출부와 상기 검출된 차만큼 전류량을 감소 또는 증가시키는 전류조절부를 포함하여 구성되는 것을 특징으로 한다.The present invention relates to a digital-to-analog converter capable of compensating an output voltage. The present invention relates to a comparison detector for comparing a current decoded signal of an input digital signal with a previous decoded signal and detecting the difference. Characterized in that it comprises a current control unit for reducing or increasing the amount of current by.

따라서, 본 발명의 디지탈/아날로그 변환기는 디지탈 입력이 심하게 변하거나, 고주파에서 사용하여도 정확하고 안정된 아날로그 출력파형을 얻을 수 있다.Therefore, the digital-to-analog converter of the present invention can obtain an accurate and stable analog output waveform even when the digital input is severely changed or used at a high frequency.

Description

출력전압의 오차를 보상할 수 있는 디지탈/아날로그 변환기Digital / Analog Converters Can Compensate for Output Voltage Errors

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 다른 디지탈/아날로그 변환기의 회로도.2 is a circuit diagram of a digital to analog converter according to the present invention.

Claims (4)

입력된 디지탈 신호를 디코딩하는 디코딩부와, 현재의 디코딩신호와 전(前) 디코딩 신호를 비교하여 그 차를 검출하는 비교 검출부와 상기 검출된 차만큼 전류량을 증가 또는 감소시키는 전류 조절부 및 디코딩된 신호에 따라 단락 또는 개방되는 스위칭부를 포함하여 구성되는 것을 특징으로 하는 디지탈/아날로그 변환기.A decoding section for decoding the input digital signal, a comparison detecting section for comparing the current decoding signal with the previous decoding signal, and detecting the difference, and a current adjusting section for increasing or decreasing the amount of current by the detected difference and the decoded section. And a switching unit which is shorted or opened in accordance with a signal. 제1항에 있어서, 상기 디코딩부는 디코더와, 디코딩된 신호를 1차저장하는 제1래치수단 및 이 제 1 래치수단의 다음단에 연결되어 디코딩된 신호를 2차 저장하는 제 2 래치수단으로 구성되는 것을 특징으로 하는 디지탈/아날로그 변환기.2. The apparatus of claim 1, wherein the decoding unit comprises a decoder, first latch means for primary storage of the decoded signal, and second latch means for secondary storage of the decoded signal connected to the next stage of the first latching means. Digital to analog converter, characterized in that. 제1항에 있어서, 상기 비교검출부는 상기 디코더의 출력과 제 1 래치수단의 출력을 비교하여 그 차를 검출하는 비교검출수단 및 검출된 신호를 저장하는 제 3 래치수단으로 구성되는 것을 특징으로 하는 디지탈/아날로그 변환기.The method of claim 1, wherein the comparison detecting unit comprises a comparison detecting means for comparing the output of the decoder and the output of the first latching means and detecting the difference, and a third latching means for storing the detected signal. Digital / Analog Converter. 제3항에 있어서, 상기 비교검출수단은 감산기이며, 차를 2의 보수로 나타내는 것을 특징으로 하는 디지탈/아날로그 변환기.4. The digital-to-analog converter according to claim 3, wherein the comparison detecting means is a subtractor and represents the difference in two's complement. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930012439A 1993-07-02 1993-07-02 Digital/analog converter for error compensating of output voltage KR950015049B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930012439A KR950015049B1 (en) 1993-07-02 1993-07-02 Digital/analog converter for error compensating of output voltage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930012439A KR950015049B1 (en) 1993-07-02 1993-07-02 Digital/analog converter for error compensating of output voltage

Publications (2)

Publication Number Publication Date
KR950004724A true KR950004724A (en) 1995-02-18
KR950015049B1 KR950015049B1 (en) 1995-12-21

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KR1019930012439A KR950015049B1 (en) 1993-07-02 1993-07-02 Digital/analog converter for error compensating of output voltage

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100532655B1 (en) * 1996-12-19 2006-02-28 신에쓰 가가꾸 고교 가부시끼가이샤 Epoxy Resin Composition and Semiconductor Device
KR100725975B1 (en) * 2005-10-26 2007-06-08 삼성전자주식회사 Voltage generation circuit, Voltage generation method, and analog to digital converter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100532655B1 (en) * 1996-12-19 2006-02-28 신에쓰 가가꾸 고교 가부시끼가이샤 Epoxy Resin Composition and Semiconductor Device
KR100725975B1 (en) * 2005-10-26 2007-06-08 삼성전자주식회사 Voltage generation circuit, Voltage generation method, and analog to digital converter

Also Published As

Publication number Publication date
KR950015049B1 (en) 1995-12-21

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