KR940006489U - Lead frame for semiconductor package - Google Patents
Lead frame for semiconductor packageInfo
- Publication number
- KR940006489U KR940006489U KR2019920015769U KR920015769U KR940006489U KR 940006489 U KR940006489 U KR 940006489U KR 2019920015769 U KR2019920015769 U KR 2019920015769U KR 920015769 U KR920015769 U KR 920015769U KR 940006489 U KR940006489 U KR 940006489U
- Authority
- KR
- South Korea
- Prior art keywords
- lead frame
- semiconductor package
- package
- semiconductor
- lead
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR92015769U KR950007208Y1 (en) | 1992-08-21 | 1992-08-21 | Lead frame |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR92015769U KR950007208Y1 (en) | 1992-08-21 | 1992-08-21 | Lead frame |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940006489U true KR940006489U (en) | 1994-03-25 |
KR950007208Y1 KR950007208Y1 (en) | 1995-09-02 |
Family
ID=19338794
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR92015769U KR950007208Y1 (en) | 1992-08-21 | 1992-08-21 | Lead frame |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR950007208Y1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100640556B1 (en) * | 2006-03-09 | 2006-11-01 | 주식회사 티에스피 | Semiconductor device |
-
1992
- 1992-08-21 KR KR92015769U patent/KR950007208Y1/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100640556B1 (en) * | 2006-03-09 | 2006-11-01 | 주식회사 티에스피 | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
KR950007208Y1 (en) | 1995-09-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20050824 Year of fee payment: 11 |
|
LAPS | Lapse due to unpaid annual fee |