KR930014498A - Digital VCD recording method and device - Google Patents

Digital VCD recording method and device Download PDF

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Publication number
KR930014498A
KR930014498A KR1019910024909A KR910024909A KR930014498A KR 930014498 A KR930014498 A KR 930014498A KR 1019910024909 A KR1019910024909 A KR 1019910024909A KR 910024909 A KR910024909 A KR 910024909A KR 930014498 A KR930014498 A KR 930014498A
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KR
South Korea
Prior art keywords
memory
track
data
recorded
sync block
Prior art date
Application number
KR1019910024909A
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Korean (ko)
Other versions
KR950000340B1 (en
Inventor
우상준
오택상
Original Assignee
이헌조
주식회사 금성사
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Publication date
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Priority to KR1019910024909A priority Critical patent/KR950000340B1/en
Publication of KR930014498A publication Critical patent/KR930014498A/en
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Publication of KR950000340B1 publication Critical patent/KR950000340B1/en

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/18Error detection or correction; Testing, e.g. of drop-outs

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

본 발명은 헬리컬 스캔방식 기록, 재생계가 이용되는 디지탈신호 기록, 재생 시스템 분야에 관한 것으로, 헤드스위칭시 발생하는 노이즈로 인한 에러발생을 방지하고 한 동기블럭을 같은 트랙에 기록하여 동기인식을 통해 에러없이 데이타를 재생하는 것을 기술적 과제로 한다.BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to the field of helical scan type recording, digital signal recording using a reproducing system, and a reproducing system. It is a technical problem to play back data without using it.

따라서 헤드 스위칭으로 인한 노이즈 영향은 트랙의 시작과 끝부분에 더미 데이타를 기록하고, 수신된 원래의 데이타는 그의 부분에만 기록하여 에러를 방지하며, 시스템에서 동기블럭을 부가하여 각 트랙이 일정 정수개의 동기블럭을 기록함에 따라 에러를 방지하는 것을 요지로 한다.Therefore, the noise effect due to head switching records dummy data at the beginning and the end of the track, and the received original data is recorded only at that part to prevent errors, and the system adds a sync block so that each track has a constant number of integers. The point is to prevent errors by recording the sync block.

또한 본 발명은 헬리컬 스캔 방식의 기록, 재생장치, D.VCR, R.DAT 등에 이용되는 것을 용도로 한다.In addition, the present invention is intended for use in a helical scan type recording and reproducing apparatus, D.VCR, R.DAT, and the like.

Description

디지탈 브이씨알의 기록방법 및 장치Digital VCD recording method and device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명 테이프의 기록 포맷에 대한 개략도.1 is a schematic diagram of a recording format of a tape of the present invention.

제2도는 본 발명 디지탈 브이씨알의 기록장치에 대한 구성도.2 is a block diagram of a recording apparatus of the present invention Digital VR.

제3도는 본 발명 테이프의 기록 포멧에 대한 예시도로서, DSC-HDVCR 기록 포멧에 대한 개략도.3 is an exemplary diagram of a recording format of the tape of the present invention, and a schematic diagram of the DSC-HDVCR recording format.

Claims (2)

헤드 스위칭부분을 제외한 트랙부분에 수신된 데이타를 빠른 클럭으로 일정시간 단위의 데이타를 기록하고, 트랙의 시작과 끝부분에 에러방지용의 더미 데이타를 기록하고, 시스템에서 동기블럭을 부가하여 한 트랙에 기록되는 동기 블럭의 수를 정수로 일정하게 하며, 부가된 동기블럭의 재생시 수직동기 패턴으로 사용하는 것을 특징으로 하는 디지탈 브이씨알 기록방법.The data received in the track part except the head switching part is recorded with a fast clock data of a certain time, the dummy data for error prevention is recorded at the beginning and the end of the track, and the system adds a sync block to each track. A digital VCD recording method, characterized in that the number of sync blocks to be recorded is constant and used as a vertical sync pattern during reproduction of the added sync block. 기록시작 신호에 따라 각 메모리(206)(207)를 초기화하는 메모리 초기화부(208)와, 인가되는 수직동기 신호에 따라 상기 메모리(206)(207)를 제어하는 메모리 콘트롤부(201)와, 수직동기 신호, 클럭신호에 의해 제어되는 라이트 어드레스 발생부(202), 리드어드레스 발생부(203)의 어드레스 선택신호에 의해 스위칭 제어하여 상기 메모리(206)(207)의 데이타를 기록계에 전송하도록 하는 멀티 플렉서(205)(204)로 된 것을 특징으로 하는 디지탈 브이씨알의 기록장치.A memory initialization unit 208 for initializing each memory 206 and 207 in accordance with a recording start signal, a memory controller 201 for controlling the memory 206 and 207 in accordance with an applied vertical synchronization signal, The switching control is performed by the address selection signals of the write address generator 202 and the read address generator 203 controlled by the vertical synchronization signal and the clock signal to transfer the data of the memory 206 and 207 to the recorder. And a multiplexer (205, 204). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910024909A 1991-12-28 1991-12-28 Recording method & device of digital vcr KR950000340B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910024909A KR950000340B1 (en) 1991-12-28 1991-12-28 Recording method & device of digital vcr

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910024909A KR950000340B1 (en) 1991-12-28 1991-12-28 Recording method & device of digital vcr

Publications (2)

Publication Number Publication Date
KR930014498A true KR930014498A (en) 1993-07-23
KR950000340B1 KR950000340B1 (en) 1995-01-13

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ID=19326470

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910024909A KR950000340B1 (en) 1991-12-28 1991-12-28 Recording method & device of digital vcr

Country Status (1)

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KR (1) KR950000340B1 (en)

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Publication number Publication date
KR950000340B1 (en) 1995-01-13

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