KR920022454A - Method of manufacturing semiconductor device for suppressing hillock growth of metal layer - Google Patents

Method of manufacturing semiconductor device for suppressing hillock growth of metal layer Download PDF

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Publication number
KR920022454A
KR920022454A KR1019910008141A KR910008141A KR920022454A KR 920022454 A KR920022454 A KR 920022454A KR 1019910008141 A KR1019910008141 A KR 1019910008141A KR 910008141 A KR910008141 A KR 910008141A KR 920022454 A KR920022454 A KR 920022454A
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KR
South Korea
Prior art keywords
metal layer
layer
aluminum oxide
predetermined
semiconductor device
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Application number
KR1019910008141A
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Korean (ko)
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KR930008862B1 (en
Inventor
김용화
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정몽헌
현대전자산업 주식회사
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Priority to KR1019910008141A priority Critical patent/KR930008862B1/en
Publication of KR920022454A publication Critical patent/KR920022454A/en
Application granted granted Critical
Publication of KR930008862B1 publication Critical patent/KR930008862B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

내용 없음.No content.

Description

금속층의 힐록성장 억제를 위한 반도체 소자 제조 방법Method of manufacturing semiconductor device for suppressing hillock growth of metal layer

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2A도 내지 제2C도는 본 발명의 실시예에 의해 금속층, 산화알루미늄층, 절연층, 금속층에 접속된 도전층을 형성하는 과정을 도시한 단면도.2A to 2C are cross-sectional views showing a process of forming a conductive layer connected to a metal layer, an aluminum oxide layer, an insulating layer, and a metal layer according to an embodiment of the present invention.

Claims (3)

알루미늄에 실리콘이 포함된 금속층의 힐록성장 억제를 위한 반도체소자 제조 방법에 있어서, 알루미늄에 실리콘이 포함된 금속층을 증착하고 패턴을 형성하는 단계와, 상기 금속층 표면에 자연적으로 성장된 산화알루미늄층을 제거하기 위하여 아르곤으로 스퍼터 애칭을 실시하는 단계와, 상기 금속층을 예정된 온도의 D.I수에 예정된 시간 넣어서 산화알루미늄층을 예정된 두께이상 성장시키는 단계로 이루어져 그로 인하여 열처리 공정 또는 후공정의 고온공정에서 금속층 표면에 힐록이 발생되지 않도록 하는 것을 특징으로 하는 금속층의 힐록성장 억제를 위한 반도체소자 제조 방법.A method of manufacturing a semiconductor device for inhibiting hillock growth of a metal layer containing silicon in aluminum, the method comprising: depositing a metal layer including silicon on aluminum and forming a pattern; and removing the aluminum oxide layer naturally grown on the surface of the metal layer. In order to sputter etching with argon, and to put the metal layer in a DI water at a predetermined temperature for a predetermined time to grow an aluminum oxide layer more than a predetermined thickness, thereby to the surface of the metal layer in a high temperature process of the heat treatment process or a post process A method for manufacturing a semiconductor device for suppressing hillock growth of a metal layer, characterized in that no hillock is generated. 제1항에 있어서, 상기 금속층을 70℃ 이상의 D.I수에 10분동안 넣어서 산화알루미늄층을 1500Å 이상 성장시키는 것을 특징으로 하는 금속층의 힐록성장 억제를 위한 반도체소자 제조 방법.The method of claim 1, wherein the aluminum oxide layer is grown to 1500 Å or more by placing the metal layer in D.I water of 70 ° C. or higher for 10 minutes. 제1항에 있어서, 상기 금속층상부면에 도전층을 콘택하기 위하여, 금속층 표면에 자연적으로 성장된 산화알루미늄 아르콘 스퍼터 애칭을 실시하는 단계후에 금속층외 예정된 콘택영역 상부에 포토레지스트를 도포하는 단계와, 상기 금속층을 예정된 온도의 D.I수에 예정된 시간을 넣어서 산화알루미늄을 예정된 두께이상 성장시키는 단계와, 상기 포토레지스트를 제거하고 산화알루미늄층 상부에 절연층을 증착한 후 상기 콘택영역의 절연층을 제거하는 단계와, 금속층에 접속되는 도전층을 증착하고, 패턴하는 단계로 이루어져 그로 인하여 예정된 콘택영역을 제외한 금속층 표면에 힐록이 발생되지 않도록 하는 것을 포함하는 것을 특징으로 하는 금속층의 힐록성장 억제를 위한 반도체소자 제조 방법.The method of claim 1, further comprising: applying a photoresist on top of the predetermined contact region other than the metal layer after performing a naturally grown aluminum oxide arcon sputter etching on the surface of the metal layer to contact the conductive layer on the upper surface of the metal layer; The step of growing the metal layer to a predetermined time in DI water of a predetermined temperature to grow aluminum oxide more than a predetermined thickness, removing the photoresist and depositing an insulating layer on the aluminum oxide layer and then removing the insulating layer of the contact region And depositing and patterning a conductive layer connected to the metal layer, thereby preventing hillock from occurring on the surface of the metal layer except for the predetermined contact region. Manufacturing method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910008141A 1991-05-20 1991-05-20 Manufacturing method of semiconductor device for anti-hillock KR930008862B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910008141A KR930008862B1 (en) 1991-05-20 1991-05-20 Manufacturing method of semiconductor device for anti-hillock

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910008141A KR930008862B1 (en) 1991-05-20 1991-05-20 Manufacturing method of semiconductor device for anti-hillock

Publications (2)

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KR920022454A true KR920022454A (en) 1992-12-19
KR930008862B1 KR930008862B1 (en) 1993-09-16

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KR1019910008141A KR930008862B1 (en) 1991-05-20 1991-05-20 Manufacturing method of semiconductor device for anti-hillock

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100813358B1 (en) * 2003-01-27 2008-03-12 샤프 가부시키가이샤 Liquid crystal display having aluminum wiring

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100813358B1 (en) * 2003-01-27 2008-03-12 샤프 가부시키가이샤 Liquid crystal display having aluminum wiring

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Publication number Publication date
KR930008862B1 (en) 1993-09-16

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