KR920007116A - 내층 절연막 형성방법 - Google Patents
내층 절연막 형성방법 Download PDFInfo
- Publication number
- KR920007116A KR920007116A KR1019910016708A KR910016708A KR920007116A KR 920007116 A KR920007116 A KR 920007116A KR 1019910016708 A KR1019910016708 A KR 1019910016708A KR 910016708 A KR910016708 A KR 910016708A KR 920007116 A KR920007116 A KR 920007116A
- Authority
- KR
- South Korea
- Prior art keywords
- gas
- reaction vessel
- mixture
- semiconductor substrate
- inner layer
- Prior art date
Links
- 238000009413 insulation Methods 0.000 title 1
- 238000000034 method Methods 0.000 claims description 13
- 239000007789 gas Substances 0.000 claims 8
- 150000001282 organosilanes Chemical class 0.000 claims 5
- 239000004065 semiconductor Substances 0.000 claims 5
- 239000000758 substrate Substances 0.000 claims 5
- 239000000203 mixture Substances 0.000 claims 4
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 2
- 239000012159 carrier gas Substances 0.000 claims 2
- 229910001873 dinitrogen Inorganic materials 0.000 claims 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims 1
- NEXSMEBSBIABKL-UHFFFAOYSA-N hexamethyldisilane Chemical compound C[Si](C)(C)[Si](C)(C)C NEXSMEBSBIABKL-UHFFFAOYSA-N 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- HMMGMWAXVFQUOA-UHFFFAOYSA-N octamethylcyclotetrasiloxane Chemical compound C[Si]1(C)O[Si](C)(C)O[Si](C)(C)O[Si](C)(C)O1 HMMGMWAXVFQUOA-UHFFFAOYSA-N 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
- C23C16/402—Silicon dioxide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
- H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31608—Deposition of SiO2
- H01L21/31612—Deposition of SiO2 on a silicon body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/118—Oxide films
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Inorganic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 방법에 수행하기 위한 장치의 실시예를 나타내기 위한 개략적인 도면,
제2도는 본 발명에 따른 방법의 제1실시예에 의해 형성된 절연막을 도시한 횡단면도,
제3도는 제1비교기에 의해 생성된 절연막을 묘사한 횡단면도.
Claims (10)
- 반응용기내에 반도체 기판을 배치하고, 유기실란가스 및 오존가스의 혼합물을 반응용기안으로 주입 혼합하여 반도체기판과 금속층사이 또는 반응용기의 반도체기판사이에 제공되는 내층 절연막 형성방법에 있어서, 상기 반응용기는 대기압보다 높은 압력으로 유지되는 것을 특징으로 하는 내층 절연막 형성방법.
- 제1항에 있어서, 상기 반도체기판은 반응용기에서 가열되는 내층 절연막 형성방법.
- 제2항에 있어서, 상기 반응용기는 1.5~5Torr의 압력으로 유지되는 내층 절연막 형성방법.
- 제3항에 있어서, 상기 반응용기는 약 2Torr의 압력으로 유지되는 내층 절연막 형성방법.
- 제2항에 있어서, 유기실란다스는 테트라에톡시실란, 헥사메틸디실란 및 옥타메틸사이클로테트라실록산으로 구성된 군으로부터 선택되는 유기규산염재에 의해 형성된 내층 절연막 형성방법.
- 제2항에 있어서, 상기 반도체기판은 350~450℃의 온도로 가열되는 내층 절연막 형성방법.
- 제2항에 있어서, 상기 유기실란가스 및 오존가스의 혼합물은 캐리어 가스의 사용에 의해 상기 반응용기안으로 주입되는 내층 절연막 형성방법.
- 제7항에 있어서, 상기 캐리어가스는 질소가스로 구성된 내층 절연막 형성방법.
- 제8항에 있어서, 상기 유기실란가스는 가스분출장치를 통한 질소가스 흐름에 의해 형성되는 내층 절연막 형성방법.
- 제2항에 있어서, 상기 혼합물은 유기실란가스 및 오존가스를 50 : 3의 비율로 섞은 것인 내층 절연막 형성방법.※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP90-251801 | 1990-09-25 | ||
JP25180190 | 1990-09-25 | ||
JP91-231840 | 1991-09-11 | ||
JP3231840A JPH053258A (ja) | 1990-09-25 | 1991-09-11 | 層間絶縁膜の形成方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR920007116A true KR920007116A (ko) | 1992-04-28 |
Family
ID=26530129
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910016708A KR920007116A (ko) | 1990-09-25 | 1991-09-25 | 내층 절연막 형성방법 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5290736A (ko) |
EP (1) | EP0478308A3 (ko) |
JP (1) | JPH053258A (ko) |
KR (1) | KR920007116A (ko) |
CA (1) | CA2051989A1 (ko) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04341568A (ja) * | 1991-05-16 | 1992-11-27 | Toshiba Corp | 薄膜形成方法及び薄膜形成装置 |
DE69311184T2 (de) * | 1992-03-27 | 1997-09-18 | Matsushita Electric Ind Co Ltd | Halbleitervorrichtung samt Herstellungsverfahren |
US5459108A (en) * | 1992-10-06 | 1995-10-17 | Sharp Kabushiki Kaisha | Normal pressure CVD process for manufacture of a semiconductor device through reaction of a nitrogen containing organic source with ozone |
JPH0729897A (ja) * | 1993-06-25 | 1995-01-31 | Nec Corp | 半導体装置の製造方法 |
KR970007116B1 (ko) * | 1993-08-31 | 1997-05-02 | 삼성전자 주식회사 | 반도체장치의 절연층 형성방법 및 그 형성장치 |
JP3102974B2 (ja) * | 1993-09-20 | 2000-10-23 | 富士通株式会社 | 半導体装置における絶縁膜の形成方法 |
JP3432601B2 (ja) * | 1994-06-17 | 2003-08-04 | 東京エレクトロン株式会社 | 成膜方法 |
US5672388A (en) * | 1994-07-08 | 1997-09-30 | Exxon Research & Engineering Company | Membrane reparation and poer size reduction using interfacial ozone assisted chemical vapor deposition |
US5869406A (en) * | 1995-09-28 | 1999-02-09 | Mosel Vitelic, Inc. | Method for forming insulating layers between polysilicon layers |
US5855957A (en) * | 1997-02-18 | 1999-01-05 | Watkins-Johnson Company | Optimization of SiO2 film conformality in atmospheric pressure chemical vapor deposition |
US6149974A (en) * | 1997-05-05 | 2000-11-21 | Applied Materials, Inc. | Method for elimination of TEOS/ozone silicon oxide surface sensitivity |
WO1999000839A1 (en) * | 1997-06-26 | 1999-01-07 | Advanced Micro Devices, Inc. | Dual damascene etch process |
WO1999000840A1 (en) * | 1997-06-26 | 1999-01-07 | Advanced Micro Devices, Inc. | Interconnect spacer structures |
US6593247B1 (en) | 1998-02-11 | 2003-07-15 | Applied Materials, Inc. | Method of depositing low k films using an oxidizing plasma |
US6660656B2 (en) | 1998-02-11 | 2003-12-09 | Applied Materials Inc. | Plasma processes for depositing low dielectric constant films |
US6287990B1 (en) | 1998-02-11 | 2001-09-11 | Applied Materials, Inc. | CVD plasma assisted low dielectric constant films |
US6303523B2 (en) | 1998-02-11 | 2001-10-16 | Applied Materials, Inc. | Plasma processes for depositing low dielectric constant films |
US6627532B1 (en) * | 1998-02-11 | 2003-09-30 | Applied Materials, Inc. | Method of decreasing the K value in SiOC layer deposited by chemical vapor deposition |
US6054379A (en) | 1998-02-11 | 2000-04-25 | Applied Materials, Inc. | Method of depositing a low k dielectric with organo silane |
US6068884A (en) * | 1998-04-28 | 2000-05-30 | Silcon Valley Group Thermal Systems, Llc | Method of making low κ dielectric inorganic/organic hybrid films |
JP3944487B2 (ja) * | 2000-04-11 | 2007-07-11 | 松下電器産業株式会社 | 半導体装置の製造装置 |
US6410968B1 (en) * | 2000-08-31 | 2002-06-25 | Micron Technology, Inc. | Semiconductor device with barrier layer |
US6576964B1 (en) | 2000-08-31 | 2003-06-10 | Micron Technology, Inc. | Dielectric layer for a semiconductor device having less current leakage and increased capacitance |
US6521544B1 (en) * | 2000-08-31 | 2003-02-18 | Micron Technology, Inc. | Method of forming an ultra thin dielectric film |
US6440876B1 (en) | 2000-10-10 | 2002-08-27 | The Boc Group, Inc. | Low-K dielectric constant CVD precursors formed of cyclic siloxanes having in-ring SI—O—C, and uses thereof |
US6649540B2 (en) | 2000-11-09 | 2003-11-18 | The Boc Group, Inc. | Organosilane CVD precursors and their use for making organosilane polymer low-k dielectric film |
US6572923B2 (en) | 2001-01-12 | 2003-06-03 | The Boc Group, Inc. | Asymmetric organocyclosiloxanes and their use for making organosilicon polymer low-k dielectric film |
US6709721B2 (en) | 2001-03-28 | 2004-03-23 | Applied Materials Inc. | Purge heater design and process development for the improvement of low k film properties |
JP3666751B2 (ja) * | 2003-11-28 | 2005-06-29 | 東京エレクトロン株式会社 | 絶縁膜の形成方法及び絶縁膜形成システム |
KR102018318B1 (ko) * | 2018-09-11 | 2019-09-04 | 주식회사 유진테크 | 박막 형성 방법 |
CN111893461B (zh) * | 2020-07-06 | 2021-09-24 | 山东大学 | 一种类氧化硅柔性薄膜的生长方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4072947A (en) * | 1976-11-11 | 1978-02-07 | Rca Corporation | Monotonically ranging FM-CW radar signal processor |
US4845054A (en) * | 1985-06-14 | 1989-07-04 | Focus Semiconductor Systems, Inc. | Low temperature chemical vapor deposition of silicon dioxide films |
US4900591A (en) * | 1988-01-20 | 1990-02-13 | The United States Of America As Represented By The Secretary Of The Air Force | Method for the deposition of high quality silicon dioxide at low temperature |
-
1991
- 1991-09-11 JP JP3231840A patent/JPH053258A/ja active Pending
- 1991-09-20 CA CA002051989A patent/CA2051989A1/en not_active Abandoned
- 1991-09-24 US US07/764,901 patent/US5290736A/en not_active Expired - Fee Related
- 1991-09-25 KR KR1019910016708A patent/KR920007116A/ko not_active Application Discontinuation
- 1991-09-25 EP EP19910308751 patent/EP0478308A3/en not_active Ceased
Also Published As
Publication number | Publication date |
---|---|
EP0478308A2 (en) | 1992-04-01 |
JPH053258A (ja) | 1993-01-08 |
CA2051989A1 (en) | 1992-03-26 |
US5290736A (en) | 1994-03-01 |
EP0478308A3 (en) | 1993-04-21 |
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