KR910017291A - Old Data Processing Circuit - Google Patents
Old Data Processing Circuit Download PDFInfo
- Publication number
- KR910017291A KR910017291A KR1019900004438A KR900004438A KR910017291A KR 910017291 A KR910017291 A KR 910017291A KR 1019900004438 A KR1019900004438 A KR 1019900004438A KR 900004438 A KR900004438 A KR 900004438A KR 910017291 A KR910017291 A KR 910017291A
- Authority
- KR
- South Korea
- Prior art keywords
- logic controller
- signal
- data
- control
- processing circuit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storing Facsimile Image Data (AREA)
- Programmable Controllers (AREA)
Abstract
내용 없음No content
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명에 의한 고속데이타 처리 회로의 개략적인 구성을 도시한 개요도, 제3도는 본 발명에 따른 고속 데이타 처리 회로의 각 구성부 파형을 도시한 파형도.2 is a schematic diagram showing a schematic configuration of a high speed data processing circuit according to the present invention, and FIG. 3 is a waveform diagram showing waveforms of respective components of the high speed data processing circuit according to the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900004438A KR940004573B1 (en) | 1990-03-31 | 1990-03-31 | High speed data processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900004438A KR940004573B1 (en) | 1990-03-31 | 1990-03-31 | High speed data processor |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910017291A true KR910017291A (en) | 1991-11-05 |
KR940004573B1 KR940004573B1 (en) | 1994-05-25 |
Family
ID=19297577
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900004438A KR940004573B1 (en) | 1990-03-31 | 1990-03-31 | High speed data processor |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR940004573B1 (en) |
-
1990
- 1990-03-31 KR KR1019900004438A patent/KR940004573B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR940004573B1 (en) | 1994-05-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR930016886A (en) | Computer system and data storage method | |
KR930014089A (en) | Data transmission device | |
KR880003328A (en) | Semiconductor memory device | |
KR910001771A (en) | Semiconductor memory device | |
KR890017619A (en) | Multi-bus microcomputer system | |
KR950033836A (en) | Memory reader | |
JPS5786959A (en) | Data transfer control system | |
KR920017115A (en) | Semiconductor memory device | |
KR920013452A (en) | Sequential memory | |
KR880011676A (en) | Block access method using cache memory | |
KR860004349A (en) | Process I / O Device of Sequence Controller | |
KR910017291A (en) | Old Data Processing Circuit | |
KR960019307A (en) | Semiconductor memory device | |
KR930005366A (en) | Device and method for outputting valid data only and memory device | |
KR930001217A (en) | Semiconductor memory | |
KR930002948A (en) | Device and Method for Reducing Memory Access Time in Block Read and Write | |
KR920018590A (en) | Data communication circuit between data terminal and central controller | |
KR920018768A (en) | Data storage system with unique burst search | |
KR910001566A (en) | Common Memory Access | |
KR950020177A (en) | Relay circuit for memory device | |
KR920013998A (en) | Data relay control signal relay circuit | |
KR920018569A (en) | Interface circuit for high speed transmission of image data | |
KR970049590A (en) | Memory read and write control device | |
KR890011237A (en) | High Speed Data Processing Method in Optical Storage Devices | |
KR890017912A (en) | Pseudo-DMA transmitter |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20030512 Year of fee payment: 10 |
|
LAPS | Lapse due to unpaid annual fee |