KR910013971A - Multiple signal extraction circuit - Google Patents

Multiple signal extraction circuit Download PDF

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Publication number
KR910013971A
KR910013971A KR1019890020553A KR890020553A KR910013971A KR 910013971 A KR910013971 A KR 910013971A KR 1019890020553 A KR1019890020553 A KR 1019890020553A KR 890020553 A KR890020553 A KR 890020553A KR 910013971 A KR910013971 A KR 910013971A
Authority
KR
South Korea
Prior art keywords
signal
input
extracting
extraction circuit
signal extraction
Prior art date
Application number
KR1019890020553A
Other languages
Korean (ko)
Other versions
KR920005221B1 (en
Inventor
강흥용
Original Assignee
경상현
재단법인 한국전자통신연구소
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 경상현, 재단법인 한국전자통신연구소 filed Critical 경상현
Priority to KR1019890020553A priority Critical patent/KR920005221B1/en
Publication of KR910013971A publication Critical patent/KR910013971A/en
Application granted granted Critical
Publication of KR920005221B1 publication Critical patent/KR920005221B1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Hardware Redundancy (AREA)

Abstract

내용 없음.No content.

Description

다중 신호 추출 회로Multiple signal extraction circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 구성도.1 is a block diagram of the present invention.

Claims (1)

전전자 교환기의 내부 통신 장치에 있어서, 직렬 버스(D-bus)로 부터 입력되는 3중화된 동기클럭 신호를 입력으로 받아 동기클럭 최종신호를 추출해 내는 동기클럭 신호추출수단(1), 상기 동기클럭 신호추출수단(1)에 연결된 출력라인(3), 상기 출력 라인(3)에 연결되어 직렬버스로 부터 입력되는 3중화된 메시지 데이타 신호와 상기 동기클럭 추출수단(10)의 출력인 동기클럭 최종신호를 입력으로 받아 메시지 데이다 최종 신호를 추출해 내는 메시지 데이타 추출수단(2)으로 구성된 것을 특징으로 하는 다중화 신호 추출회로.In the internal communication device of an electronic switch, a synchronization clock signal extraction means (1) for receiving a triplex synchronization signal input from a serial bus (D-bus) as an input and extracting the final signal of the synchronization clock, the synchronization clock An output line 3 connected to the signal extracting means 1, a tripled message data signal connected to the output line 3 and input from a serial bus and a synchronous clock final output of the synchronous clock extracting means 10 A multiplex signal extraction circuit comprising a message data extraction means (2) for receiving a signal as an input and extracting a message dada final signal. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890020553A 1989-12-30 1989-12-30 High confident signal drawing circuit KR920005221B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890020553A KR920005221B1 (en) 1989-12-30 1989-12-30 High confident signal drawing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890020553A KR920005221B1 (en) 1989-12-30 1989-12-30 High confident signal drawing circuit

Publications (2)

Publication Number Publication Date
KR910013971A true KR910013971A (en) 1991-08-08
KR920005221B1 KR920005221B1 (en) 1992-06-29

Family

ID=19294595

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890020553A KR920005221B1 (en) 1989-12-30 1989-12-30 High confident signal drawing circuit

Country Status (1)

Country Link
KR (1) KR920005221B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100378712B1 (en) * 2000-12-27 2003-04-07 엘지전자 주식회사 4 receiving clock selection circuit in time division switch of mobile terminal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100378712B1 (en) * 2000-12-27 2003-04-07 엘지전자 주식회사 4 receiving clock selection circuit in time division switch of mobile terminal

Also Published As

Publication number Publication date
KR920005221B1 (en) 1992-06-29

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