KR910009203Y1 - Vertical deflection control circuit - Google Patents

Vertical deflection control circuit Download PDF

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KR910009203Y1
KR910009203Y1 KR2019870023638U KR870023638U KR910009203Y1 KR 910009203 Y1 KR910009203 Y1 KR 910009203Y1 KR 2019870023638 U KR2019870023638 U KR 2019870023638U KR 870023638 U KR870023638 U KR 870023638U KR 910009203 Y1 KR910009203 Y1 KR 910009203Y1
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circuit
vertical
output
resistor
operational amplifier
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KR2019870023638U
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KR890015190U (en
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조병욱
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삼성전자 주식회사
안시환
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/22Circuits for controlling dimensions, shape or centering of picture on screen
    • H04N3/223Controlling dimensions
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/04Deflection circuits ; Constructional details not otherwise provided for
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00Aspects of display data processing
    • G09G2340/04Changes in size, position or resolution of an image
    • G09G2340/0407Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0414Vertical resolution change
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00Aspects of display data processing
    • G09G2340/04Changes in size, position or resolution of an image
    • G09G2340/0464Positioning
    • G09G2340/0471Vertical positioning

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  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)

Abstract

내용 없음.No content.

Description

연산증폭기를 이용한 수직편향조절회로Vertical Deflection Control Circuit Using Operational Amplifier

제1도는 본 고안의 회로도.1 is a circuit diagram of the present invention.

제2도는 본 고안의 각부에 나타나는 출력파형도.2 is an output waveform diagram showing each part of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings

1 : 수직발진회로 2 : 수직출력회로1: vertical oscillation circuit 2: vertical output circuit

3 : 전치증폭회로 V-DY : 편향코일3: preamplifier circuit V-DY: deflection coil

OP1∼OP3: 연산증폭기 VR : 가변저항OP 1 to OP 3 : Operational amplifier VR: Variable resistor

ZD1, ZD2: 제너다이오드 D1: 다이오드ZD 1 , ZD 2 : Zener Diode D 1 : Diode

R1∼R5: 저항 C1, C2: 콘덴서R 1 to R 5 : resistance C 1 , C 2 : condenser

본 고안은 TV 수상기나 컴퓨터용 모니터등 브라운관을 사용하고 있는 기기에서 연산증폭기와 가변 저항으로 구성된 수진발진회로를 이용하여 톱니타전압을 발생케함으로써 화면의 수직편향을 조절하는 연산증폭기를 이용한 수직편향 조절회로에 관한것이다.The present invention uses vertical oscillation to control the vertical deflection of the screen by generating a sawtooth voltage using a oscillation oscillator circuit composed of an operational amplifier and a variable resistor in a device using a CRT such as a TV receiver or a computer monitor. It is about the control circuit.

종래의 수직편향조절회로는 트랜지스터나 집적회로로 구성되어 있었는데 트랜지스터를 이용한 회로는 수직발진회로와 수직 출력회로가 서로 분리되어 있어서 회로가 상당히 복잡했고 주변 부품들의 영향에 의한 발진주파수의 변동이 생겨 발진주파수의 조정에 어려움이 있었으며 이로인해 신뢰성이 저하되는 결점이 있었고, 집적회로를 사용한 회로는 큰 용량의 콘덴서가 많이 사용되어 비용이 많이 들고 톱니파 전압이 비직선적으로 출력되는 결점이 있었으며 특히 브라운관을 사용한 모니터의 경우 귀선시간의 조정이 불가능해 많은 문자를 디스프레이 하는것이 어려운 결점이 있었다.Conventional vertical deflection control circuits consisted of transistors or integrated circuits, but circuits using transistors are quite complicated because the vertical oscillation circuit and the vertical output circuit are separated from each other, and the oscillation frequency fluctuates due to the influence of peripheral components. There was a difficulty in adjusting the frequency, and there was a drawback in that the reliability was lowered.In the circuit using an integrated circuit, a large capacity capacitor was used, which was expensive, and sawtooth voltage was output non-linearly. In the case of the monitor, it is impossible to adjust the return time, which makes it difficult to display many characters.

본 고안은 이러한 점을 강안하여 연산증폭기를 이용해 수직발진회로, 수직출력회로, 전치증폭회로를 구성하고 수직 동기신호를 증폭하여 수직발진회로에 인가함으로써 출력되는 톱니파 전압에 의해 화면의 수직편향이 조절되고 이 톱니파전압을 구형파 전압으로 바꾸어 다시 수직발진회로에 안가함으로써 상기와 같은 수직편향조절동작이 반복 되도록 안출한 것으로 이를 첨부된 도면에 의하여 보다 상세히 설명하면 다음과 같다.The present invention focuses on these points to configure vertical oscillation circuit, vertical output circuit, preamplifier circuit using operational amplifier, and to adjust vertical deflection of screen by sawtooth voltage output by amplifying vertical synchronizing signal and applying to vertical oscillation circuit. By changing the sawtooth voltage to a square wave voltage and going back to the vertical oscillation circuit, the vertical deflection control operation as described above is repeated.

제1도에서 도시한 바와같이 수직동기신호입력단자(A)는 콘덴서(C1)를 통해 저항(R4), (R5)과 연산증폭기(OP3)로 구성된 전치증폭회로(3)의 입력단자에 연결하고 상기 전치증폭회로(3)의 출력단자는 저항(R3)과 편향코일(V-DY)을 통해 저항(R2) 제너다이오드(ZD1), (ZD2) 연산증폭기(OP2)로 구성된 수직출력회로(2)에 연결함과 아울러 저항(R1) 다이오드(D1) 가변저항(VR) 콘덴서(C2) 연산증폭기(OP1)로 구성된 수직 발진회로(1)의 입력단자에 연결하여 상기 수직발진회로(1)의 출력단자를 상기 수직출력회로(2)의 입력단자에 연결하고 상기 수직출력회로(2)의 출력단자를 상기 전치증폭회로(3)의 입력단자에 연결하여 구성한 것이다.As shown in FIG. 1, the vertical synchronous signal input terminal A is connected to a preamplifier circuit 3 composed of resistors R 4 , R 5 and an operational amplifier OP 3 through a capacitor C 1 . The output terminal of the preamplifier circuit 3 is connected to an input terminal, and the resistor R 2 and the Zener diodes ZD 1 and ZD 2 are provided through the resistor R 3 and the deflection coil V-DY. 2 ) of the vertical oscillation circuit (1) consisting of a resistor (R 1 ) diode (D 1 ) variable resistor (VR) capacitor (C 2 ) operational amplifier (OP 1 ) The output terminal of the vertical oscillation circuit 1 is connected to the input terminal of the vertical output circuit 2 by connecting to an input terminal and the output terminal of the vertical output circuit 2 is the input terminal of the preamplifier circuit 3. It is configured by connecting to.

상기와 같이 구성된 본 고안의 작용효과를 상세히 설명하면 다음과 같다.Referring to the effect of the present invention configured as described above in detail.

수직동기신호잉입력단자(A)로 부터 콘덴서(C1)를 통해 전치증폭회로(3)에 인가된 신호는 상기 전치증폭회로(3)에 의하여 증폭되는데 이때 증폭율은 두 저항값의 비(R5/R4)로 나타낼 수 있으므로 저항(R4), (R5)의 값을 조절하여 상기 전치증폭회로(3)의 증폭율을 조절할 수 있다.The signal applied to the preamplifier circuit 3 from the vertical synchronous signal input terminal A through the capacitor C 1 is amplified by the preamplifier circuit 3, where the amplification ratio is the ratio of the two resistance values ( Since R 5 / R 4 ), the amplification rate of the preamplifier 3 may be adjusted by adjusting the values of the resistors R 4 and R 5 .

한편 이렇게 하여 증폭된 신호는 궤환되어 수직발진회로(1)에 인가되는데 상기 전치증폭회로(3)의 출력전압이 옴(-)의 신호인 경우는 상기 음의 신호에 의해 다이오드(D1)가 차단되어 저항(R1)으로의 전류공급을 차단하므로 가변저항(VR)으로만 전류가 흘러 상기 수직발진회로(1)의 출력파형이 제2a도에 도시한 것과 같은 양(+)의 기울기의 톱니파가 발생되며 이때 양의 기울기의 톱니파가 발생되는데 걸리는 시간을 주사시간(T1)이라고 한다.On the other hand, the signal amplified in this way is fed back to the vertical oscillator circuit 1, and when the output voltage of the preamplifier circuit 3 is a signal of ohm (-), the diode D 1 is driven by the negative signal. It is cut off, so blocking the current supply to the resistance (R 1) flowing a current only to the variable resistor (VR) of the slope of the positive (+) as the output waveform of the vertical oscillation circuit (1) is shown in the 2a Fig. Sawtooth wave is generated and the time taken for generating the sawtooth wave of positive slope is called scanning time (T 1 ).

또한 상기 전치증폭회로(3)의 출력 전압이 양(+)의 신호인 경우는 상기 양의 신호에 의해 다이오드(D1)가 도통되므로 가변저항(VR)과 저항(R1)에 모두 전류가 흘러 상기 수직발진회로(1)의 출력판형이 제2a도에 도시한 것과 같은 음(-)의 기울기의 톱니파가 발생되며 이때 걸리는 시간을 귀선시간(T2)이라고 한다.In addition, when the output voltage of the preamplifier circuit 3 is a positive signal, the diode D 1 is conducted by the positive signal, so that a current is applied to both the variable resistor VR and the resistor R 1 . In this case, a sawtooth wave of negative inclination as shown in FIG. 2A of the output plate shape of the vertical oscillation circuit 1 is generated, and the time taken is called the return time T 2 .

여기서 양의 기울기의 톱니파가 출력되는 주사시간(T1)동안에는 가변저항(VR)을 통해서만 전류가 흐르므로 상기 수직발진회로(1)의 입력 임피이던스가 가변저항(VR)의 저항값이 되어 상기 수직발진회로(1)의 시정수는 상기 가변저항값과 정전용량값의 곱(VR×C2)이 되고 음의 기울기의 톱니파가 출력되는 귀선시간(T2)동안에는가변저항(VR)과 저항(R1)으로 전류가 흐르므로 상기 수직발진회로(1)의 입력 임피이던스가 가변저항(VR)과 저항(R1)을 병렬연결한 저항값(VR//R1)이 되어 상기 수직발진회로(1)의 시정수는 상기 병렬 저항값과 정전용량값의 곱(VR//R1×C2)이 된다.Here, since the current flows only through the variable resistor VR during the scan time T 1 at which the sawtooth wave of the positive slope is output, the input impedance of the vertical oscillation circuit 1 becomes the resistance value of the variable resistor VR so that the vertical The time constant of the oscillation circuit 1 becomes the product of the variable resistance value and the capacitance value (VR × C 2 ) and during the retrace time T 2 at which the sawtooth wave of the negative slope is output, the variable resistance VR and the resistance ( Since the current flows through R 1 ), the input impedance of the vertical oscillation circuit 1 becomes the resistance value VR // R 1 connecting the variable resistor VR and the resistor R 1 in parallel to the vertical oscillation circuit ( The time constant of 1) is the product of the parallel resistance value and the capacitance value (VR // R 1 × C 2 ).

그러므로 가변저항(VR) 저항(R1) 콘덴서(C2)의 값에 의해 발진주파수가 결정되고 가변저항(VR)을 사용하여 주사시간(T1)과 귀선시간(T2)동안의 상기 수직발진회로(1)의 입력 임피이던스를 변동시킴으로써 시정수를 변동하여 발진주파수를 조정할 수 있게 된다.Therefore, the oscillation frequency is determined by the value of the variable resistor (VR) resistor (R 1 ) condenser (C 2 ) and the vertical during the scan time (T 1 ) and retrace time (T 2 ) using the variable resistor (VR). By varying the input impedance of the oscillation circuit 1, the oscillation frequency can be adjusted by varying the time constant.

또한 가변저항(VR)을 사용하여 가변저항(VR)과 저항(R1)의 비를 조절함으로써 귀선시간(T2)을 조절할 수 있는데 만일 가변저항(VR) : 저항(R1)=100 : 1이라면 주사시간(T1)동안의 입력 임피이던스는 VR이 되고 귀선시간(T2)동안의 입력 임피이던스는 대략 R1이 되어 주사시간(T1)과 귀선시간(T2)의 비가 주사시간(T1) : 귀선시간(T2)=100 : 1이 되므로 귀선시간을 조절할 수 있게 된다.In addition, the retrace time (T 2 ) can be adjusted by adjusting the ratio of the variable resistor (VR) and the resistor (R 1 ) using the variable resistor (VR). If the variable resistance (VR): resistance (R 1 ) = 100: If 1 , the input impedance during the scan time T 1 becomes VR and the input impedance during the retrace time T 2 becomes approximately R 1 so that the ratio of the scan time T 1 and the retrace time T 2 is the scan time ( T 1 ): Return time (T 2 ) = 100: 1, so the return time can be adjusted.

한편 상기 수직발진회로(1)에서 출력된 톱니파 전압은 저항(R2)을 통해 편향코일(V-DY)에 톱니파전류를 흐르게 하여 화면의 수직편향을 조절하고 아울러 상기 톱니파전압이 수직출력회로(2)의 연산증폭기(OP2)에 인가되므로 상기 수직출력회로(2)의 출력파형은 제너다이오드(ZD1), (ZD2)에 의해 극성과 진폭이 제한되어 제2b도에 도시한 것과 같은 구형파가 나타나게 되며 이때 상기 수직출력회로(2)에 출력된 구평파의 하이레벨(ZD1)과 로우레벨(-ZD2)은 제너다이오드(ZD1), (ZD2)의 제너전압에 의해서 결성되므로 상기 제너 다이오드(ZD1), (ZD2)의 제너전압을 조절하여 상기 구형파 출력전압을 조정할수 있게 된다.On the other hand, the sawtooth voltage output from the vertical oscillation circuit (1) flows a sawtooth current through the deflection coil (V-DY) through a resistor (R 2 ) to adjust the vertical deflection of the screen and the sawtooth voltage is a vertical output circuit ( Since it is applied to the operational amplifier OP 2 of 2), the output waveform of the vertical output circuit 2 is limited in polarity and amplitude by zener diodes ZD 1 and ZD 2 , as shown in FIG. 2B. The square wave appears, and the high level (ZD 1 ) and low level (-ZD 2 ) of the square wave output to the vertical output circuit 2 are formed by the zener voltages of the zener diodes (ZD 1 ) and (ZD 2 ). Therefore, the square wave output voltage can be adjusted by adjusting the zener voltages of the zener diodes ZD 1 and ZD 2 .

또한 상기 수직출력회로(2)에서 출력된 구형파 신호는 상기 수직출력회로(3)에 의해 증폭된 후 궤환되어 상기 수직발진회로(1)에 인가되고 상기 수직발진회로(1)에서 출력된 톱니파신호는 화면의 수직편향을 조절함과 아울러 다시 상기 수직출력회로(2)에 인가되어 상기와 같은 동작을 반복하게 되므로 간단하게 화면의 수직편향을 조절할 수 있게 된다.In addition, the square wave signal output from the vertical output circuit 2 is amplified by the vertical output circuit 3 and then fed back to the vertical oscillation circuit 1 and output from the vertical oscillation circuit 1. In addition to adjusting the vertical deflection of the screen is applied to the vertical output circuit 2 again to repeat the above operation it is possible to simply adjust the vertical deflection of the screen.

이상에서와 같이 본 고안은 트랜지스터나 집적회로를 사용하는 대신 연산증폭기를 이용하여 회로를 구성함으로써 회로가 상당히 간단해져 원가절감의 효과가 있고 연산 증폭기의 특성때문에 톱니파의 비직선성이 개선되어 신뢰도를 향상시킬 수 있는 이점이 있다.As described above, the present invention is composed of a circuit using an operational amplifier instead of using a transistor or an integrated circuit, the circuit is considerably simpler, resulting in cost savings, and the nonlinearity of the sawtooth wave is improved due to the characteristics of the operational amplifier to improve reliability. There is an advantage that can be improved.

또한 가변저항으로 발진 주파수와 수직귀선시간을 조정할 수 있으므로 수직귀선시간을 단축하여 더욱 많은 문자를 화면에 디스플레이 할 수 있고 제너다이오드로 출력전압의 크기를 조정할 수 있으므로 화면의 크기를 가변하는 것이 용이해지며 특히 톱니파와 구형파를 필요로 하는 모든 전자기기에 이용할 수 있는 이점이 있는 것이다.In addition, the oscillation frequency and vertical retrace time can be adjusted with a variable resistor, so the vertical retrace time can be shortened so that more characters can be displayed on the screen, and the output voltage can be adjusted with zener diode, making it easy to change the screen size. In particular, there is an advantage that can be used in all electronic devices that require sawtooth and square wave.

Claims (1)

수직편향 코일에 톱니파 전류를 흐르게 하여 화면을 수직으로 편향하는 수직편향 회로에 있어서, 수직동기신호를 증폭하기 위해 연산증폭기(OP3) 및 저항(R4), (R5)으로 이루어진 전치 증폭 회로(3)와, 상기 전치증폭회로(3)의 출력단에 연결되어 입력신호의 레벨에 따라 임피던스가 조절되어 귀선 시간 조정이 되도록 한 가변저항(VR)과 저항(R1) 및 다이오드와, 전치증폭회로(3)의 출력신호를 적분하기 위한 콘덴서(C2) 및 연산증폭기(OP1)를 포함하여 구성되어 전자빔을 수직으로 편향시키도록 톱니파 신호를 발생하는 수직 발진 회로(1)와, 상기 수직 발진 회로(1)의 출력단과 편향코일(Y-DY)에 접속되어 입력신호가 제너다이오드(ZD1), (ZD2)의 극성과 기준전압에 의해 진폭이 결정되고, 상기 요인에 따라 톱니파를 구형파로 변환하는 저항(R2)과 연산증폭기(OP2)를 포함하여 이루어져 변환된 구형파를 전치증폭회로(3)에 인가되도록 한 수직 출력 회로(2)와, 로 된 연산증폭기를 이용한 수직 편향 조절 회로.In a vertical deflection circuit for vertically deflecting a screen by flowing a sawtooth current through a vertical deflection coil, a preamplification circuit (3) comprising an operational amplifier (OP3) and resistors (R4) and (R5) to amplify the vertical synchronization signal. And a variable resistor (VR), a resistor (R1) and a diode connected to an output terminal of the preamplifier circuit (3) so that the impedance is adjusted according to the level of the input signal to adjust the return time. A vertical oscillation circuit 1 including a capacitor C2 and an operational amplifier OP1 for integrating an output signal of the vertical oscillation circuit 1 for generating a sawtooth wave signal to vertically deflect the electron beam; A resistor (R2) that is connected to the output terminal and the deflection coil (Y-DY) and whose input signal is amplitude is determined by the polarity and reference voltage of the zener diodes (ZD1) and (ZD2), and converts the sawtooth wave into a square wave according to the above factors. And op amps Made to a vertical output to be applied to the converted square wave to the pre-amplifier circuit 3, the circuit (2), a vertical deflection control circuit of the operational amplifier to.
KR2019870023638U 1987-12-29 1987-12-29 Vertical deflection control circuit KR910009203Y1 (en)

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KR2019870023638U KR910009203Y1 (en) 1987-12-29 1987-12-29 Vertical deflection control circuit

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Application Number Priority Date Filing Date Title
KR2019870023638U KR910009203Y1 (en) 1987-12-29 1987-12-29 Vertical deflection control circuit

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KR890015190U KR890015190U (en) 1989-08-12
KR910009203Y1 true KR910009203Y1 (en) 1991-11-25

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