KR900021456U - Data delay circuit - Google Patents

Data delay circuit

Info

Publication number
KR900021456U
KR900021456U KR2019890007432U KR890007432U KR900021456U KR 900021456 U KR900021456 U KR 900021456U KR 2019890007432 U KR2019890007432 U KR 2019890007432U KR 890007432 U KR890007432 U KR 890007432U KR 900021456 U KR900021456 U KR 900021456U
Authority
KR
South Korea
Prior art keywords
delay circuit
data delay
data
circuit
delay
Prior art date
Application number
KR2019890007432U
Other languages
Korean (ko)
Other versions
KR920001481Y1 (en
Inventor
김기범
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR2019890007432U priority Critical patent/KR920001481Y1/en
Publication of KR900021456U publication Critical patent/KR900021456U/en
Application granted granted Critical
Publication of KR920001481Y1 publication Critical patent/KR920001481Y1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/79—Processing of colour television signals in connection with recording
    • H04N9/87—Regeneration of colour television signals
    • H04N9/89—Time-base error compensation
    • H04N9/896—Time-base error compensation using a digital memory with independent write-in and read-out clock generators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/142—Edging; Contouring

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Pulse Circuits (AREA)
KR2019890007432U 1989-05-31 1989-05-31 Data delay circuit KR920001481Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019890007432U KR920001481Y1 (en) 1989-05-31 1989-05-31 Data delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019890007432U KR920001481Y1 (en) 1989-05-31 1989-05-31 Data delay circuit

Publications (2)

Publication Number Publication Date
KR900021456U true KR900021456U (en) 1990-12-15
KR920001481Y1 KR920001481Y1 (en) 1992-03-05

Family

ID=19286676

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019890007432U KR920001481Y1 (en) 1989-05-31 1989-05-31 Data delay circuit

Country Status (1)

Country Link
KR (1) KR920001481Y1 (en)

Also Published As

Publication number Publication date
KR920001481Y1 (en) 1992-03-05

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Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 19970829

Year of fee payment: 8

LAPS Lapse due to unpaid annual fee