KR900010954A - Cmos반도체장치의 제조방법 - Google Patents

Cmos반도체장치의 제조방법

Info

Publication number
KR900010954A
KR900010954A KR1019890018929A KR890018929A KR900010954A KR 900010954 A KR900010954 A KR 900010954A KR 1019890018929 A KR1019890018929 A KR 1019890018929A KR 890018929 A KR890018929 A KR 890018929A KR 900010954 A KR900010954 A KR 900010954A
Authority
KR
South Korea
Prior art keywords
manufacturing
semiconductor device
cmos semiconductor
cmos
semiconductor
Prior art date
Application number
KR1019890018929A
Other languages
English (en)
Other versions
KR0157609B1 (ko
Inventor
모리야 나카하라
Original Assignee
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 도시바 filed Critical 가부시키가이샤 도시바
Publication of KR900010954A publication Critical patent/KR900010954A/ko
Application granted granted Critical
Publication of KR0157609B1 publication Critical patent/KR0157609B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1019890018929A 1988-12-19 1989-12-19 Cmos반도체장치의 제조방법 KR0157609B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63318637A JPH0824145B2 (ja) 1988-12-19 1988-12-19 Cmos半導体装置の製造方法
JP63-318637 1988-12-19

Publications (2)

Publication Number Publication Date
KR900010954A true KR900010954A (ko) 1990-07-11
KR0157609B1 KR0157609B1 (ko) 1998-10-15

Family

ID=18101362

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890018929A KR0157609B1 (ko) 1988-12-19 1989-12-19 Cmos반도체장치의 제조방법

Country Status (3)

Country Link
US (1) US5075242A (ko)
JP (1) JPH0824145B2 (ko)
KR (1) KR0157609B1 (ko)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5290714A (en) * 1990-01-12 1994-03-01 Hitachi, Ltd. Method of forming semiconductor device including a CMOS structure having double-doped channel regions
US5296392A (en) * 1990-03-06 1994-03-22 Digital Equipment Corporation Method of forming trench isolated regions with sidewall doping
JPH0521368A (ja) * 1991-05-15 1993-01-29 Nec Corp 半導体装置の製造方法
JP2835216B2 (ja) * 1991-09-12 1998-12-14 株式会社東芝 半導体装置の製造方法
DE69332006T2 (de) * 1992-03-25 2002-11-28 Texas Instruments Inc Planares Verfahren unter Verwendung von gemeinsamen Ausrichtungsmarken für die Wannenimplantierungen
US5399508A (en) * 1993-06-23 1995-03-21 Vlsi Technology, Inc. Method for self-aligned punchthrough implant using an etch-back gate
JP3367776B2 (ja) * 1993-12-27 2003-01-20 株式会社東芝 半導体装置
US5814544A (en) * 1994-07-14 1998-09-29 Vlsi Technology, Inc. Forming a MOS transistor with a recessed channel
US5622880A (en) * 1994-08-18 1997-04-22 Sun Microsystems, Inc. Method of making a low power, high performance junction transistor
US5494851A (en) * 1995-01-18 1996-02-27 Micron Technology, Inc. Semiconductor processing method of providing dopant impurity into a semiconductor substrate
JP2762953B2 (ja) * 1995-03-10 1998-06-11 日本電気株式会社 半導体装置の製造方法
US5523246A (en) * 1995-06-14 1996-06-04 United Microelectronics Corporation Method of fabricating a high-voltage metal-gate CMOS device
US5739058A (en) * 1995-12-14 1998-04-14 Micron Technology, Inc. Method to control threshold voltage by modifying implant dosage using variable aperture dopant implants
US5976956A (en) * 1997-04-11 1999-11-02 Advanced Micro Devices, Inc. Method of controlling dopant concentrations using transient-enhanced diffusion prior to gate formation in a device
US6153454A (en) * 1997-07-09 2000-11-28 Advanced Micro Devices, Inc. Convex device with selectively doped channel
US6184096B1 (en) 1997-11-05 2001-02-06 Micron Technology, Inc. Semiconductor processing method of providing dopant impurity into a semiconductor substrate
CN1219328C (zh) * 1998-02-19 2005-09-14 国际商业机器公司 具有改善了注入剂的场效应晶体管及其制造方法
US6455893B1 (en) * 1998-06-26 2002-09-24 Elmos Semiconductor Ag MOS transistor with high voltage sustaining capability and low on-state resistance
US6656822B2 (en) 1999-06-28 2003-12-02 Intel Corporation Method for reduced capacitance interconnect system using gaseous implants into the ILD
US6228694B1 (en) * 1999-06-28 2001-05-08 Intel Corporation Method of increasing the mobility of MOS transistors by use of localized stress regions
JP3621303B2 (ja) * 1999-08-30 2005-02-16 Necエレクトロニクス株式会社 半導体装置及びその製造方法
US6803282B2 (en) * 2001-12-07 2004-10-12 Texas Instruments Incorporated Methods for fabricating low CHC degradation mosfet transistors
US7807555B2 (en) * 2007-07-31 2010-10-05 Intersil Americas, Inc. Method of forming the NDMOS device body with the reduced number of masks
US20170062279A1 (en) * 2015-08-25 2017-03-02 United Microelectronics Corp. Transistor set forming process

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5952849A (ja) * 1982-09-20 1984-03-27 Fujitsu Ltd 半導体装置の製造方法
US4553315A (en) * 1984-04-05 1985-11-19 Harris Corporation N Contact compensation technique
DE3414634A1 (de) * 1984-04-18 1985-10-24 Bruker Medizintechnik Gmbh, 7512 Rheinstetten Verfahren zum anregen einer probe fuer die nmr-tomographie
JP2808620B2 (ja) * 1988-11-16 1998-10-08 ソニー株式会社 半導体装置の製造方法
US5021356A (en) * 1989-08-24 1991-06-04 Delco Electronics Corporation Method of making MOSFET depletion device

Also Published As

Publication number Publication date
JPH0824145B2 (ja) 1996-03-06
US5075242A (en) 1991-12-24
JPH02164062A (ja) 1990-06-25
KR0157609B1 (ko) 1998-10-15

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