KR900004610Y1 - Recording time extension circuit during timer's recording - Google Patents
Recording time extension circuit during timer's recording Download PDFInfo
- Publication number
- KR900004610Y1 KR900004610Y1 KR2019870015429U KR870015429U KR900004610Y1 KR 900004610 Y1 KR900004610 Y1 KR 900004610Y1 KR 2019870015429 U KR2019870015429 U KR 2019870015429U KR 870015429 U KR870015429 U KR 870015429U KR 900004610 Y1 KR900004610 Y1 KR 900004610Y1
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- South Korea
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- recording
- timer
- terminal
- flop
- system controller
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B15/00—Driving, starting or stopping record carriers of filamentary or web form; Driving both such record carriers and heads; Guiding such record carriers or containers therefor; Control thereof; Control of operating function
- G11B15/02—Control of operating function, e.g. switching from recording to reproducing
- G11B15/03—Control of operating function, e.g. switching from recording to reproducing by using counters
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/78—Television signal recording using magnetic recording
- H04N5/782—Television signal recording using magnetic recording on tape
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Electric Clocks (AREA)
Abstract
내용 없음.No content.
Description
첨부도면은 본 고안의 회로도.The accompanying drawings are circuit diagrams of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
10 : 타이머 20 : 시스템 콘트롤로10: Timer 20: By system control
30 : D플립플롭 40 : 클럭 신호 발생부30: D flip-flop 40: clock signal generator
D1-D3: 다이오우드D 1 -D 3 : Diode
본 고안은 비데오 테이프 레코더의 타이머 녹화 제어회로에 관한 것으로 특히 타이머 녹화중 녹화시간을 연장할 수 있도록 구성된 회로에 관한 것이다.The present invention relates to a timer recording control circuit of a video tape recorder, and more particularly to a circuit configured to extend the recording time during timer recording.
종래의 비데오 테이프 레코더에 있어서의 타이머 녹화기능 수행 중에는 타이머 키를 제외한 모든 기능 키가 동작하지 않도록 제어회로가 구성되어 있었다. 따라서 타이머 예약 녹화중 녹화 시간의 단축은 타이머 키를 입력함으로 써 해제가 가능하나, 타이머 예약녹화중 녹화시간은 미리 설정한 시간보다 연장하고자 할 경우에는 진행중인 녹화 동작의 중단 없이는 예약시간 연장이 불가능 하였다.The control circuit is constructed such that all function keys except the timer key do not operate during the timer recording function in the conventional video tape recorder. Therefore, the shortening of recording time during timer reservation recording can be canceled by inputting the timer key.However, if the recording time during timer reservation recording is to be longer than the preset time, it is impossible to extend the reservation time without interrupting the ongoing recording operation. .
즉, 예약 시간에 완료되어 언로딩상태로 복귀되거나 사용자에 의해 전원공급이 차단된 후 다시 전원을 제공급한 상태에서 녹화키나 원 터치 녹화키에 의해 녹화시간 연장이 가능하므로 녹화도중 화면이 끊어지는 문제점이 있었다.In other words, the screen is interrupted during recording because the recording time can be extended by the recording key or one-touch recording key when the power is supplied again after the power supply is cut off after the completion of the scheduled time. There was this.
본 고안은 상기한 문제점을 해결하기 위하여 안출한 것으로써, 타이머 예약 녹화 도중에도 녹화 시간을 연장할 수 있는 회로를 제공하고자 하는것이 본 고안의 목적이다.An object of the present invention is to provide a circuit that can extend the recording time even during timer scheduled recording.
이하 첨부된 도면에 의하여 본 고안을 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
첨부도면은 본 고안의 회로도로서, 타이머(10)의 타이머 녹화단자(TR)는 다이오우드(D1)을 통하여 시스템 콘트롤러(20)의 타이머 녹화단자(TR)와 연결되고, 시스템 콘트롤러(20)의 타이머 제어단자(TC)는 아이오우드(D3)를 통하여 타이머(10)의 타이머제어단자(TC)에 연결된다.The attached drawing is a circuit diagram of the present invention, wherein the timer recording terminal TR of the timer 10 is connected to the timer recording terminal TR of the system controller 20 through the diode D 1 , and the timer of the system controller 20 is connected. The timer control terminal TC is connected to the timer control terminal TC of the timer 10 via the i-wood D 3 .
한편 D플립플롭(30)의 입력단자는 타이머(10)의 타이머 녹화단자(TR)와 연결되고, 출력단자(Q)는 다이오우드(D2)를 통하여 시스템 콘트롤러(20)의 타이머 녹화단자(TR)와 연결되며, 클럭단자(CLK)는 저항(R1)과 스위치(SW)와 콘덴서(C1)를 통하여 전원(Vcc)과 연결된다.Meanwhile, the input terminal of the D flip-flop 30 is connected to the timer recording terminal TR of the timer 10, and the output terminal Q is connected to the timer recording terminal TR of the system controller 20 through the diode D 2 . The clock terminal CLK is connected to the power supply Vcc through a resistor R 1 , a switch SW, and a capacitor C 1 .
상기한 다이오우드(D1-D3)는 역전위 방지용이고, 저항(R1)과 스위치(SW)와 콘덴서(C1)는 클럭신호 발생회로(40)로서 구성되는 것이다.The diodes D 1 -D 3 are for preventing reverse potential, and the resistor R 1 , the switch SW, and the capacitor C 1 are configured as the clock signal generation circuit 40.
상기한 구성을 갖는 본 고안회로의 동작을 설명하면 다음과 같다.Referring to the operation of the subject innovation circuit having the above configuration is as follows.
타이머 예약녹화가 수행되기 전에는 시스템 콘틀롤러(20)의 타이머 제어 단자(TC)는 로우레벨을 유지하고 따라서 타이머(10)의 타이머 녹화단자(TR)도 로우레벨을 유지하게 된다.Before the timer reservation recording is performed, the timer control terminal TC of the system controller 20 maintains the low level, and thus the timer recording terminal TR of the timer 10 also maintains the low level.
이때 타이머 녹화시간에 이르게되면 시스템콘트롤러(20)는 타이머콘트롤단자(TC)로 하이레벨신호를 출력하여 타이머(10)로 입력하게 되고, 이로 인하여 타이머(10)는 타이머 녹화단자(TR)로 하이레벨신호를 출력하여 D플립플롭(30)의 입력단자와 시스템콘트롤러(20)의 타이머 녹화단자로 인가한다.At this time, when the timer recording time is reached, the system controller 20 outputs a high level signal to the timer control terminal TC and inputs it to the timer 10. As a result, the timer 10 goes high to the timer recording terminal TR. The level signal is output and applied to the input terminal of the D flip-flop 30 and the timer recording terminal of the system controller 20.
따라서 시스템 콘트롤러(20)는 상기한 타이머 녹화단자(TR)의 하이레벨 입력 신호에 의해 타이머 녹화를 시작하고, 타이머 녹화시간이 완료되어 타이머(10)의 타이머 녹화단자(TR)로 부터 로우레벨 신호가 출력되어 시스템 콘트롤러(20)의 타이머 녹화단자(TR)로 인가될때까지 녹화 기능을 수행하게 된다.Therefore, the system controller 20 starts timer recording by the high level input signal of the timer recording terminal TR, and the timer recording time is completed, so that the low level signal from the timer recording terminal TR of the timer 10 is completed. Is output to perform the recording function until it is applied to the timer recording terminal TR of the system controller 20.
이러한 타이머 예약녹화 기능 수행중 사용자가 예약녹화 시간을 연장하고자 할 때에는 예약녹화중 어느때나 외부의 스위치(SW)를 한번 누름으로써 예약녹화시간을 연장할 수 있다.When the user wants to extend the reservation recording time while performing the timer reservation recording function, the reservation recording time can be extended by pressing the external switch SW at any time during the reservation recording.
즉 사용자에 의해 스위치(SW)가 온 되면 전원(Vcc)은 저항(R1)및 콘덴서(C1)를 통하여 펄스를 발생시켜 D플립플롭의 클럭단자(CLK)로 인가되도록 한다. 이때 D플립플롭(30)의 입력단자(D)에는 녹화중에는 타이머(10)에 의해 항상 하이레벨 신호가 인가되고 있으므로 클럭단자(CLK)로 펄스가 입력되면 출력단자(Q)로 하이레벨을 출력하게 되는데, 상기한 D플립플롭(30)의 출력단자(Q)의 하이레벨 신호는 예약녹화 시간이 끝나서 타이머(10)의 타이머 녹화단자(TR)로 로우레벨이 출력 되더라도 계속해서 하이레벨상태를 유지하여 시스템 콘트롤러(20)의 타이머 녹화단자로 인가된다.That is, when the switch SW is turned on by the user, the power supply Vcc generates a pulse through the resistor R 1 and the capacitor C 1 to be applied to the clock terminal CLK of the D flip-flop. At this time, since the high level signal is always applied to the input terminal D of the D flip-flop 30 by the timer 10 during recording, a high level is output to the output terminal Q when a pulse is input to the clock terminal CLK. The high level signal of the output terminal Q of the D flip-flop 30 continues to be in the high level even when a low level is output to the timer recording terminal TR of the timer 10 after the reserved recording time is over. Is applied to the timer recording terminal of the system controller 20.
그러므로 시스템 콘트롤러(20)는 타이머 예약 녹화 시간이 끝나더라도 계속 녹화를 수행하게 되며, 모든 녹화가 완료되어 녹화를 중단 하고자 할 때에는 스위치(SW)를 다시한번 입력하여 펄스가 D플립플롭(30)의 클럭단자(CLK)로 인가됨으로써, 이때에는 타이머 녹화가 끝나 D플립플롭(30)입력단자(D)에는 타이머(10)로부터 로우레벨이 인가되어 있으므로, D플립플롭(30)의 출력단자(Q)로 로우레벨을 출력하여 시스템 콘트롤러(20)의 타이머 녹화단자(TR)로 인가하여 비로서 녹화를 멈추게 된다. 이후의 스위치(SW)는 차기의 타이머 예약 녹화 수행전까지는 타이머(10)의 타이머 녹화단자(TR)가 로우레벨을 계속 유지하므로 스위칭 동작이 차단되어 진다.Therefore, the system controller 20 continues to record even when the timer scheduled recording time ends, and when all recording is completed and the recording is to be stopped, the system controller 20 inputs the switch SW again to generate a pulse of the D flip-flop 30. By applying the clock terminal CLK, at this time, the timer recording is finished, and since the low level is applied from the timer 10 to the input terminal D of the D flip-flop 30, the output terminal Q of the D flip-flop 30 is applied. The low level is output to the timer recording terminal TR of the system controller 20 to stop recording. Thereafter, the switch SW is blocked because the timer recording terminal TR of the timer 10 maintains the low level until the next timer reservation recording is performed.
상기한 바와 같이 본 고안에 의하면 D플립플롭 및 간단한 클럭 신호 발생부를 종래의 제어회로에 추가함으로써, 종래에는 불가능하던 타이머 예약 녹화중의 녹화시간 연장을 가능하게 할수 있는 이점이 있다.As described above, according to the present invention, by adding the D flip-flop and the simple clock signal generator to the conventional control circuit, there is an advantage that the recording time can be extended during the timer reservation recording.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019870015429U KR900004610Y1 (en) | 1987-09-09 | 1987-09-09 | Recording time extension circuit during timer's recording |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019870015429U KR900004610Y1 (en) | 1987-09-09 | 1987-09-09 | Recording time extension circuit during timer's recording |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR890007532U KR890007532U (en) | 1989-05-16 |
| KR900004610Y1 true KR900004610Y1 (en) | 1990-05-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019870015429U KR900004610Y1 (en) | 1987-09-09 | 1987-09-09 | Recording time extension circuit during timer's recording |
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| Country | Link |
|---|---|
| KR (1) | KR900004610Y1 (en) |
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1987
- 1987-09-09 KR KR2019870015429U patent/KR900004610Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
|---|---|
| KR890007532U (en) | 1989-05-16 |
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