KR850008729A - 프로그램머블 버퍼 - Google Patents

프로그램머블 버퍼

Info

Publication number
KR850008729A
KR850008729A KR1019850003671A KR850003671A KR850008729A KR 850008729 A KR850008729 A KR 850008729A KR 1019850003671 A KR1019850003671 A KR 1019850003671A KR 850003671 A KR850003671 A KR 850003671A KR 850008729 A KR850008729 A KR 850008729A
Authority
KR
South Korea
Prior art keywords
programmable buffer
programmable
buffer
Prior art date
Application number
KR1019850003671A
Other languages
English (en)
Other versions
KR910000964B1 (ko
Inventor
게리 폴라첵 로버트
Original Assignee
알 씨 에이 코오포레이숀
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 알 씨 에이 코오포레이숀 filed Critical 알 씨 에이 코오포레이숀
Publication of KR850008729A publication Critical patent/KR850008729A/ko
Application granted granted Critical
Publication of KR910000964B1 publication Critical patent/KR910000964B1/ko

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Read Only Memory (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
KR1019850003671A 1984-05-31 1985-05-28 프로그램머블 버퍼 KR910000964B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/615,557 US4612459A (en) 1984-05-31 1984-05-31 Programmable buffer selectively settable to operate in different modes
US615557 1990-11-19

Publications (2)

Publication Number Publication Date
KR850008729A true KR850008729A (ko) 1985-12-21
KR910000964B1 KR910000964B1 (ko) 1991-02-19

Family

ID=24465910

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019850003671A KR910000964B1 (ko) 1984-05-31 1985-05-28 프로그램머블 버퍼

Country Status (3)

Country Link
US (1) US4612459A (ko)
JP (2) JPS619017A (ko)
KR (1) KR910000964B1 (ko)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4771285A (en) * 1985-11-05 1988-09-13 Advanced Micro Devices, Inc. Programmable logic cell with flexible clocking and flexible feedback
US4786904A (en) * 1986-12-15 1988-11-22 Zoran Corporation Electronically programmable gate array having programmable interconnect lines
US4761570A (en) * 1987-02-12 1988-08-02 Harris Corporation Programmable logic device with programmable signal inhibition and inversion means
JPH0197016A (ja) * 1987-10-09 1989-04-14 Fujitsu Ltd 半導体集積回路装置
KR910003593B1 (ko) * 1987-12-30 1991-06-07 삼성전자 주식회사 고집적도 메모리용 모드 선택회로
US4914322A (en) * 1988-12-16 1990-04-03 Advanced Micro Devices, Inc. Polarity option control logic for use with a register of a programmable logic array macrocell
US4912345A (en) * 1988-12-29 1990-03-27 Sgs-Thomson Microelectronics, Inc. Programmable summing functions for programmable logic devices
US5012135A (en) * 1989-05-12 1991-04-30 Plus Logic, Inc. Logic gates with a programmable number of inputs
US5028821A (en) * 1990-03-01 1991-07-02 Plus Logic, Inc. Programmable logic device with programmable inverters at input/output pads
EP0476159B1 (en) * 1990-09-15 1996-12-11 International Business Machines Corporation Programmable neural logic device
US5322812A (en) * 1991-03-20 1994-06-21 Crosspoint Solutions, Inc. Improved method of fabricating antifuses in an integrated circuit device and resulting structure
EP0525840A2 (en) * 1991-06-03 1993-02-03 Koninklijke Philips Electronics N.V. Programmable cell with a programmable component outside the signal path
US5365125A (en) * 1992-07-23 1994-11-15 Xilinx, Inc. Logic cell for field programmable gate array having optional internal feedback and optional cascade
US5646547A (en) * 1994-04-28 1997-07-08 Xilinx, Inc. Logic cell which can be configured as a latch without static one's problem
US5386154A (en) * 1992-07-23 1995-01-31 Xilinx, Inc. Compact logic cell for field programmable gate array chip
US5317211A (en) * 1993-03-05 1994-05-31 Motorola, Inc. Programmable pin for use in programmable logic devices
US5414380A (en) * 1993-04-19 1995-05-09 Motorola, Inc. Integrated circuit with an active-level configurable and method therefor
US5455530A (en) * 1994-03-09 1995-10-03 Cray Computer Corporation Duty cycle control circuit and associated method
US5742178A (en) * 1994-09-14 1998-04-21 Xilinx, Inc. Programmable voltage stabilizing circuit for a programmable integrated circuit device
US5736867A (en) * 1996-06-04 1998-04-07 Cypress Semiconductor Corporation Method and circuit for reconfiguring a buffer
JP2880958B2 (ja) * 1996-07-30 1999-04-12 日本電気アイシーマイコンシステム株式会社 半導体集積回路
US5781032A (en) * 1996-09-09 1998-07-14 International Business Machines Corporation Programmable inverter circuit used in a programmable logic cell
JP3190843B2 (ja) * 1996-12-09 2001-07-23 日本電気株式会社 プログラム可能なバッファ回路
JP3022415B2 (ja) * 1997-07-03 2000-03-21 日本電気株式会社 プログラマブルバッファ回路
US6044417A (en) * 1997-12-31 2000-03-28 Intel Corporation System for controlling operational characteristics of buffer group where capture registers receive control signals in parallel and update registers transfer control signals to buffer group
US8030968B1 (en) * 2010-04-07 2011-10-04 Intel Corporation Staged predriver for high speed differential transmitter
US8930591B2 (en) 2012-06-30 2015-01-06 Silicon Laboratories Inc. Apparatus for improved signal communication in electronic circuitry and associated methods

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3691401A (en) * 1971-03-10 1972-09-12 Honeywell Inf Systems Convertible nand/nor gate
JPS4919744A (ko) * 1972-02-26 1974-02-21
JPS588588B2 (ja) * 1975-05-28 1983-02-16 株式会社日立製作所 半導体集積回路
JPS5848099B2 (ja) * 1976-02-04 1983-10-26 株式会社日立製作所 文字パタ−ン発生装置
GB1549642A (en) * 1976-08-03 1979-08-08 Nat Res Dev Inverters and logic gates employing inverters
JPS5534518A (en) * 1978-09-01 1980-03-11 Nippon Telegr & Teleph Corp <Ntt> Lsi parameter setting system
US4292548A (en) * 1979-07-27 1981-09-29 Instituto Venezolano De Investigaciones Cientificas (Ivic) Dynamically programmable logic circuits
US4482822A (en) * 1980-01-21 1984-11-13 Sharp Kabushiki Kaisha Semiconductor chip selection circuit having programmable level control circuitry using enhancement/depletion-mode MOS devices
JPS5848099U (ja) * 1981-09-24 1983-03-31 日本電気株式会社 チツプセレクト回路
JP2549776B2 (ja) * 1991-08-28 1996-10-30 住友電気工業株式会社 サプライスタンドの自動トラバース装置

Also Published As

Publication number Publication date
JP2665457B2 (ja) 1997-10-22
JPS619017A (ja) 1986-01-16
KR910000964B1 (ko) 1991-02-19
JPH07226098A (ja) 1995-08-22
JPH0554732B2 (ko) 1993-08-13
US4612459A (en) 1986-09-16

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Legal Events

Date Code Title Description
E902 Notification of reason for refusal
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
NORF Unpaid initial registration fee