KR20110077778A - Method of controlling dopant concentration of a amorphous silicon solar cell and a amorphous silicon solar cell prepared thereby - Google Patents
Method of controlling dopant concentration of a amorphous silicon solar cell and a amorphous silicon solar cell prepared thereby Download PDFInfo
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Abstract
Description
본 발명은 비정질 실리콘 태양전지의 도펀트 농도 조절방법 및 그에 의해 제조되는 비정질 실리콘 태양전지에 관한 것으로, 더욱 상세하게는 P층의 도펀트 함량을 조절하여 태양전지의 광전변환효율을 향살시킬 수 있는 비정질 실리콘 태양전지의 도펀트 농도 조절방법 및 그에 의해 제조되는 비정질 실리콘 태양전지에 관한 것이다. The present invention relates to a method for controlling the dopant concentration of an amorphous silicon solar cell, and to an amorphous silicon solar cell manufactured by the same, and more particularly, to control the dopant content of the P layer to improve the photoelectric conversion efficiency of the solar cell The present invention relates to a method for controlling the dopant concentration of a solar cell and an amorphous silicon solar cell manufactured thereby.
최근 고유가 및 환경 문제의 영향으로 신재생 에너지에 대한 관심이 높아지고 있다. 태양광을 전기에너지로 변환하는 광전변환소자인 태양전지는 다른 에너지원과 달리 무한하고 환경친화적이므로 시간이 갈수록 그 중요성이 더해가고 있다. 그러나 아직까지 태양광을 전기에너지로 변환하는 공지의 방법에서는 효율이 부족하므로 화석 연료에 대한 태양 에너지의 대체 가능성을 지연시키고 있다. Recently, interest in renewable energy is increasing due to high oil prices and environmental problems. Unlike other energy sources, solar cells, which are photovoltaic devices that convert sunlight into electrical energy, are endless and environmentally friendly, and their importance is increasing over time. However, the known method of converting solar light into electrical energy is still insufficient, thus delaying the possibility of replacing solar energy with fossil fuels.
일반적으로 PIN형 비정질 실리콘 태양전지는 투명 기판 상에 전면 전극, P층, 수소화된 비정질 실리콘층, N형 비정질 실리콘층 및 후면 전극을 순차적층시킨 구조로 구성된다. 이러한 PIN 비정질 실리콘 태양전지는 플라즈마 화학기상 증착법으로 P, I 및 N층을 제조하는데, 플라즈마 화학기상 증착법이란 도핑가스 및/또는 소스 가스를 동시에 증착실에 유입시킨 후 RF플라즈마로 가스를 여기시켜 증착시키는 방법이다. In general, a PIN-type amorphous silicon solar cell has a structure in which a front electrode, a P layer, a hydrogenated amorphous silicon layer, an N-type amorphous silicon layer, and a rear electrode are sequentially layered on a transparent substrate. The PIN amorphous silicon solar cell manufactures P, I, and N layers by plasma chemical vapor deposition. In the case of plasma chemical vapor deposition, doping gas and / or source gas are simultaneously introduced into the deposition chamber, followed by excitation of the gas with RF plasma. This is how you do it.
P층의 도펀트는 SiH4 가스와 같이 공급되어, 플라즈마에 의하여 기판 위에 증착된다. 증착된 비정질 실리콘 내의 도펀트 함량은 플라즈마의 상태, 공정 온도, 압력 등에 의하여 달라진다. 그러나 이러한 기술은 정확한 도펀트의 농도를 조절하기 어렵고 도펀트의 안정성을 결정할 수 없다. The dopant of the P layer is supplied with SiH 4 gas and deposited on the substrate by plasma. The dopant content in the deposited amorphous silicon depends on the state of the plasma, the process temperature, the pressure, and the like. However, this technique is difficult to control the exact concentration of the dopant and cannot determine the stability of the dopant.
따라서 비정질 실리콘과 결정질 실리콘의 공존으로 광전변환효율은 높으면서도 계면 결함을 감소시키고, 공정과 제조장치가 간편하고 용이하여 경제적인 태양전지의 개발이 요구되고 있다.Therefore, the coexistence of amorphous silicon and crystalline silicon, while reducing the interfacial defects while high photoelectric conversion efficiency, it is required to develop an economical solar cell because the process and manufacturing equipment is simple and easy.
본 발명은 상술한 종래 기술의 문제점을 극복하기 위한 것으로, 본 발명의 하나의 목적은 비정질 실리콘 태양전지의 P층의 도펀트 농도를 조절하여, 태양전지 의 개방전압(Voc) 및 단락전류밀도(Jsc)를 증가시킴으로써 태양전지의 광전변환효율을 개선시킬 수 있는 방법을 제공하는 것이다. The present invention is to overcome the problems of the prior art described above, one object of the present invention is to adjust the dopant concentration of the P layer of the amorphous silicon solar cell, the open voltage (V oc ) and the short-circuit current density ( By increasing the J sc ) to provide a method that can improve the photoelectric conversion efficiency of the solar cell.
본 발명의 다른 목적은 상기 방법에 의해서 제조된 광전변환효율이 우수한 비정질 실리콘 태양전지를 제공하는 것이다. Another object of the present invention is to provide an amorphous silicon solar cell having excellent photoelectric conversion efficiency manufactured by the above method.
본 발명의 하나의 양상은 투명 기판을 준비단계, One aspect of the invention is a step of preparing a transparent substrate,
상기 투명 기판 상에 비정질 실리콘 P층을 증착하는 단계, Depositing an amorphous silicon P layer on the transparent substrate,
상기 비정질 실리콘 P층 위에 알루미늄(Al) 층을 증착하는 단계, Depositing an aluminum (Al) layer on the amorphous silicon P layer,
알루미늄층 증착후 열처리하여 Si-Al 확산에 의한 층을 형성하는 단계; 및 Heat-treating the aluminum layer after deposition to form a layer by Si-Al diffusion; And
P층으로 확산된 Al을 식각하는 단계를 포함하는 비정질 실리콘 태양전지의 도펀트 농도 조절방법에 관한 것이다.A dopant concentration control method of an amorphous silicon solar cell comprising etching the Al diffused into the P layer.
본 발명의 다른 양상은 상기 방법에 의해 형성된 반도체층을 포함하는 비정질 실리콘 태양전지에 관한 것이다. Another aspect of the invention relates to an amorphous silicon solar cell comprising a semiconductor layer formed by the method.
본 발명에 의하면 투명 기판에 증착된 비정질 실리콘 P층에 Al 층을 증착한 다음 이를 제거함으로서 P층내 존재하는 도펀트의 농도를 조절할 수 있다. 또한, 본 발명을 통하여 도펀트 농도를 조절함으로써, 태양전지의 개방전압(Voc) 및 단락 전류밀도(Jsc)를 증가시켜 태양전지의 광전변환효율을 향상시킬 수 있다. According to the present invention, the concentration of the dopant present in the P layer may be controlled by depositing an Al layer on the amorphous silicon P layer deposited on the transparent substrate and then removing the Al layer. In addition, by controlling the dopant concentration through the present invention, it is possible to increase the open voltage (V oc ) and the short-circuit current density (J sc ) of the solar cell to improve the photoelectric conversion efficiency of the solar cell.
아래에서 본 발명에 대하여 더욱 상세하게 설명할 것이다. The present invention will be described in more detail below.
본 발명을 명확하게 설명하기 위해서, 관련된 공지의 범용적인 기능 또는 구성에 대한 상세한 설명은 생략하였으며, 또한, 도면에서 여러 층 및 영역을 명확하게 표현하기 위하여 두께를 확대하여 나타내었다. 또한, 이하에서 사용되는 기술용어 및 과학용어를 포함하는 모든 용어들은 본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자가 일반적으로 이해하는 의미와 동일한 의미를 가진다. In order to clearly describe the present invention, detailed descriptions of related well-known general functions or configurations have been omitted, and in order to clearly express various layers and regions in the drawings, thicknesses are enlarged. In addition, all terms including technical terms and scientific terms used below have the same meaning as commonly understood by one of ordinary skill in the art.
본 발명에서는 비정질 실리콘 태양전지의 개방전압(Voc)과 단락전류밀도(Jsc)를 향상하기 위하여 P층의 도펀트 농도를 조절한다. 이를 위하여 투명 기판 위에 P층을 증착한 다음, 알루미늄(Al) 층을 증착하여 P층의 도펀트 함량을 조절한다. 이와 같은 방법으로 제조된 태양전지는 Jsc와 Voc를 향상시켜 태양전지의 광전변환효율을 개선시킬 수 있다.In the present invention, the dopant concentration of the P layer is controlled to improve the open voltage V oc and the short circuit current density J sc of the amorphous silicon solar cell. For this purpose, a P layer is deposited on the transparent substrate, and then an aluminum (Al) layer is deposited to control the dopant content of the P layer. The solar cell manufactured in this manner can improve the photoelectric conversion efficiency of the solar cell by improving J sc and V oc .
본 발명의 일구현예의 비정질 실리콘 태양전지의 반도체층의 도펀트 농도 조절방법은 투명 기판을 준비단계(S10), 상기 투명 기판 상에 비정질 실리콘 P층을 증착하는 단계(S20), 상기 비정질 실리콘 P층 위에 알루미늄(Al) 층을 증착하는 단계(S30), 알루미늄층 증착 후 열처리하여 Si-Al 확산에 의한 층을 형성하는 단계(S40); 및 P층으로 확산된 Al을 식각하는 단계를 포함한다(S50). In one embodiment, a method of controlling a dopant concentration of a semiconductor layer of an amorphous silicon solar cell includes preparing a transparent substrate (S10), depositing an amorphous silicon P layer on the transparent substrate (S20), and the amorphous silicon P layer. Depositing an aluminum (Al) layer thereon (S30), forming a layer by Si-Al diffusion by heat treatment after deposition of the aluminum layer (S40); And etching Al diffused into the P layer (S50).
다음으로 본 발명의 방법의 각 단계에 대해서 상세하게 설명한다. 도 1은 본 발명의 일실시예에 따른 실리콘 박막 태양전지의 반도체층의 도펀트 농도 조절방법을 설명하기 위한 공정흐름도이고, 도 2는 실리콘 박막 태양전지의 단면개략도이다. Next, each step of the method of the present invention will be described in detail. 1 is a process flow chart for explaining a dopant concentration control method of a semiconductor layer of a silicon thin film solar cell according to an embodiment of the present invention, Figure 2 is a schematic cross-sectional view of a silicon thin film solar cell.
먼저, 도 1에 도시한 바와 같이 투명 기판을 준비한다(S10). 우선, 전처리로서 뒤에 형성될 투명 도전성 박막과의 접합력을 증대시키기 위하여 투명 기판(100)의 표면에 잔존하는 여러 불순물들을 제거한다. 이때, 일례로 투명 기판(100)은 불순물 제거를 위하여 유기 세정액과 DI 세정공정 및 질소가스를 이용한 건조공정을 거쳐 세정할 수 있다. 상기 기판에는 투명 도전성 박막(200)이 적층되는데, 상기 투명 도전성 박막(200)은 인듐틴 옥사이드(ITO), 플로린 도핑된 틴 옥사이드(FTO), ZnO, ZnO:B, ZnO:Al, SnO2, ZnO-Ga, ZnO-Ga2O3, ZnO-Al2O3, SnO2-Sb2O3 등과 같은 투명한 도전물질을 스퍼터링법 또는 MOCVD(Metal Organic Chemical Vapor Deposition)법 등을 이용하여 형성할 수 있으며, 그 두께는 500 내지 10000Å 범위가 바람직하다. First, as illustrated in FIG. 1, a transparent substrate is prepared (S10). First, various impurities remaining on the surface of the
이어서 상기 투명 전극 상에 플라즈마 CVD 공정을 이용하여 상기 비정질 실리콘 P층(310)을 형성한다(S20). 구체적으로는 플라즈마 CVD 챔버 내에 SiH4, H2, CH4, 및 PH3 가스를 공급하면서 플라즈마를 발생시켜 상기 투명전극 상에 비정질 실리콘층을 형성한다. 이와 같은 플라즈마 CVD 공정은 소정의 전력 및 소정의 압력 하에서 소정 양의 가스를 공급하면서 수행하게 되며, 전력과 압력의 세기, 및 공급 되는 가스의 양은 플라즈마 CVD 공정에서 수행되는 통상적인 범위 내이다. 증착온도는 180~220℃ 정도의 범위 내에서 진행하고, 도펀트 가스는 공정가스 SiH4의 50~100% 내에서 공급한다.Subsequently, the amorphous
이어서 상기 비정질 실리콘 P층 위에 Al층을 증착한다(S30). 상기 알루미늄층은 RF 스퍼터링, RF 마그네트론 스퍼터링, DC 스퍼터링, DC 마그네트론 스퍼터링, 유기금속화학증착법(MOCVD), 분자선 증착법(MBE), 레이저 펄스 증착법(PLD) 등과 같은 진공증착법으로 적층할 수 있다. Al층 증착 단계는 불활성가스 분위기에서 Power 150~500 watt, 5mTorr 이하에서 수행된다. Subsequently, an Al layer is deposited on the amorphous silicon P layer (S30). The aluminum layer may be laminated by vacuum deposition such as RF sputtering, RF magnetron sputtering, DC sputtering, DC magnetron sputtering, organometallic chemical vapor deposition (MOCVD), molecular beam deposition (MBE), laser pulse deposition (PLD), and the like. Al layer deposition step is performed at 150 ~ 500 watt, 5mTorr or less in an inert gas atmosphere.
이때, Al이 증착되는 투명 기판(100)의 온도는 상온 내지 220℃의 범위로 형성될 수 있다. 상기 Al의 증착온도가 상온 보다 낮으면 조밀한 Al막을 형성하지 못하거나 Al 막의 두께가 균일하게 조절되기 어렵고, 도펀트의 조절이 어렵다. 상기 투명기판의 온도가 220℃ 보다 높으면 Al 막이 증착되는 동안 하부의 Si 막과 Al의 열적 어닐링 효과로 인하여 Si-Al 층이 공정 중에 형성하게 되어 도펀트의 조절이 어려워지게 된다.At this time, the temperature of the
Al의 증착두께는 P층 두께의 200~500% 범위에서 실시한다. Al 막의 두께를 조절하므로서, 도펀트의 양을 조절하는게 용이하기 때문이다.The deposition thickness of Al is performed in the range of 200 to 500% of the thickness of the P layer. This is because it is easy to control the amount of dopant by adjusting the thickness of the Al film.
알루미늄층 증착 후에는 200~250℃ 범위에서 열처리를 실시하여 비정질 실리콘 층의 Si가 Al 층으로 확산되어 Si-Al 층을 형성한다(S40). After deposition of the aluminum layer is heat-treated in the range of 200 ~ 250 ℃ Si of the amorphous silicon layer is diffused into the Al layer to form a Si-Al layer (S40).
Si-Al 층의 형성은 FT-IR과 FE-SEM을 통하여 확인할 수 있고, Si막 내의 도 펀트의 농도는 SIMS, 전기전도도 등을 통하여 측정하여 평가할 수 있다. The formation of the Si-Al layer can be confirmed through FT-IR and FE-SEM, and the concentration of dopant in the Si film can be measured and evaluated through SIMS, electrical conductivity, and the like.
열처리 과정을 거친 후 잔류하는 Al 성분을 제거하기 위하여 범용 Al 에칭액을 이용하여 Si-Al층과 Al 층을 식각한다(S50). 이때 사용가능한 에칭액은 특별히 제한되지 않는데 일례로 표준 Al 에칭액(Phosphoric acid 80% + Acetic acid 5% + Nitric acid 5% + D.I. water 10%)을 이용하여 식각할 수 있다. In order to remove the Al component remaining after the heat treatment process, the Si-Al layer and the Al layer are etched using a general Al etching solution (S50). At this time, the etching solution that can be used is not particularly limited. For example, the etching solution may be etched using a standard Al etching solution (Phosphoric acid 80% + Acetic acid 5% + Nitric acid 5% + D.I.water 10%).
P형 반도체층 형성 후에는 I형 반도체층을 형성하고, 상기 I형 반도체층 상에 N형 반도체층을 형성한다. 이와 같은 공정에 의해 P형 반도체층(310), I형 반도체층(330) 및 N형 반도체층(350)이 순서대로 적층된 PIN 구조의 광흡수층(300)이 형성된다.After the formation of the P-type semiconductor layer, an I-type semiconductor layer is formed, and an N-type semiconductor layer is formed on the I-type semiconductor layer. By such a process, a
이와 같이 광흡수층(300)을 PIN구조로 형성하게 되면, I형 반도체층(330)이 P형 반도체층(310)과 N형 반도체층(350)에 의해 공핍(depletion)이 되어 내부에 전기장이 발생하게 되고, 태양광에 의해 생성되는 정공 및 전자가 상기 전기장에 의해 드리프트(drift)되어 각각 P형 반도체층(310) 및 N형 반도체층(350)에서 수집되게 된다. When the
다음으로 상기 N형 반도체층(350) 상에 투명도전층을 형성한다. 상기 투명도전층은 ZnO, ZnO:B, ZnO:Al, ZnO:H, Ag와 같은 투명한 도전물질을 스퍼터링법 또는 MOCVD법 등을 이용하여 형성할 수 있다. 상기 투명도전층은 생략하는 것도 가능하지만, 태양전지의 효율증진을 위해서는 상기 투명도전층을 형성하는 것이 바람직하다. 즉, 상기 투명도전층을 형성하게 되면 상기 광흡수층(300)을 투과한 태양광이 투명도전층을 통과하면서 산란을 통해 다양한 각으로 진행하게 되어, 후술하 는 후면전극(500)에서 반사되어 상기 광흡수층(300)으로 재입사되는 광의 비율이 증가될 수 있기 때문이다.Next, a transparent conductive layer is formed on the N-
다음, 상기 투명도전층 상에 후면전극(500)을 형성하여, 태양전지의 제조를 완성한다. 상기 후면전극(500)은 Ag, Al, Ag+Al, Ag+Mg, Ag+Mn, Ag+Sb, Ag+Zn, Ag+Mo, Ag+Ni, Ag+Cu, Ag+Al+Zn 등과 같은 금속을 스크린인쇄법, 잉크젯 인쇄법, 그라비아 인쇄법 또는 미세접촉 인쇄법(microcontact printing)을 이용하여 형성할 수 있다.Next, the
본 발명의 다른 양상은 기판, 상기 기판 상에 형성된 투명 도전성 박막, 상기 투명 도전성 박막 상에 형성된 광흡수층; 및 상기 광흡수층 상에 형성된 후면전극을 포함하는 박막 실리콘 태양전지에 있어서, 상기 광흡수층이 제1항 내지 제4항 중 어느 한 항에 의해 제조된 반도체층을 포함하는 비정질 실리콘 태양전지에 관한 것이다. Another aspect of the invention, the substrate, the transparent conductive thin film formed on the substrate, the light absorption layer formed on the transparent conductive thin film; And a back electrode formed on the light absorbing layer, the light absorbing layer relates to an amorphous silicon solar cell including a semiconductor layer prepared by any one of claims 1 to 4. .
상기와 같은 기판(100) 위에 도전성 박막(200)이 형성되고, 그 위에 광흡수층(300)이 형성된다. 상기 광흡수층(300)은 PN 접합구조, NIP 접합 구조 또는 PIN 접합구조, 멀티스택 광전지 구조일 수 있다. 상기 광흡수층(300)은 비정질 실리콘, 다결정 실리콘, 미세결정질 실리콘, 게르마늄, 갈륨, 실리콘-게르마늄 등의 물질로 이루어진 것이 바람직하다.The conductive
상기 광흡수층(300) 위에는 전도성 물질의 후면전극(500)이 형성된다. 본 발명의 태양전지에서 후면전극(500)은 Ag 또는 Al과 같은 금속을 이용하여 형성되며, 상기 투명 도전성 박막(200) 및 광흡수층(300)을 통과한 태양광은 상기 후면전 극(500)에서 반사되어 상기 광흡수층(300)으로 재입사된다. The
본 발명에서는 상기 후면전극 상에 반사방지막을 형성할 수 있다. 상기 방사방지막은 예를 들면 실리콘질화막, 수소를 포함한 실리콘질화막, 실리콘 산화막, 실리콘 산화질화막, MgF2, ZnS, MgF2, TiO2 및 CeO2 로 이루어진 군에서 선택된 재료를 포함할 수 있다. In the present invention, an anti-reflection film may be formed on the rear electrode. The anti-radiation film may include, for example, a material selected from the group consisting of silicon nitride film, silicon nitride film including hydrogen, silicon oxide film, silicon oxynitride film, MgF 2 , ZnS, MgF 2 , TiO 2 and CeO 2 .
이상과 같이 구성된 태양전지는 다음과 같이 동작한다. 외부에서 빛이 태양전지에 입사되면 광흡수층(300)에서 입사된 광에너지에 의해 전자와 정공이 발생되고, 상기 전자는 N형 실리콘층으로 상기 정공은 P형 실리콘층으로 각기 확산하게 된다. 하전 캐리어의 분극이 일어나면, 반도체의 양측에는 전위차가 생긴다. 이때, 상기 N형 실리콘층과 P형 실리콘층을 결선하게 되면 상기 전자 및 정공의 이동에 의해 전력이 생성되게 된다.The solar cell configured as described above operates as follows. When light is incident on the solar cell from the outside, electrons and holes are generated by the light energy incident from the
이하, 본 발명의 실시예를 들어 더욱 상세하게 설명할 것이나, 이러한 실시예들은 단지 본 발명을 예시하기 위한 것이며 본 발명은 이에 한정되지 않는다.Hereinafter, the embodiments of the present invention will be described in more detail, but these embodiments are only for illustrating the present invention and the present invention is not limited thereto.
실시예Example
유리 기판을 불순물 제거를 위하여 pH 12 이상, 계면활성제 성분의 유기세정액과 DI 세정공정 및 질소가스를 이용한 건조공정을 거쳐 세정하여 준비한다. 이어어 유리 기판은 190℃에서 SiH4:B2H6 = 40:40으로 공정가스를 공급하여 1㎛ 두께의 비정질 실리콘 P층을 증착한다. 상기 P층 위에, 스퍼터링 장비를 이용하여 상 온에서 300nm 두께로 Al을 증착한다. 250℃에서 1시간 동안 튜브식 전기로를 이용하여 열처리를 행한 다음, 표준 Al 에칭액 (Phosphoric acid 80% + Acetic acid 5% + Nitric acid 5% + D.I. water 10%)을 이용하여 Al 층을 식각한다. In order to remove impurities, the glass substrate is washed and prepared through an organic cleaning solution of a surfactant component, a DI washing step, and a drying step using nitrogen gas. Subsequently, the glass substrate was supplied with a process gas at 190 ° C. with SiH 4 : B 2 H 6 = 40:40 to deposit an amorphous silicon P layer having a thickness of 1 μm. On the P layer, Al is deposited to a thickness of 300 nm at room temperature using a sputtering equipment. After heat treatment using a tubular electric furnace at 250 ° C. for 1 hour, the Al layer is etched using a standard Al etching solution (Phosphoric acid 80% + Acetic acid 5% + Nitric acid 5% + DI water 10%).
본 발명으로 제조된 비정질 실리콘 P층을 이용하여 PIN 구조의 비정질 실리콘 태양전지를 제조한 후, 광전변환효율을 측정한다. After preparing an amorphous silicon solar cell having a PIN structure using the amorphous silicon P layer prepared according to the present invention, the photoelectric conversion efficiency is measured.
비교예Comparative example 1 One
유리기판을 실시예 1과 동일한 방법으로 세정한 후, 유리기판 위에 ZnO를 증착해서 투명전극으로 사용하고, 투명 전극위에 실란(SiH4), 메탄가스(CH4) 및 디보란(B2H4)을 이용해서 CVD 방법으로 P층을 형성하였다. P층 위에 진성층으로 실란(SiH4)을 이용해서 a-SiH의 I층을 형성하였다. 다음으로 I층 위에 실란(SiH4)과 포스핀(PH3) 가스를 이용해서 인이 도핑된 N층을 형성하고, N층 위에 스퍼터링방법으로 알루미늄 타겟을 이용하여 Al 전극을 형성시켜서 태양전지를 제조하였다. After cleaning the glass substrate in the same manner as in Example 1, ZnO was deposited on the glass substrate and used as a transparent electrode, and silane (SiH 4 ), methane gas (CH 4 ) and diborane (B 2 H 4 ) were deposited on the transparent electrode. ) Was formed by a CVD method. Using silane (SiH 4) with an intrinsic layer on the P-layer to form a layer I of a-SiH. Next, an N layer doped with phosphorus is formed on the I layer using silane (SiH 4 ) and phosphine (PH 3 ) gas, and an Al electrode is formed on the N layer using an aluminum target by sputtering. Prepared.
Keithley사의 모델명 230 programmable voltage source와 195A 디지탈 멀티미터를 PC에 연결하여 바이패스전압이 OV일 때, 단락전류밀도(Jsc)와 전류가 0mA일 때의 Voc 및 전류-전압곡선으로부터 충실도 및 변환효율을 측정하였다. When connecting a Keithley's Model 230 programmable voltage source and 195A digital multimeter on PC one by-pass voltage is OV, V oc and a current when the short circuit current density (J sc) and the current is 0mA yl-fidelity and converted from the voltage curve The efficiency was measured.
실시예 1은 개방전압이 0.89 V, 단락전류밀도 14.42 mA/cm2, 충실도가 75%, 광전변환효율이 9.62%이었으며, 비교예 1은 개방전압이 0.86 V, 단락전류밀도 14.22 mA/cm2, 충실도가 73% , 광전변환효율이 8.92%를 나타내었다. 따라서, 실시예 1이 비교예 1에 비하여 개방전압 및 단락전류밀도, 충실도가 증가되었고, 그에 따라서 광전변환효율이 향상되었음을 확인할 수 있다.In Example 1, the open voltage was 0.89 V, the short circuit current density was 14.42 mA / cm 2 , the fidelity was 75%, and the photoelectric conversion efficiency was 9.62%. In Comparative Example 1, the open voltage was 0.86 V and the short circuit current density was 14.22 mA / cm 2. , 73% of fidelity and 8.92% of photoelectric conversion efficiency. Therefore, it can be confirmed that Example 1 has an increased open-circuit voltage, short-circuit current density, and fidelity compared to Comparative Example 1, thereby improving photoelectric conversion efficiency.
이상에서 본 발명의 바람직한 구현예를 들어 본 발명을 상세하게 설명하였으나 본 발명은 상술한 구현예에 한정되지 않으며, 본 발명의 기술적 사상의 범위 내에서 본 발명이 속하는 기술 분야의 당업자에 의해 많은 변형이 가능함은 자명할 것이다. 따라서 본 발명의 보호범위는 이하의 특허청구범위에서 청구하는 범위 및 그의 균등한 범위에 의해서 정해져야 할 것이다.Although the present invention has been described in detail with reference to preferred embodiments of the present invention, the present invention is not limited to the above-described embodiments, and many modifications are made by those skilled in the art to which the present invention pertains within the technical spirit of the present invention. This possibility will be self-evident. Therefore, the scope of protection of the present invention should be defined by the scope of the claims and their equivalents.
도 1은 본 발명의 방법에 의한 비정질 실리콘 태양전지의 반도체층 도펀트 농도 조절방법의 각 단계를 순차적으로 도시한 공정흐름도이다. 1 is a process flow diagram sequentially illustrating each step of the method for controlling the semiconductor layer dopant concentration of an amorphous silicon solar cell according to the method of the present invention.
도 2는 본 발명의 방법을 이용하여 제조될 수 있는 비정질 실리콘 박막 태양전지의 단면개략도이다. 2 is a cross-sectional schematic view of an amorphous silicon thin film solar cell that can be fabricated using the method of the present invention.
*도면의 주요 부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *
100: 투명 기판 200: 투명 도전성 박막 100: transparent substrate 200: transparent conductive thin film
300: 광흡수층 310: P층 300: light absorption layer 310: P layer
330: I층 310: N층 500: 후면전극 330: I layer 310: N layer 500: rear electrode
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