KR20100034332A - Method for manufacturing of crystalline substrate, crystalline substrate manufactured thereby, light emitting device including crystalline substrate and manufacturing method thereof - Google Patents
Method for manufacturing of crystalline substrate, crystalline substrate manufactured thereby, light emitting device including crystalline substrate and manufacturing method thereof Download PDFInfo
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- KR20100034332A KR20100034332A KR1020080093400A KR20080093400A KR20100034332A KR 20100034332 A KR20100034332 A KR 20100034332A KR 1020080093400 A KR1020080093400 A KR 1020080093400A KR 20080093400 A KR20080093400 A KR 20080093400A KR 20100034332 A KR20100034332 A KR 20100034332A
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- 239000000758 substrate Substances 0.000 title claims abstract description 94
- 238000000034 method Methods 0.000 title claims abstract description 48
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 239000013078 crystal Substances 0.000 claims abstract description 62
- 230000002265 prevention Effects 0.000 claims abstract description 33
- 239000004065 semiconductor Substances 0.000 claims description 28
- 229920002120 photoresistant polymer Polymers 0.000 claims description 22
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 14
- 238000001312 dry etching Methods 0.000 claims description 8
- 238000001039 wet etching Methods 0.000 claims description 8
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 6
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 6
- 238000005498 polishing Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 229910010272 inorganic material Inorganic materials 0.000 claims description 2
- 239000011147 inorganic material Substances 0.000 claims description 2
- 238000002248 hydride vapour-phase epitaxy Methods 0.000 claims 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims 2
- 229910002601 GaN Inorganic materials 0.000 abstract description 19
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 abstract description 8
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 9
- 230000007547 defect Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000001451 molecular beam epitaxy Methods 0.000 description 4
- 238000001953 recrystallisation Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000000927 vapour-phase epitaxy Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000001723 curing Methods 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 230000003746 surface roughness Effects 0.000 description 3
- 238000004630 atomic force microscopy Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 150000004820 halides Chemical class 0.000 description 2
- 150000004678 hydrides Chemical class 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 2
- 238000000859 sublimation Methods 0.000 description 2
- 230000008022 sublimation Effects 0.000 description 2
- 239000011800 void material Substances 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000003197 catalytic effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000009477 glass transition Effects 0.000 description 1
- 238000009616 inductively coupled plasma Methods 0.000 description 1
- 238000013035 low temperature curing Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002861 polymer material Substances 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- 239000002096 quantum dot Substances 0.000 description 1
- 230000036632 reaction speed Effects 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02389—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02417—Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02647—Lateral overgrowth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02647—Lateral overgrowth
- H01L21/0265—Pendeoepitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Led Devices (AREA)
- Recrystallisation Techniques (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
The present invention relates to a light emitting device and a single crystal substrate provided therein, and more particularly, to a method of manufacturing a single crystal substrate, a single crystal substrate produced by the same, a light emitting device including the single crystal substrate and a method of manufacturing the same.
The light emitting device is a device using a phenomenon of emitting light when a forward current flows through a PN junction diode of a compound semiconductor, and is mainly used as a light source of a display device. Such a light emitting device does not require a filament such as a light bulb, exhibits excellent characteristics such as being resistant to vibration, having a long lifetime, and having a fast reaction speed.
In order to manufacture a light emitting device having high efficiency, a high quality single crystal substrate having uniform and few defects is required. However, in the conventional substrate, defects such as dislocations exist in the substrate, and the dislocations continuously propagate as crystal growth is performed. In addition, since new potentials are continuously generated and generated, a problem arises in that the surface of the substrate is rough and the quality is poor.
SUMMARY OF THE INVENTION An object of the present invention for solving the above problems is to provide a method of manufacturing a single crystal substrate with minimized defects, a single crystal substrate manufactured thereby, a light emitting device including the single crystal substrate, and a method of manufacturing the same.
SUMMARY OF THE INVENTION The present invention for achieving the above-described first object includes the steps of growing a lower epitaxial layer on a base substrate, selectively removing at least a portion of the dislocation regions in the lower epilayer, dislocation preventing elements in the removed dislocation regions. And forming an upper epitaxial layer on the lower epitaxial layer on which the dislocation preventing element is formed.
Selectively removing at least a portion of the dislocation region may be performed using dry etching or wet etching. The dislocation prevention element may be formed by forming a dislocation prevention layer on the lower epitaxial layer and then planarizing until the lower epitaxial layer is exposed. The dislocation prevention element can be planarized using chemical mechanical polishing or etch back method.
The dislocation prevention element may be formed by forming a photoresist pattern on the lower epi layer outside the removed dislocation region, forming a dislocation prevention film, and then removing the photoresist pattern. The dislocation prevention element may be a metal layer or an inorganic layer. The metal layer may be an Ag layer, an Au layer, or a Pt layer, and the inorganic layer may be a SiN layer, an SiO 2 layer, an HfO 2 layer, or a TiO 2 layer.
The upper epitaxial layer may be formed using MOCVD, MBE, HVPE, or SVPE. The upper epi layer may be a SiC layer, a ZnO layer, a Si layer, a GaAs layer, an NCO layer, a BN layer, an AlN layer, or a GaN layer.
The present invention for achieving the above-described second object is a base substrate, a lower epi layer disposed on the base substrate, having a plurality of grooves on the upper surface, a potential preventing element and the potential preventing element and the potential preventing element located in the groove A single crystal substrate having an upper epi layer disposed on a lower epi layer is provided.
The present invention for achieving the above-mentioned third object is to grow a lower buffer layer on a base substrate, to selectively remove at least a portion of the dislocation regions in the lower buffer layer, to form a dislocation prevention element in the removed dislocation regions A light emitting device comprising the steps of: forming an upper buffer layer on the lower buffer layer on which the potential protection element is formed; forming an active layer on the upper buffer layer; and forming a second type single crystal semiconductor layer on the active layer. It provides a manufacturing method.
The present invention for achieving the above-described fourth object is located on the base substrate, the lower buffer layer having a plurality of grooves in the upper surface, the potential preventing element located in the groove, on the potential preventing element and the lower buffer layer Provided is a light emitting device including an upper buffer layer positioned, an active layer formed on the upper buffer layer, and a second type single crystal semiconductor layer formed on the active layer.
The dislocation region existing in the substrate was etched and removed to form a dislocation preventing element in the groove formed thereby. As a result, it is possible to prevent the potential present in the substrate from being blocked by the dislocation preventing element and propagating to the upper single crystal epilayer. In addition, since the upper single crystal epitaxial layer grows laterally by the grooves formed by removing the dislocation regions, dislocations can be prevented from growing vertically. Therefore, defects in the substrate can be minimized, and since the upper epitaxial layer is grown at a portion with low dislocations, a gallium nitride single crystal substrate having a smooth and uniform surface can be obtained. Accordingly, the efficiency of the light emitting device having such a single crystal substrate can be improved.
As the invention allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the written description.
However, this is not intended to limit the present invention to specific embodiments, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention.
Hereinafter, with reference to the accompanying drawings, it will be described in detail a preferred embodiment of the present invention. Hereinafter, the same reference numerals are used for the same components in the drawings, and duplicate descriptions of the same components are omitted.
Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
1A to 1G are schematic views showing a method of manufacturing a gallium nitride single crystal substrate according to an embodiment of the present invention.
Referring to FIG. 1A, the lower
Referring to FIG. 1B, the selectivity ratio between the region where the potential is formed and the region where the potential is not formed differs due to the difference in crystallinity. Accordingly, at least a portion of the dislocation region in the lower
Referring to FIG. 1C, the
After contacting the lower
Then, the heat and pressure are removed, and the
That is, since the unetched portion of the lower
Referring to FIG. 1D, a
Referring to FIG. 1E, the
Referring to FIG. 1F, the
For example, in the case where the
When forming the
2A is a schematic diagram illustrating a propagation path of a potential in an existing substrate.
Referring to FIG. 2A, a plurality of dislocations exist in the
2B is a schematic diagram illustrating a propagation path of dislocations in a single crystal substrate according to the present invention.
Referring to FIG. 2B, a plurality of potentials may exist in the
Meanwhile, a void 19 may exist in the
3A to 3E are schematic diagrams showing a method of growing a gallium nitride single crystal according to an embodiment of the present invention.
Referring to FIG. 3A, the
Referring to FIG. 3B, the region where the potential is formed and the region where the potential is not formed differ in etching selectivity due to differences in crystallinity. Accordingly, at least a portion of the dislocation region in the
Referring to FIG. 3C, a
Referring to FIG. 3D, the
Referring to FIG. 3E, the
When forming the
4A to 4H are schematic views illustrating a method of manufacturing a light emitting device including a single crystal substrate, and are limited to the unit cell of the light emitting device.
Referring to FIG. 4A, a
Referring to FIG. 4B, the regions where the potential is formed and the region where the potential is not formed differ in etching selectivity from each other due to differences in crystallinity. Therefore, at least a portion of the dislocation region in the
Referring to FIG. 4C, a
The
Referring to FIG. 4D, the
Referring to FIG. 4E, a first type single
Referring to FIG. 4F, an
Referring to FIG. 4G, the second type single
Referring to FIG. 4H, a portion of the second type single
Referring to FIG. 4I, a
Table 1 shows the crystallinity and surface roughness of the single crystal substrate according to the present invention. The crystallinity of the gallium nitride substrate was analyzed by X-ray diffraction (XRD), and the initial θ value between the specimen and the detector was 34.8 °. The surface roughness was also analyzed by atomic force microscopy (AFM).
Crystallinity is a numerical value that determines the quality of a single crystal and can be predicted through the θ value between the specimen and the detector. In other words, if the value of θ is large, crystallinity is low because the X-rays have a large fall angle, and if the value of θ is small, the crystallinity is high because the X-rays have a small fall angle. Therefore, the lower the value of θ, the higher the quality of the single crystal.
As can be seen from the results of Table 1, in the case of θ value, the existing substrate showed a high value as 0.21. On the other hand, in the case of the substrate of the present invention, 0.14 showed a lower value than the conventional substrate. This may indicate that the single crystal quality of the substrate of the present invention is improved compared to the existing substrate.
In addition, in the case of roughness, the existing substrate shows a slightly higher value as 0.75, while the substrate according to the present invention has a low surface roughness as 0.5. Since the roughness can be determined that the lower the value, the better the lateral growth, the substrate according to the present invention can correspond to the result that the growth of the dislocation in the vertical direction is excellent due to the excellent lateral growth.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the present invention as defined by the following claims It can be understood that
1A to 1G are schematic views showing a method of manufacturing a gallium nitride single crystal substrate according to an embodiment of the present invention.
2A is a schematic diagram illustrating a propagation path of a potential in an existing substrate.
2B is a schematic diagram illustrating a propagation path of dislocations in a single crystal substrate according to the present invention.
3A to 3E are schematic diagrams showing a method of growing a gallium nitride single crystal according to an embodiment of the present invention.
4A to 4H are schematic views illustrating a method of manufacturing a light emitting device including a single crystal substrate.
<Description of the symbols for the main parts of the drawings>
10: base substrate 12: lower epitaxial layer
13: groove 17: potential preventing element
18: upper epitaxial layer 30: base substrate
32: buffer layer 34: dislocation prevention element
35: type 1 single crystal semiconductor layer 36: active layer
37: type 2 single crystal semiconductor layer
Claims (25)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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KR1020080093400A KR101146819B1 (en) | 2008-09-23 | 2008-09-23 | Method for Manufacturing of Crystalline Substrate, Crystalline Substrate Manufactured Thereby, Light Emitting Device Including Crystalline Substrate and Manufacturing Method Thereof |
PCT/KR2009/005384 WO2010036002A2 (en) | 2008-09-23 | 2009-09-22 | Method of preparing single crystal substrate, single crystal substrate prepared thereby, light-emitting device including said single crystal substrate and method of preparing same |
Applications Claiming Priority (1)
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KR1020080093400A KR101146819B1 (en) | 2008-09-23 | 2008-09-23 | Method for Manufacturing of Crystalline Substrate, Crystalline Substrate Manufactured Thereby, Light Emitting Device Including Crystalline Substrate and Manufacturing Method Thereof |
Publications (2)
Publication Number | Publication Date |
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KR20100034332A true KR20100034332A (en) | 2010-04-01 |
KR101146819B1 KR101146819B1 (en) | 2012-05-21 |
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012177014A2 (en) * | 2011-06-23 | 2012-12-27 | Lg Innotek Co., Ltd. | Semiconductor device and method for growing semiconductor crystal |
KR20130070454A (en) * | 2011-12-19 | 2013-06-27 | 엘지이노텍 주식회사 | Epitaxial substrate and method for the same |
KR101379290B1 (en) * | 2012-12-28 | 2014-03-27 | 주식회사 루미스탈 | Method for manufacturing gan wafer using in-situ grown aln nucleation layer |
KR20140134375A (en) * | 2013-05-14 | 2014-11-24 | 엘지이노텍 주식회사 | Semiconductor substrate, light emitting device, and Electronic device |
KR20140142842A (en) * | 2013-06-05 | 2014-12-15 | 엘지이노텍 주식회사 | Semiconductor substrate, light emitting device, and Electronic device |
KR20160121837A (en) * | 2015-04-13 | 2016-10-21 | 엘지이노텍 주식회사 | Light emitting device and lighting system |
Families Citing this family (1)
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WO2016197077A1 (en) * | 2015-06-05 | 2016-12-08 | Sensor Electronic Technology, Inc. | Heterostructure with stress controlling layer |
Family Cites Families (7)
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JP3274674B2 (en) * | 2000-05-16 | 2002-04-15 | 士郎 酒井 | Method for manufacturing gallium nitride-based compound semiconductor |
JP3795771B2 (en) * | 2001-06-13 | 2006-07-12 | 日本碍子株式会社 | Group III nitride semiconductor substrate for ELO |
JP3832313B2 (en) * | 2001-11-02 | 2006-10-11 | 日亜化学工業株式会社 | Nitride semiconductor growth method and nitride semiconductor |
JP3884969B2 (en) * | 2002-02-15 | 2007-02-21 | 宣彦 澤木 | Semiconductor light emitting device and manufacturing method thereof |
JP4559190B2 (en) | 2003-11-06 | 2010-10-06 | 昭和電工株式会社 | Compound semiconductor device |
JP4285214B2 (en) | 2003-11-25 | 2009-06-24 | パナソニック電工株式会社 | Light emitting diode element |
KR100809229B1 (en) * | 2006-11-20 | 2008-03-05 | 삼성전기주식회사 | Nitride semiconductor light emitting device and manufacturing method of the same |
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2008
- 2008-09-23 KR KR1020080093400A patent/KR101146819B1/en active IP Right Grant
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- 2009-09-22 WO PCT/KR2009/005384 patent/WO2010036002A2/en active Application Filing
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012177014A2 (en) * | 2011-06-23 | 2012-12-27 | Lg Innotek Co., Ltd. | Semiconductor device and method for growing semiconductor crystal |
WO2012177014A3 (en) * | 2011-06-23 | 2013-04-04 | Lg Innotek Co., Ltd. | Semiconductor device and method for growing semiconductor crystal |
US9525030B2 (en) | 2011-06-23 | 2016-12-20 | Lg Innotek Co., Ltd. | Semiconductor device and method for growing semiconductor crystal |
KR20130070454A (en) * | 2011-12-19 | 2013-06-27 | 엘지이노텍 주식회사 | Epitaxial substrate and method for the same |
KR101379290B1 (en) * | 2012-12-28 | 2014-03-27 | 주식회사 루미스탈 | Method for manufacturing gan wafer using in-situ grown aln nucleation layer |
KR20140134375A (en) * | 2013-05-14 | 2014-11-24 | 엘지이노텍 주식회사 | Semiconductor substrate, light emitting device, and Electronic device |
KR20140142842A (en) * | 2013-06-05 | 2014-12-15 | 엘지이노텍 주식회사 | Semiconductor substrate, light emitting device, and Electronic device |
KR20160121837A (en) * | 2015-04-13 | 2016-10-21 | 엘지이노텍 주식회사 | Light emitting device and lighting system |
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Publication number | Publication date |
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WO2010036002A2 (en) | 2010-04-01 |
WO2010036002A3 (en) | 2010-07-08 |
KR101146819B1 (en) | 2012-05-21 |
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