KR20080090772A

KR20080090772A - Method for operating semiconductor flash memory device

Info

Publication number: KR20080090772A
Application number: KR1020070034043A
Authority: KR
Inventors: 박희식
Original assignee: 주식회사 하이닉스반도체
Priority date: 2007-04-06
Filing date: 2007-04-06
Publication date: 2008-10-09

Abstract

The present invention provides a method of driving a flash memory device that can minimize interference of neighboring cells when programming a flash memory device having an MLC cell. To this end, the present invention provides a flash memory device having a multi-level cell. A driving method comprising: changing a threshold voltage of selected unit cells among a plurality of unit cells to a second threshold voltage; And changing a threshold voltage of the selected unit cells changed to a first threshold voltage to a third threshold voltage, wherein the first threshold voltage has a lower level than the second and third threshold voltages. It provides a driving method.

Description

A method of driving a semiconductor flash memory device {METHOD FOR OPERATING SEMICONDUCTOR FLASH MEMORY DEVICE}

1 is a circuit diagram showing a semiconductor flash memory device.

FIG. 2 is a waveform diagram showing a programming operation of the flash memory device shown in FIG.

3 is a waveform diagram showing a programming operation of a flash memory device according to a preferred embodiment of the present invention;

4 is a flowchart showing a programming operation of the flash memory device shown in FIG.

Explanation of symbols on the main parts of the drawings

PV1, PV2, PV3: reference threshold voltage

MSB: High Bit

LSB: Low bit

The present invention relates to a semiconductor memory device, and more particularly to a flash memory device.

The semiconductor memory device is a semiconductor device for storing data. There are various criteria for classifying semiconductor memory devices, one of which may be classified according to whether data is maintained only when power is supplied. Data is retained while power is supplied, but a semiconductor memory device in which data is lost after the supply of power is terminated is called a volatile memory device. Volatile memory devices include DRAM and SRAM. A semiconductor memory device that retains data even after power supply is terminated is referred to as a nonvolatile semiconductor memory device. Non-volatile semiconductor memory devices include a mask ypyrom, ypyrom, and a flash memory device. As the portability of electronic devices is evolving, the use of nonvolatile memory devices is increasing. In particular, among nonvolatile memory devices, flash memory devices are a semiconductor memory device that is increasingly used because of the convenience of storing and reading data.

Generally, flash memory devices include NAND flash memory devices and NOR flash memory devices. A NOR flash memory device has a structure in which a word line and a bit line are connected to one MOS transistor which is used as a unit memory device. Like a general DRAM, a plurality of bit lines and a plurality of word lines are arranged to cross each other, and a MOS transistor used as a unit memory device is disposed at each crossing point. NAND type flash memory devices have a structure in which MOS transistors, which are used as unit memory elements for high integration of memory devices, are connected in series, that is, adjacent cells share drain or source with each other, thereby forming a string. Therefore, the NOR flash memory device writes and reads data quickly, but is disadvantageous for high integration. The NOR flash memory device writes and reads data slow, but is advantageous for high integration. Recently, as the demand for a semiconductor memory device capable of storing and moving a lot of data is increasing, the use of NAND flash memory devices is increasing.

The process of storing data in a flash memory device includes a program operation and an erase operation. The programming operation refers to a process of changing the threshold voltage of the MOS transistor used as the unit memory device of the flash memory device, and the erasing operation refers to restoring the threshold voltage of the MOS transistor used as the unit memory device. For example, in the programming operation, the threshold voltages of the MOS transistors of the unit memory devices to store data '1' are all lowered to a predetermined level or higher, and the threshold voltages of the MOS transistors of the unit memory devices to store data '0' are kept.

Recently developed NAND flash memory having a multi-level cell (MLC), unlike conventional single-level cells (single-level cell) of any one of 11, 10, 01, 00 in one cell Two bits of data with logic values can be stored. However, a NAND flash memory having a multi-level cell has a very narrow threshold voltage distribution compared to a single-level cell, which is difficult in terms of reliability and process margin.

An object of the present invention is to provide a method of driving a flash memory device that can minimize interference of neighboring cells when programming a flash memory device having an MLC cell.

A method of driving a flash memory device having a multi-level cell, the method comprising: changing a threshold voltage of selected unit cells among a plurality of unit cells to a second threshold voltage; And changing a threshold voltage of the selected unit cells changed to a first threshold voltage to a third threshold voltage, wherein the first threshold voltage has a lower level than the second and third threshold voltages. It provides a driving method.

In addition, the present invention provides a method of driving a flash memory device having a multi-level cell, the method comprising: programming unit cells programmed with a first program voltage among a plurality of unit cells using a second program voltage; Programming unit cells not programmed with the first program voltage to a third programming voltage; Verifying a threshold voltage of a unit cell programmed with the second program voltage as a first threshold voltage; And verifying a threshold voltage of a unit cell programmed with the third program voltage as a second threshold voltage, wherein the first program voltage is lower than the second programming voltage and the third programming voltage. A method of driving a flash memory device is provided.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

1 is a circuit diagram illustrating a semiconductor flash memory device.

As shown in FIG. 1, a NAND flash memory device having a multi-level cell includes a memory cell array 100 and a page buffer 200. The memory cell array 100 includes a plurality of memory cells MC0 to MCn, a drain select transistor DST, a source select transistor SST, N word lines WL0 to WLn, and N bit lines BL0 to BLn. ). The number of memory cells MC0 to MCn connected in series between the drain select transistor DST and the source select transistor SST is 16, 32, and 64 in consideration of the density of the device. This is called a string. A collection of unit cells controlled on one word line is called pages P1, P2, .... Pn.

FIG. 2 is a diagram illustrating a change in threshold voltages of multi-level cells according to a programming operation of a flash memory device having a multi-level cell shown in FIG. 1.

In a flash memory device having an MLC cell, a threshold voltage value changed in a programming operation also varies according to data to be stored. Assuming that two bits of data are stored in one cell, the cell has a total of four kinds of threshold voltages. The data is stored in accordance with the threshold voltages PV1, PV2, and PV3. Symmetric to 01. In the drawings, 0, 1, 2, and 3 steps are indicated. Here, the upper bit of each bit is called an MSB bit, and the lower bit is called an LSB bit.

When programming, program the LSB bit, and program the MSB bit with the LSB bit programmed. The MOS transistor threshold voltage of the unit cell in which the LSB bit of the unit cell in the cell array is to be 0 is changed to have a constant distribution based on the reference threshold voltage PV1. Subsequently, in order to program the MSB bit, the threshold voltage is changed such that the threshold voltages of the unit cells matched with the first data, that is, 10 data, are uniformly distributed based on the reference threshold voltage PV2. In order to program the MSB bit, the threshold voltage is changed so that the threshold voltages of the unit cells matched with the 11 data are uniformly distributed based on the reference threshold voltage PV3. That is to change to three steps. In this process, when changing from 0 to 3, the threshold voltage is changed too much.

In this process, interference of neighboring unit cells occurs, which makes it difficult to properly program in three steps. The interference phenomenon refers to a phenomenon that affects the change of the threshold voltage to be programmed by the changed threshold voltage of the MOS transistor of the unit cell programmed around.

The present invention proposes a method of driving a flash memory device that can minimize interference of neighboring cells.

3 is a waveform diagram illustrating a programming operation of a flash memory device according to an exemplary embodiment of the present invention.

As shown in FIG. 3, in the state where programming of the MSB bit is completed, the threshold voltage is changed to three stages so that the unit cell in the first stage has a constant distribution based on the reference threshold voltage PV3. In addition, the unit cell in step 0 is changed to step 2 by changing the threshold voltage to have a constant distribution based on the reference threshold voltage PV2. Previously, the process of going to step 3 was to go directly to step 3 from step 0, but in the present invention, the first step is to switch to step 1 and then to step 3.

In this way, the change in the threshold voltage is much smaller than before. Therefore, interference caused by unit cells programmed by neighboring unit cells can be reduced.

4 is a flowchart illustrating a programming operation of the flash memory device illustrated in FIG. 3. In particular, it is a flow chart showing the process of programming the MSB bit.

First, the LSB bit is programmed so that the LBS bit of the unit cell has threshold voltages corresponding to 0 and 1. FIG. When the programmed LSB bit of the unit cell is 1, that is, in step 0 (S2), the first programming voltage is applied and the verification process S3 is performed based on the reference threshold voltage PV2. If it passes the verification process (S3), it is determined that the programming has been performed, and if it does not pass the verification process (S3), the second programming voltage is added by applying a constant voltage to the first programming voltage to perform programming and verification work again, and the program Repeat this process until is complete.

When the programmed LSB bit of the unit cell is 0, that is, in the case of the first step (S5), the second prognostic voltage is applied and the verification process S6 is performed based on the reference threshold voltage PV3. If it passes the verification process (S6), it is determined that the programming is completed, and if it does not pass the verification process (S6), the programming voltage plus a constant voltage is added to the second programming voltage to perform programming and verification work again, and the program is completed. Repeat this process until The verification process is performed in a similar manner to the read operation, and a detailed description thereof will be omitted since it is an operation process of a general flash memory device.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

According to the present invention, it is not necessary to abruptly change the threshold voltage during MLC programming, thereby improving the interference phenomena of a cell programmed by neighboring cells. Therefore, the programming process of the flash memory device can be made more reliable.

Claims

In the method of driving a flash memory device having a multi-level cell,

Changing the threshold voltages of the selected unit cells among the plurality of unit cells to a second threshold voltage; And

Changing a threshold voltage of the selected unit cells changed to a first threshold voltage to a third threshold voltage

And a first threshold voltage having a level lower than the second and third threshold voltages.

The method of claim 1,

And the second threshold voltage is higher than the first threshold voltage and lower than the third threshold voltage.

The method of claim 1,

And programming the least significant bit before programming the most significant bit.

The method of claim 2,

The programming of the least significant bit may include changing a threshold voltage of the selected unit cells to a first threshold voltage.

In the method of driving a flash memory device having a multi-level cell,

Programming unit cells programmed with a first program voltage among a plurality of unit cells using a second program voltage;

Programming unit cells not programmed with the first program voltage to a third programming voltage;

Verifying a threshold voltage of a unit cell programmed with the second program voltage as a first threshold voltage; And

Verifying a threshold voltage of a unit cell programmed with the third program voltage as a second threshold voltage,

And wherein the first program voltage is lower than the second programming voltage and the third programming voltage.

The method of claim 5, wherein

If the cells verified as the second and third threshold voltages do not pass the second and third threshold voltages, the program may be programmed using the fourth and fifth program voltages after adding a constant voltage to the second and third program voltages, respectively. Performing;

Performing the second and third verification operations on the unit cells programmed using the fourth and fifth program voltages, respectively; And

Performing a program using the fourth and fifth program voltages and performing the second and third verification operations until the program of the unit cells programmed using the fourth and fifth program voltages is completed. The method of driving a flash memory device further comprising repeating the steps.

The method of claim 6,

And the first threshold voltage is lower than the second threshold voltage.

The method of claim 6,

And programming the least significant bit of the unit cells with the first program voltage and programming the most significant bit of the unit cells with the second and third programming voltages.