KR20030089205A - Liquid Crystal Display and Fabricating Method Thereof - Google Patents
Liquid Crystal Display and Fabricating Method Thereof Download PDFInfo
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- KR20030089205A KR20030089205A KR1020020027310A KR20020027310A KR20030089205A KR 20030089205 A KR20030089205 A KR 20030089205A KR 1020020027310 A KR1020020027310 A KR 1020020027310A KR 20020027310 A KR20020027310 A KR 20020027310A KR 20030089205 A KR20030089205 A KR 20030089205A
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- 238000000034 method Methods 0.000 title claims abstract description 27
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 25
- 239000011368 organic material Substances 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 239000010409 thin film Substances 0.000 claims abstract description 16
- 239000000463 material Substances 0.000 claims abstract description 13
- 239000010408 film Substances 0.000 claims abstract description 12
- 238000004519 manufacturing process Methods 0.000 claims abstract description 12
- 239000010410 layer Substances 0.000 claims description 59
- 229910052751 metal Inorganic materials 0.000 claims description 30
- 239000002184 metal Substances 0.000 claims description 30
- 239000011241 protective layer Substances 0.000 claims description 10
- 238000000059 patterning Methods 0.000 claims description 8
- -1 polyethylene Polymers 0.000 claims description 6
- 239000004698 Polyethylene Substances 0.000 claims description 4
- 229920000573 polyethylene Polymers 0.000 claims description 4
- 238000002161 passivation Methods 0.000 abstract description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 8
- 238000000151 deposition Methods 0.000 description 8
- 238000000206 photolithography Methods 0.000 description 7
- 239000011810 insulating material Substances 0.000 description 5
- 238000004544 sputter deposition Methods 0.000 description 5
- 239000007864 aqueous solution Substances 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 210000002858 crystal cell Anatomy 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- 238000005507 spraying Methods 0.000 description 3
- 241001239379 Calophysus macropterus Species 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910001182 Mo alloy Inorganic materials 0.000 description 2
- 229910016024 MoTa Inorganic materials 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- BCCOBQSFUDVTJQ-UHFFFAOYSA-N octafluorocyclobutane Chemical compound FC1(F)C(F)(F)C(F)(F)C1(F)F BCCOBQSFUDVTJQ-UHFFFAOYSA-N 0.000 description 2
- 235000019407 octafluorocyclobutane Nutrition 0.000 description 2
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/50—Protective arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
Abstract
Description
본 발명은 액정표시장치에 관한 것으로, 특히 공정을 단순화함과 아울러 비용을 절감시킬 수 있는 액정표시장치 및 그 제조방법에 관한 것이다.The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a method for manufacturing the same, which can simplify the process and reduce the cost.
통상적으로, 액정표시장치(Liquid Crystal Display; LCD)는 비디오신호에 따라 액정셀들의 광투과율을 조절하여 화상을 표시하게 된다. 액정표시장치 중 액정셀별로 스위칭소자가 마련된 액티브 매트릭스(Active Matrix) 타입은 동영상을 표시하기에 적합하다. 액티브 매트릭스 타입의 액정표시장치에서 스위칭소자로는 주로 박막트랜지스터(Thin Film Transistor; 이하 "TFT"라 함)가 이용되고 있다.In general, a liquid crystal display (LCD) displays an image by adjusting light transmittance of liquid crystal cells according to a video signal. Among the liquid crystal display devices, an active matrix type in which switching elements are provided for each liquid crystal cell is suitable for displaying a moving image. In the active matrix liquid crystal display device, a thin film transistor (hereinafter referred to as TFT) is mainly used as a switching element.
도 1은 종래의 액정표시장치를 나타내는 평면도이며, 도 2는 도 1에 도시된 하판을 A-A'선을 따라 절취한 단면도이다.FIG. 1 is a plan view illustrating a conventional liquid crystal display, and FIG. 2 is a cross-sectional view taken along the line AA ′ of the lower plate illustrated in FIG. 1.
도 1 및 도 2를 참조하면, 게이트라인(15)과 데이터라인(14)의 교차부에 형성된 TFT와, 게이트라인(15)과 데이터라인(14)의 교차구조로 마련된 화소영역에 형성된 화소전극(28)을 구비한다.Referring to FIGS. 1 and 2, a pixel electrode formed in a pixel region having a TFT formed at an intersection of the gate line 15 and the data line 14 and an intersection structure of the gate line 15 and the data line 14. And (28).
TFT는 하부기판(10) 상에 형성된 게이트전극(12), 게이트절연막(16), 활성층(18), 소스 및 드레인전극(22, 24)이 순차적으로 적층되어 구성된다. 게이트전극(12)은 게이트라인(15)과 연결되며, 소스전극(22)은 데이터라인(14)과 연결된다. 드레인전극(24)은 TFT를 보호하기 위한 보호층(26)에 형성된 컨택홀(29)을 통해 화소전극과 접촉된다.The TFT is formed by sequentially stacking the gate electrode 12, the gate insulating film 16, the active layer 18, the source and drain electrodes 22 and 24 formed on the lower substrate 10. The gate electrode 12 is connected to the gate line 15, and the source electrode 22 is connected to the data line 14. The drain electrode 24 is in contact with the pixel electrode through the contact hole 29 formed in the protective layer 26 for protecting the TFT.
이러한, TFT는 게이트전극(12)에 인가되는 스캔펄스 공급기간동안 데이터라인(14)상의 데이터신호를 화소전극(28)에 공급하여 액정셀을 구동하게 된다.The TFT supplies the data signal on the data line 14 to the pixel electrode 28 to drive the liquid crystal cell during the scan pulse supply period applied to the gate electrode 12.
도 3a 내지 도 3e는 도 2에 도시된 TFT의 제조방법을 단계적으로 도시한 도면이다.3A to 3E are diagrams showing step by step manufacturing methods of the TFT shown in FIG.
도 3a를 참조하면, 게이트전극(12)이 TFT기판(10) 상에 형성된다. 게이트전극(12)은 스퍼터링(sputtering) 등의 방법으로 금속박막을 형성한 후, 습식방법을 포함하는 포토리쏘그래피방법으로 패터닝함으로써 게이트라인(15)과 함께 형성된다. 게이트전극(12)의 재료로는 알루미늄(Al) 또는 구리(Cu) 등의 금속물질이 사용되며, 식각액으로는 (NH4)2S2O8수용액 등이 사용된다.Referring to FIG. 3A, a gate electrode 12 is formed on the TFT substrate 10. The gate electrode 12 is formed together with the gate line 15 by forming a metal thin film by a sputtering method or the like, and then patterning it by a photolithography method including a wet method. As the material of the gate electrode 12, a metal material such as aluminum (Al) or copper (Cu) is used, and an aqueous solution of (NH 4 ) 2 S 2 O 8 is used as an etching solution.
도 3b를 참조하면, 게이트전극(12)이 형성된 TFT기판(10) 상에 게이트절연막(16), 활성층(18) 및 오믹접촉층(20)이 순차적으로 적층된다.Referring to FIG. 3B, the gate insulating layer 16, the active layer 18, and the ohmic contact layer 20 are sequentially stacked on the TFT substrate 10 on which the gate electrode 12 is formed.
게이트절연막(16)은 질화실리콘 또는 산화실리콘의 절연물질을 투명기판(10) 상에 전면 증착함으로써 형성된다. 게이트절연막(16) 상에 비정질실리콘층 및 불순물이 도핑된 비정질실리콘층을 화학기상증착방법(Chemical Vapor Deposition : 이하 "CVD"라 함)을 이용하여 순차적으로 적층한다. 이러한, 비정질실리콘층 및 불순물이 도핑된 비정질실리콘층은 포토리쏘그래피방법으로 패터닝하여 활성층(18)및 오믹접촉층(20)을 형성하게 된다.The gate insulating film 16 is formed by depositing an insulating material of silicon nitride or silicon oxide on the transparent substrate 10. An amorphous silicon layer and an amorphous silicon layer doped with impurities on the gate insulating film 16 are sequentially stacked by using a chemical vapor deposition method (hereinafter referred to as "CVD"). The amorphous silicon layer and the amorphous silicon layer doped with impurities are patterned by photolithography to form the active layer 18 and the ohmic contact layer 20.
도 3c를 참조하면, 게이트절연막(16) 상에 오믹접촉층(18)을 덮도록 소스 및 드레인전극(22,24)이 형성된다. 소스 및 드레인(22,24)전극은 금속층을 게이트절연막(16) 상에 오믹접촉층(20)을 덮도록 CVD방법 또는 스퍼터링(sputtering)방법으로 증착한 후, 포토리쏘그래피방법으로 패터닝함으로써 데이터라인과 함께 형성된다. 소스 및 드레인전극(22,24)은 몰리브덴(Mo), MoW, MoTa 또는 MoNb등의 몰리브덴 합금(Mo alloy)을 사용하고, 식각액으로 (NH4)2S2O8수용액을 사용한다. 이러한 소스 및 드레인전극(22,24)을 마스크를 이용하여 노출된 오믹접촉층(20)을 건식 식각하여 소스 및 드레인전극(22,24) 사이로 활성층(18)이 노출되도록 한다. 상기에서 활성층(18)의 소스 및 드레인전극(22,24)사이의 게이트전극(12)과 대응하는 부분은 채널이 된다.Referring to FIG. 3C, source and drain electrodes 22 and 24 are formed on the gate insulating layer 16 to cover the ohmic contact layer 18. The source and drain electrodes 22 and 24 are formed by depositing a metal layer on the gate insulating layer 16 by the CVD method or the sputtering method to cover the ohmic contact layer 20, and then patterning the photoline by a photolithography method. Is formed together. The source and drain electrodes 22 and 24 use molybdenum alloys such as molybdenum (Mo), MoW, MoTa, or MoNb, and an (NH 4 ) 2 S 2 O 8 aqueous solution as an etching solution. The ohmic contact layer 20 exposed by using the source and drain electrodes 22 and 24 as a mask is dry etched to expose the active layer 18 between the source and drain electrodes 22 and 24. In the above, the portion corresponding to the gate electrode 12 between the source and drain electrodes 22 and 24 of the active layer 18 becomes a channel.
도 3d를 참조하면, 보호층(26)은 절연물질을 전면 증착한 후 패터닝하여 형성된다. 이 경우, 드레인전극(24)을 노출시키는 콘택홀(29)이 형성된다. 보호층(26)은 질화실리콘 또는 산화실리콘등의 무기절연물질 또는 아크릴계(acryl) 유기화합물, 테프론(Teflon), BCB (benzocyclobutene), 사이토프 (cytop) 또는 PFCB(perfluorocyclobutane) 등의 유전상수가 작은 유기절연물로 형성된다.Referring to FIG. 3D, the protective layer 26 is formed by depositing an insulating material on the entire surface and then patterning the insulating layer. In this case, a contact hole 29 exposing the drain electrode 24 is formed. The protective layer 26 has a low dielectric constant such as an inorganic insulating material such as silicon nitride or silicon oxide or an acryl organic compound, Teflon, BCB (benzocyclobutene), cytotope, or perfluorocyclobutane (PFCB). It is formed of an organic insulator.
도 3e를 참고하면, 보호층(26) 상에 화소전극(28)을 형성한다. 화소전극(28)은 투명전도성물질인 인듐-주석-옥사이드(Indium-Tin-Oxide ; 이하 "ITO"라 함), 인듐-아연-옥사이드(Indium-Zinc-Oxide ; 이하 "IZO"라 함), 인듐-주석-아연-옥사이드(Indium-Tin-Zinc-Oxide ; 이하 "ITZO"라 함)들 중 어느 하나의 물질을 스퍼터링 방법으로 증착한 후 포토리쏘그래피 방법으로 패터닝된다. 화소전극(28)은 컨택홀(29)을 통해 드레인전극(24)과 전기적으로 접속된다.Referring to FIG. 3E, the pixel electrode 28 is formed on the protective layer 26. The pixel electrode 28 may be formed of indium-tin-oxide (hereinafter referred to as "ITO"), indium-zinc-oxide (hereinafter referred to as "IZO"), which is a transparent conductive material. A material of any one of indium-tin-zinc-oxide (hereinafter referred to as "ITZO") is deposited by a sputtering method and then patterned by a photolithography method. The pixel electrode 28 is electrically connected to the drain electrode 24 through the contact hole 29.
이러한 액정표시장치의 제조방법에서 화소전극(28)을 형성하기 위해서는 증착, 노광, 현상 공정 등의 여러 복잡한 공정들을 거쳐야 하며, 화소전극(28)을 형성하기 위해 고가의 진공장비를 사용해야 하므로 제조비용이 많이 들게 되는 문제점이 있다.In the manufacturing method of the liquid crystal display device, in order to form the pixel electrode 28, various complicated processes such as deposition, exposure, and development processes must be performed, and expensive vacuum equipment must be used to form the pixel electrode 28. There is a problem that you hear a lot.
따라서, 본 발명의 목적은 공정을 단순화함과 아울러 비용을 절감시킬 수 있는 액정표시장치 및 그 제조방법을 제공하는 데 있다.Accordingly, an object of the present invention is to provide a liquid crystal display and a method of manufacturing the same, which can simplify the process and reduce the cost.
도 1은 종래의 액정표시장치를 나타내는 평면도.1 is a plan view showing a conventional liquid crystal display device.
도 2는 도 1에 도시된 하판을 A-A'선을 따라 절취한 단면도.2 is a cross-sectional view taken along the line AA ′ of the lower plate shown in FIG. 1.
도 3a 내지 도 3e는 도 2에 도시된 TFT의 제조방법을 단계적으로 도시한 단면도.3A to 3E are cross-sectional views showing step by step manufacturing methods of the TFT shown in FIG.
도 4는 본 발명의 실시예에 따른 액정표시장치를 나타내는 도면.4 is a view showing a liquid crystal display device according to an embodiment of the present invention.
도 5는 도 4에 도시된 액정표시장치를 나타내는 단면도.FIG. 5 is a cross-sectional view of the LCD shown in FIG. 4. FIG.
도 6a 내지 도 6e는 도 5에 도시된 제조방법을 단계적으로 도시한 단면도.6A to 6E are cross-sectional views showing the manufacturing method shown in FIG. 5 step by step.
<도면의 주요 부분에 대한 부호의 간단한 설명><Brief description of symbols for the main parts of the drawings>
10,40 : 기판 12,42 : 게이트전극10,40 substrate 12,42 gate electrode
15,45 : 게이트라인 14,44 : 데이터라인15,45 gate line 14,44 data line
16,46 : 게이트절연막 18,48 : 활성층16,46 gate insulating film 18,48 active layer
20,50 : 오믹접촉층 22,52 : 소스전극20,50 Ohmic contact layer 22,52 Source electrode
24,54 : 드레인전극 26,56 : 보호층24, 54 drain electrode 26, 56 protective layer
28 : 화소전극 29 : 컨택홀28: pixel electrode 29: contact hole
60 : 금속벽 62 : 전도성 유기물60 metal wall 62 conductive organic material
상기 목적을 달성하기 위한 본 발명에 따른 액정표시장치는 기판 상의 게이트라인과 데이터라인의 교차부에 형성되는 박막트랜지스터와, 박막트랜지스터를 덮음과 아울러 화소영역을 제외한 게이트라인과 데이터라인 상에 형성되는 보호층과, 화소영역 외각에 형성되는 금속벽과, 화소영역에 잉크젯으로 전도성 유기물을 분사하여 형성됨과 아울러 상기 금속벽과 전기적으로 접속되는 화소전극을 구비하는 것을 특징으로 한다.The liquid crystal display according to the present invention for achieving the above object is a thin film transistor formed on the intersection of the gate line and the data line on the substrate, and is formed on the gate line and the data line excluding the pixel area and covering the thin film transistor A protective layer, a metal wall formed on the outer surface of the pixel region, and a pixel electrode formed by spraying a conductive organic material with an inkjet on the pixel region and electrically connected to the metal wall are provided.
상기 박막트랜지스터는 게이트라인과 연결되며 스캐닝신호가 공급되는 게이트전극과, 게이트전극을 덮도록 기판 상에 전면 증착되는 게이트절연막과, 게이트전극과 중첩되도록 상기 게이트절연막 상에 형성되는 활성층과, 활성층 상에 형성되는 오믹접촉층과, 데이터라인과 연결되도록 오믹접촉층 상에 형성되는 소스전극과, 오믹접촉층 상에 형성되고 상기 소스전극과 소정의 채널을 사이에 두고 대향하며 상기 금속벽과 전기적으로 접속되는 드레인전극을 구비하는 것을 특징으로 한다.The thin film transistor is connected to a gate line, a gate electrode to which a scanning signal is supplied, a gate insulating film deposited on the substrate to cover the gate electrode, an active layer formed on the gate insulating film so as to overlap the gate electrode, and an active layer. An ohmic contact layer formed on the ohmic contact layer, a source electrode formed on the ohmic contact layer so as to be connected to the data line, and formed on the ohmic contact layer to face the source electrode with a predetermined channel therebetween and electrically connected to the metal wall. It is characterized by including a drain electrode to be connected.
본 발명에 따른 액정표시장치의 제조방법은 기판 상의 게이트라인과 데이터라인의 교차부에 박막트랜지스터를 형성하는 단계와, 박막트랜지스터를 덮음과 아울러 화소영역을 제외한 상기 게이트라인과 데이터라인 상에 보호층을 형성하는 단계와, 화소영역 외각에 금속벽을 형성하는 단계와, 화소영역에 잉크젯을 정렬하는 단계와, 화소영역에 잉크젯으로 전도성 유기물을 분사하여 상기 금속벽과 전기적으로 접속되는 화소전극을 형성하는 단계를 포함하는 것을 특징으로 한다.A method of manufacturing a liquid crystal display according to the present invention includes forming a thin film transistor at an intersection of a gate line and a data line on a substrate, covering the thin film transistor, and a protective layer on the gate line and the data line excluding the pixel region. Forming a metal wall outside the pixel region, aligning the ink jet in the pixel region, and forming a pixel electrode electrically connected to the metal wall by spraying a conductive organic material with the ink jet on the pixel region. Characterized in that it comprises a step.
상기 소스 및 드레인전극은 상기 금속벽과 동시에 형성되는 것을 특징으로 하는 한다.The source and drain electrodes may be formed simultaneously with the metal wall.
상기 전도성 유기물은 PEDOT(Polyethylene dioxythiophen) 물질인 것을 특징으로 한다.The conductive organic material is characterized in that the polyethylene dioxythiophen (PEDOT) material.
상기 목적 외에 본 발명의 다른 목적 및 특징들은 첨부한 설명예에 대한 설명을 통하여 명백하게 드러나게 될 것이다.Other objects and features of the present invention in addition to the above objects will become apparent from the description of the accompanying description.
이하, 도 4 내지 6e를 참조하여 본 발명의 바람직한 실시 예에 대하여 설명하기로 한다.Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 6E.
도 4는 본 발명의 실시 예에 따른 액정표시장치를 나타내는 평면도이며, 도 5는 도 4에 도시된 B-B' 선을 따라 절취한 단면도이다.4 is a plan view illustrating a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 5 is a cross-sectional view taken along the line BB ′ of FIG. 4.
도 4 및 도 5를 참조하면, 본 발명에 따른 액정표시장치는 화소영역의 외각을 둘러싸게끔 금속벽(60)을 형성하고, 외각벽인 금속벽(60)의 내부 영역에 전도성 유기물(62)을 채운다. 이때, 전도성 유기물(62)은 잉크젯 방식으로 하부기판(40) 상에 분사된다.4 and 5, the liquid crystal display according to the present invention forms a metal wall 60 so as to surround the outer surface of the pixel region, and the conductive organic material 62 is formed in the inner region of the outer metal wall 60. Fills. In this case, the conductive organic material 62 is sprayed onto the lower substrate 40 by an inkjet method.
이와 아울러, 본 발명에 따른 액정표시장치는 게이트라인과 데이터라인의 교차부에 TFT를 구비한다.In addition, the liquid crystal display according to the present invention includes a TFT at the intersection of the gate line and the data line.
TFT는 하부기판(40) 상에 형성된 게이트전극(42), 게이트절연막(46), 활성층(48), 오믹접촉층(50), 소스 및 드레인전극(52, 54)이 순차적으로 적층되어 구성된다. 게이트전극(42)은 게이트라인(45)과 연결되며, 소스전극(42)은 데이터라인(44)과 연결된다. 드레인전극(54)은 전도성 유기물(62)과 전기적으로 연결된다. 여기서, 소스 및 드레인전극(52, 54)을 형성하면서 동시에 화소영역 외각에 금속벽(60)을 형성하고, 금속벽(60)에 의해 마련된 내부 영역에 전도성 유기물(60)이 형성된다.The TFT is formed by sequentially stacking the gate electrode 42, the gate insulating film 46, the active layer 48, the ohmic contact layer 50, the source and drain electrodes 52 and 54 formed on the lower substrate 40. . The gate electrode 42 is connected to the gate line 45, and the source electrode 42 is connected to the data line 44. The drain electrode 54 is electrically connected to the conductive organic material 62. Here, the source and drain electrodes 52 and 54 are formed, and at the same time, the metal wall 60 is formed outside the pixel region, and the conductive organic material 60 is formed in the inner region provided by the metal wall 60.
이렇게 형성된 TFT는 게이트전극(42)에 인가되는 스캔펄스 공급기간동안 데이터라인(44) 상의 데이터신호를 전도성 유기물(60)에 공급하여 액정셀을 구동한다.The TFT thus formed supplies a data signal on the data line 44 to the conductive organic material 60 during the scan pulse supply period applied to the gate electrode 42 to drive the liquid crystal cell.
도 6a 내지 도 6e는 도 5에 도시된 액정표시장치의 하판 제조방법을 단계적으로 나타내는 도면들이다.6A through 6E are diagrams illustrating a method of manufacturing a lower plate of the liquid crystal display shown in FIG. 5 in steps.
먼저 도 6a를 참조하면, 기판(40) 상에 게이트라인(45) 및 게이트전극(42)이 형성된다. 게이트전극(42)은 게이트라인(45)과 연결된다. 다시 말하면, 게이트라인(45) 및 게이트전극(42)은 스퍼터링(sputtering) 등의 방법으로 금속박막을 증착한 후, 습식방법을 포함하는 포토리쏘그래피방법으로 패터닝함으로써 게이트라인(45)과 함께 형성된다. 게이트전극(42)의 재료로는 알루미늄(Al) 또는 구리(Cu) 등의 금속물질이 사용되며, 식각액으로 (NH4)2S2O8수용액 등이 사용된다.Referring first to FIG. 6A, a gate line 45 and a gate electrode 42 are formed on a substrate 40. The gate electrode 42 is connected to the gate line 45. In other words, the gate line 45 and the gate electrode 42 are formed together with the gate line 45 by depositing a metal thin film by a sputtering method or the like, and then patterning the same by a photolithography method including a wet method. do. As the material of the gate electrode 42, a metal material such as aluminum (Al) or copper (Cu) is used, and an aqueous solution of (NH 4 ) 2 S 2 O 8 is used as an etching solution.
이어서, 도 6b에 도시된 바와 같이 게이트전극(42) 및 게이트라인(45)을 덮도록 기판(40) 상에 게이트절연막(46)을 형성한 후, 활성층(48) 및 오믹접촉층(50)을 형성한다.Subsequently, as shown in FIG. 6B, after the gate insulating layer 46 is formed on the substrate 40 to cover the gate electrode 42 and the gate line 45, the active layer 48 and the ohmic contact layer 50 are formed. To form.
게이트절연막(46)은 질화실리콘 또는 산화실리콘의 절연물질을 기판(40) 상에 전면 증착하여 형성된다. 게이트절연막(46) 상에 비정질실리콘층 및 불순물이 도핑된 비정질실리콘층을 화학기상증착방법(Chemical Vapor Deposition : 이하 "CVD"라 함)을 이용하여 순차적으로 적층한다. 이 비정질실리콘층 및 불순물이 도핑된 비정질실리콘층을 포토리쏘그래피방법으로 패터닝하여 활성층(48) 및 오믹접촉층(50)이 완성된다.The gate insulating layer 46 is formed by depositing an insulating material of silicon nitride or silicon oxide on the substrate 40. An amorphous silicon layer and an amorphous silicon layer doped with impurities are sequentially stacked on the gate insulating layer 46 by using a chemical vapor deposition method (hereinafter referred to as "CVD"). The amorphous silicon layer and the amorphous silicon layer doped with impurities are patterned by a photolithography method to complete the active layer 48 and the ohmic contact layer 50.
도 6c에 도시된 바와 같이, 오믹접촉층(18)을 덮도록 소스 및 드레인전극(52, 54)을 형성함과 아울러 화소영역의 외각에 소스 및 드레인전극(52, 54)과 연결되는 금속벽(60)을 형성한다.As shown in FIG. 6C, the source and drain electrodes 52 and 54 are formed to cover the ohmic contact layer 18, and the metal wall is connected to the source and drain electrodes 52 and 54 at an outer side of the pixel region. Form 60.
소스 및 드레인전극(52, 54)은 금속층을 게이트절연막(46) 상에오믹접촉층(50)을 덮도록 CVD방법 또는 스퍼터링(sputtering)방법으로 증착한 후, 포토리쏘그래피방법으로 패터닝함으로써 형성된다. 소스 및 드레이전극(52, 54)이 형성되는 동시에, 후술될 전도성 유기물이 형성될 영역의 경계를 지어줌과 아울러 전도성 유기물의 전도도를 높이기 위하여 금속벽(60)을 함께 형성한다.The source and drain electrodes 52 and 54 are formed by depositing a metal layer on the gate insulating film 46 by the CVD method or the sputtering method so as to cover the ohmic contact layer 50 and then patterning the photolithography method. . At the same time as the source and drain electrodes 52 and 54 are formed, the metal walls 60 are formed together to define the boundary of the region where the conductive organic material to be described later will be formed and to increase the conductivity of the conductive organic material.
소스 및 드레인전극(52, 54)과 금속벽(60)은 몰리브덴(Mo), MoW, MoTa 또는 MoNb등의 몰리브덴 합금(Mo alloy)으로 형성되며, 패터닝될 때 사용되는 식각액으로 (NH4)2S2O8수용액이 사용된다.The source and drain electrodes 52 and 54 and the metal wall 60 are formed of a molybdenum alloy such as molybdenum (Mo), MoW, MoTa, or MoNb, and used as an etchant used for patterning (NH 4 ) 2 S 2 O 8 aqueous solution is used.
소스 및 드레인전극(52, 54)은 오믹접촉층(50)을 건식 식각하여 소스 및 드레인전극(52, 54) 사이의 활성층(48)이 노출되게 한다. 상기에서 활성층(48)의 소스 및 드레인전극(22, 24) 사이의 게이트전극(42)과 대응하는 부분은 채널이 된다.The source and drain electrodes 52 and 54 dry etch the ohmic contact layer 50 to expose the active layer 48 between the source and drain electrodes 52 and 54. The portion corresponding to the gate electrode 42 between the source and drain electrodes 22 and 24 of the active layer 48 becomes a channel.
이후, 도 6d와 같이 금속벽(60)으로 둘러싸인 화소영역을 제외한 영역에 보호층(56)을 형성한다. 보호층(56)은 절연물질을 기판 상에 전면 증착한 후 패터닝함으로써 형성된다.Thereafter, as shown in FIG. 6D, the passivation layer 56 is formed in an area excluding the pixel area surrounded by the metal wall 60. The protective layer 56 is formed by patterning after depositing an insulating material on the substrate.
도 6e에 도시된 바와 같이, 금속벽(60)의 내부 화소영역의 게이트절연막(46) 상에 전도성 유기물(60)을 형성한다.As shown in FIG. 6E, the conductive organic material 60 is formed on the gate insulating film 46 of the inner pixel region of the metal wall 60.
전도성 유기물(62)은 잉크젯의 용기 내에 PEDOT(Polyethylene dioxythiophen) 물질을 채운 후, 잉크젯의 노즐을 통해 기판(40) 상에 분사시킨다.The conductive organic material 62 is filled with polyethylene dioxythiophen (PEDOT) material in the inkjet container, and then sprayed onto the substrate 40 through a nozzle of the inkjet.
PEDOT 물질은 ITO 물질보다 비저항이 약 10배 정도 더 크므로 금속벽(60)은 전도성 유기물(62)의 저항성분을 보상하는 역할을 한다. PEDOT 물질의 두께가 기존의 ITO 전극보다 두껍게 형성되기는 하지만 PEDOT 물질로 ITO 전극을 대체하는 데는 큰 문제가 없을 것으로 보인다.Since the PEDOT material has a resistivity of about 10 times greater than that of the ITO material, the metal wall 60 serves to compensate for the resistance of the conductive organic material 62. Although the thickness of the PEDOT material is thicker than that of the conventional ITO electrode, there is no problem in replacing the ITO electrode with the PEDOT material.
상기와 같이 화소전극을 형성할 때 잉크젯으로 전도성 유기물(62)을 분사하고 소성하기만 하면 되므로 종래에 비하여 공정의 수가 현저하게 감소함은 물론, 진공장비를 사용할 필요가 없어지므로 고가의 장비에 드는 비용이 줄어들게 된다.When the pixel electrode is formed as described above, the conductive organic material 62 is simply sprayed and fired with an ink jet, and thus, the number of processes is significantly reduced compared to the conventional method. The cost is reduced.
상술한 바와 같이, 본 발명에 따른 액정표시장치 및 그 제조방법은 화소영역외각에 금속벽을 형성하고 그 금속벽으로 둘러싸인 화소영역에 전도성 유기물을 잉크젯으로 분사하여 화소전극을 형성한다. 이에 따라, 본 발명에 따른 액정표시장치 및 그 제조방법은 여러 복잡한 공정들을 거치지 않고 간단히 잉크젯으로 화소전극을 형성할 수 있음과 아울러 종래의 고가 진공장비를 사용하지 않아도 되므로 재료 비용이 절감될 수 있다.As described above, the liquid crystal display device and the method of manufacturing the same according to the present invention form a metal wall outside the pixel region and form a pixel electrode by spraying a conductive organic material with an inkjet on the pixel region surrounded by the metal wall. Accordingly, the liquid crystal display according to the present invention and a method of manufacturing the same can easily form a pixel electrode by inkjet without going through various complicated processes, and material cost can be reduced since a conventional expensive vacuum equipment is not required. .
이상 설명한 내용을 통해 당업자라면 본 발명의 기술사상을 일탈하지 아니하는 범위에서 다양한 변경 및 수정이 가능함을 알 수 있을 것이다. 따라서, 본 발명의 기술적 범위는 명세서의 상세한 설명에 기재된 내용으로 한정되는 것이 아니라 특허 청구의 범위에 의해 정하여져야만 할 것이다.Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.
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| KR0139345B1 (en) * | 1994-02-04 | 1998-06-01 | 김광호 | Liquid crystal transistor |
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