KR20000033515A - Method for producing in plane switching mode liquid crystal display - Google Patents

Method for producing in plane switching mode liquid crystal display Download PDF

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KR20000033515A
KR20000033515A KR1019980050411A KR19980050411A KR20000033515A KR 20000033515 A KR20000033515 A KR 20000033515A KR 1019980050411 A KR1019980050411 A KR 1019980050411A KR 19980050411 A KR19980050411 A KR 19980050411A KR 20000033515 A KR20000033515 A KR 20000033515A
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mask
layer
liquid crystal
crystal display
amorphous silicon
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KR1019980050411A
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KR100556345B1 (en
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권극상
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구본준
엘지.필립스 엘시디 주식회사
론 위라하디락사
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13625—Patterning using multi-mask exposure

Abstract

PURPOSE: A method for producing liquid crystal display is to shorten a production process by using a three time-mask process in simultaneous etching of a double gate, etching of a source/drain and simultaneous etching of a protect film. CONSTITUTION: A method for producing in plane switching mode LCD(liquid crystal display) comprises: a step of forming many metal layers on a transparent substrate(201) and then blocking the metal layers by a first mask to simultaneously etch them to form a gate electrode and a common electrode; a step of continuously depositing an inorganic material, an amorphous silicon and an impure amorphous silicon on the gate electrode and the common electrode; a step of depositing metal on the impure amorphous silicon layer and etching it under a state of being blocked by a second mask to form a source/drain electrode(211) and an ohmic contact layer; a step of forming a protect layer(213) by depositing inorganic or organic layer on the substrate and then patterning it under a state of being blocked by a third mask with the gate insulation film and the semiconductor layer.

Description

횡전계방식 액정표시소자의 제조방법Method of manufacturing a transverse electric field type liquid crystal display device

본 발명은 액정표시소자의 제조방법에 관한 것으로, 특히 3회의 마스크공정만을 사용하는 횡전계방식 액정표시소자의 제조방법에 관한 것이다.The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing a transverse electric field type liquid crystal display device using only three mask processes.

종래 트위스트네마틱모드(twisted nematic mode) 액정표시소자(liquid crystal display device)의 시야각이 좁다는 단점을 해결하고자 최근에는 액정분자를 기판과 거의 수평한 방향으로 배향하여 시야각문제를 해결하는 횡전계방식 액정표시소자(in plane switching mode LCD)가 활발하게 연구되고 있다.In order to solve the disadvantage that the viewing angle of the conventional twisted nematic liquid crystal display device is narrow, recently, the lateral electric field system solves the viewing angle problem by aligning liquid crystal molecules in a substantially horizontal direction with the substrate. Liquid crystal display devices (in plane switching mode LCD) have been actively studied.

도 1(a), (b), (c), (d), 및 (e)는 5회의 마스크공정을 사용하는 종래 횡전계방식 액정표시소자의 제조방법을 나타내는 도면으로서, 도면에서 A-A'선은 박막트랜지스터와 공통전극의 연장선의 단면영역을, B-B'선은 게이트패드와 데이터패드의 연장선의 단면영역을 나타낸다.1 (a), (b), (c), (d), and (e) show a manufacturing method of a conventional transverse electric field type liquid crystal display device using five mask processes, in which A-A The line '' represents the cross-sectional area of the extension line of the thin film transistor and the common electrode, and the line 'B-B' represents the cross-sectional area of the extension line of the gate pad and the data pad.

5회의 마스크공정을 사용하는 종래 횡전계방식 액정표시소자의 제조는 이하의 공정을 따른다.The manufacture of the conventional transverse electric field type liquid crystal display element using five mask processes follows the following process.

먼저, 기판(101) 위에 Al과 같은 금속으로 버스배선(103)을 증착후 포토리소그래피공정에 의해 패터닝하여 첫 번째 게이트를 형성하고(도 1a), 그 위에 Cr 또는 Mo과 같은 금속을 패터닝하여 두 번째 게이트(105)를 형성한다(도 1b). 이때 공통전극(105a)도 함께 형성된다. 계속해서, 게이트전극(105)과 공통전극(105a) 위에 SiNx 또는 SiOx와 같은 물질을 도포하여 게이트절연막(107)을 형성한 후, 상기 게이트전극(105) 위에 비정질실리콘(109) 및 불순물비정질실리콘(도시하지 않음)을 증착 및 패터닝하여 반도체층을 형성하고(도 1c), 상기 반도체층 위에 Cr 또는 Mo과 같은 금속을 스퍼터링방법에 의해 증착 및 패터닝하여 소스/드레인전극(111)을 형성한다(도 1d). 이때 데이터전극(111a)도 함께 형성된다. 마지막으로, 소스/드레인전극(111) 위에 SiNx, SiOx, BCB 또는 아크릴수지와 같은 물질을 도포한 후 패터닝하여 보호막(113)을 형성한다(도 1e). 이때 상기한 물질의 전면 증착 후 게이트 및 데이터패드부에 컨택홀을 형성하기 위하여 마스크가 추가로 필요하게 된다.First, the bus wiring 103 is deposited on a substrate 101 with a metal such as Al, and then patterned by a photolithography process to form a first gate (FIG. 1A), and then a metal such as Cr or Mo is patterned thereon. The first gate 105 is formed (FIG. 1B). At this time, the common electrode 105a is also formed. Subsequently, a gate insulating film 107 is formed by coating a material such as SiNx or SiOx on the gate electrode 105 and the common electrode 105a, and then amorphous silicon 109 and impurity amorphous silicon are formed on the gate electrode 105. A semiconductor layer is formed by depositing and patterning (not shown) (FIG. 1C), and a metal such as Cr or Mo is deposited and patterned on the semiconductor layer by a sputtering method to form a source / drain electrode 111 ( 1d). At this time, the data electrode 111a is also formed. Finally, a material such as SiNx, SiOx, BCB, or acrylic resin is coated on the source / drain electrode 111 and then patterned to form a protective film 113 (FIG. 1E). In this case, a mask is additionally required to form contact holes in the gate and data pad portions after the front deposition of the material.

이상과 같이 5회의 마스크공정을 필요로하는 종래의 횡전계방식 액정표시소자의 제조방법은 공정수가 복잡하여 공정 중에 불량이 다수 발생하고 그에 따라 추가 비용이 요구된다는 단점이 있었다.As described above, the conventional method of manufacturing a transverse electric field type liquid crystal display device which requires five mask processes has a disadvantage in that a large number of defects occur during the process and additional costs are required accordingly.

본 발명은 상기한 종래 기술의 문제점을 해결하기 위한 것으로, 버스와 게이트 배선 및 공통전극을 동일 이중층으로 동시 식각하여 패터닝하고, 소스/드레인 배선 및 전극과 오믹컨택층을 형성한 후 연속적으로 게이트절연막, 반도체층 및 보호막을 패터닝하여 단축된 공정으로 횡전계방식 액정표시소자를 제공하는 것이다.The present invention is to solve the above problems of the prior art, the gate, gate wiring and common electrodes are simultaneously etched and patterned in the same double layer, the source / drain wiring and the electrode and ohmic contact layer is formed continuously and then the gate insulating film To provide a transverse electric field type liquid crystal display device in a shortened process by patterning the semiconductor layer and the protective film.

상기한 목적을 달성하기 위해 본 발명에 따른 횡전계방식 액정표시소자의 제조방법은 제1기판 위에 금속을 적층한 후 제1마스크로 패터닝하여 버스배선과 게이트배선, 공통전극을 형성하는 단계와, 기판 전체에 걸쳐서 무기물, 비정질실리콘 및 불순물 비정질실리콘을 연속 적층하고 상기 불순물비정질실리콘층 위에 금속을 연속증착한 후 제2마스크로 패터닝하여 소스/드레인전극 및 오믹컨택층을 형성하는 단계와, 상기 반도체층 및 소스/드레인전극 위에 무기물 또는 유기물 보호막을 형성한 후 상기 게이트절연막, 반도체층 및 소스/드레인전극을 제3마스크로 패터닝하는 단계로 이루어진다.In order to achieve the above object, a method of manufacturing a transverse electric field liquid crystal display device according to the present invention comprises the steps of forming a bus wiring, a gate wiring and a common electrode by laminating a metal on a first substrate and patterning the first mask; Sequentially depositing inorganic, amorphous silicon, and impurity amorphous silicon over the substrate, depositing a metal on the impurity amorphous silicon layer, and patterning with a second mask to form a source / drain electrode and an ohmic contact layer; and the semiconductor After forming an inorganic or organic protective film on the layer and the source / drain electrode, patterning the gate insulating film, the semiconductor layer and the source / drain electrode with a third mask.

상기한 제조공정에서 제3마스크를 이용한 보호막의 패터닝은 패드영역의 컨택홀 형성 및 채널부의 보호층을 형성할 뿐만 아니라 공통전극과 데이터전극 사이에 형성되는 전기장의 세기를 강하게 하여 액정의 구동특성을 향상시킨다. 또한 패드영역에서의 절연막 삭제로 인하여 스트레스에 의한 금속 패턴의 손상을 방지할 수 있다.The patterning of the passivation layer using the third mask in the above manufacturing process not only forms the contact hole of the pad region and the passivation layer of the channel portion but also increases the strength of the electric field formed between the common electrode and the data electrode, thereby improving the driving characteristics of the liquid crystal. Improve. In addition, damage to the metal pattern due to stress can be prevented by removing the insulating film in the pad region.

비록 도면으로 나타내지는 않았지만 본 발명은 제1기판 전체에 걸쳐서 제1배향막을 도포하고 배향처리하는 단계와, 제2기판에 차광층을 형성하는 단계와, 상기한 차광층 및 제2기판 위에 컬러필터층을 형성하는 단계와, 상기한 컬러필터층 위에 제2배향막을 도포하고 배향처리하는 단계와, 상기한 제1기판과 제2기판 사이에 액정층을 형성하는 단계를 포함하여 이루어진다.Although not shown in the drawings, the present invention provides a method of coating and orienting a first alignment layer over an entire first substrate, forming a light blocking layer on a second substrate, and a color filter layer on the light blocking layer and the second substrate. Forming a liquid crystal layer; forming a liquid crystal layer between the first substrate and the second substrate; and forming a liquid crystal layer between the first substrate and the second substrate.

도 1(a), (b), (c), (d), 및 (e)는 종래 횡전계방식 액정표시소자의 제조방법을 나타내는 도면.1 (a), (b), (c), (d), and (e) are views showing a manufacturing method of a conventional transverse electric field type liquid crystal display device.

도 2(a), (b), 및 (c)는 본 발명에 따른 횡전계방식 액정표시소자의 제조방법을 나타내는 도면.2 (a), 2 (b), and (c) are views showing a method of manufacturing a transverse electric field type liquid crystal display device according to the present invention;

*도면의 주요부분에 대한 부호의 설명** Description of the symbols for the main parts of the drawings *

201 : 기판 203 : 버스배선201: substrate 203: bus wiring

205 : 게이트배선 205 : 게이트절연막205: gate wiring 205: gate insulating film

209 : 비정질실리콘층 211 : 소스/드레인전극209 amorphous silicon layer 211 source / drain electrodes

213 : 보호막213: protective shield

이하, 첨부한 도면을 참조하여 본 발명에 따른 액정표시소자의 제조방법을 상세히 설명한다.Hereinafter, a method of manufacturing a liquid crystal display device according to the present invention will be described in detail with reference to the accompanying drawings.

도 2(a), (b), 및 (c)는 본 발명에 따른 횡전계방식 액정표시소자의 제조방법을 나타내는 도면으로서, 도면에서 A-A'선은 박막트랜지스터와 공통전극의 연장선의 단면영역을, B-B'선은 게이트패드와 데이터패드의 연장선의 단면영역을 나타낸다.2 (a), 2 (b) and 2 (c) show a method of manufacturing a transverse electric field liquid crystal display device according to the present invention, in which the line A-A 'is a cross section of an extension line of a thin film transistor and a common electrode. The line B-B 'represents a cross-sectional area of the extension line of the gate pad and the data pad.

본 발명에 따른 횡전계방식 액정표시소자의 제조는, 우선, 제1기판(110) 위에 Al, Cr 또는 Mo과 같은 금속을 연속증착한 후 제1마스크로 상기 금속층을 블로킹한 상태에서 동시 식각하여 버스배선(203), 게이트(205) 및 공통전극(203a, 205a)을 형성한다(도 2a), 이때, 도면에는 나타내지 않았지만, 게이트배선과 공통배선이 동시에 형성되고, 절연성의 향상을 위해 상기한 게이트전극과 공통전극을 양극산화하여 양극산화막(anodization layer)을 형성할 수 도 있다. 그 후, SiOx나 SiNx와 같은 무기물, 비정질실리콘(a-Si), 불순물 비정질실리콘(n+a-Si)을 PECVD(Plasma Enhanced Chemical Vapor Deposition)방법으로 연속 적층하여 게이트절연막(207), 반도체층(209) 및 오믹컨택층(도시하지 않음)을 형성한 후, 그 위에 Cr 또는 Mo와 같은 금속을 스퍼터링방법으로 적층한 후 제2마스크로 블로킹한 후 식각하여 소스/드레인전극(211), 데이터전극(211a), 및 데이터배선(211b)을 형성하고, 상기한 소스/드레인전극(211)을 마스크로 사용하여 상기한 오믹컨택층을 패터닝한다(도 2b). 이때 박막트랜지스터의 반도체층(209) 위에는 오믹컨택층 식각시 상기한 반도체층(209)이 식각되는 것을 방지하기 위한 식각방지층(etching stopper layer)을 형성할 수도 있다.In the manufacture of the transverse electric field liquid crystal display device according to the present invention, first, by continuously depositing a metal such as Al, Cr or Mo on the first substrate 110, and then simultaneously etching in a state in which the metal layer is blocked with a first mask. The bus wiring 203, the gate 205 and the common electrodes 203a and 205a are formed (FIG. 2A). At this time, although not shown in the drawing, the gate wiring and the common wiring are formed at the same time, and the above-described method is used to improve insulation. Anodization layer may be formed by anodizing the gate electrode and the common electrode. Thereafter, inorganic materials such as SiOx or SiNx, amorphous silicon (a-Si), and impurity amorphous silicon (n + a-Si) are successively stacked by PECVD (Plasma Enhanced Chemical Vapor Deposition) to form a gate insulating film 207 and a semiconductor layer. 209 and an ohmic contact layer (not shown), a metal such as Cr or Mo is deposited thereon by a sputtering method, blocked with a second mask, and then etched to form a source / drain electrode 211 and data. The electrode 211a and the data wiring 211b are formed, and the ohmic contact layer is patterned using the source / drain electrode 211 as a mask (FIG. 2B). In this case, an etching stopper layer may be formed on the semiconductor layer 209 of the thin film transistor to prevent the semiconductor layer 209 from being etched when the ohmic contact layer is etched.

계속해서, SiOx나 SiNx 등과 같은 무기물 또는 BCB(benzocyclobutane)와 같은 유기물을 적층하여 보호막(213)을 형성한 후 제3마스크로 블로킹한 상태에서 식각하여 상기 보호막(213), 게이트절연막(207), 및 비정질실리콘층(209)을 패터닝한다(도 2c). 이때 상기 보호막(213)은 도면에서 나타내듯이 패드영역의 컨택홀(215) 및 반도체층(209)의 보호층을 형성하고, 공통전극(203a, 205a)과 데이터전극(211a)을 보호하는 패턴만 남기고 모두 제거한다.Subsequently, an inorganic material such as SiOx, SiNx or the like or an organic material such as benzocyclobutane (BCB) is stacked to form a protective film 213 and then etched in a blocked state with a third mask to etch the protective film 213, the gate insulating film 207, And the amorphous silicon layer 209 is patterned (FIG. 2C). In this case, as shown in the drawing, the passivation layer 213 forms a passivation layer of the contact hole 215 and the semiconductor layer 209 of the pad region, and only protects the common electrodes 203a and 205a and the data electrode 211a. Remove all that is left.

계속해서, 기판 전체에 걸쳐서 제1배향막을 도포한다. 배향막으로는 폴리이미드(polyimide), 폴리아미드(polyamide)계열의 물질 또는 폴리실록산(polysiloxanecinnamate), 폴리비닐신나메이트(polyvinylcinnamate) 또는 셀루로즈신나메이트(cellulosecinnamate) 등의 광배향물질을 사용한다. 폴리이미드 또는 폴리아미드 계열의 물질을 배향막으로 사용하는 경우에는 배향막의 배향방향을 결정하기 위해 러빙(rubbing)과 같은 기계적인 방법이 사용되지만, 폴리실록산, 폴리비닐신나메이트 또는 셀루로즈신나메이트 등의 광배향물질을 사용하는 경우에는 자외선과 같은 광을 배향막에 조사하여 배향방향을 결정한다. 특히, 광반응성 배향막에 결정되는 배향방향은 조사되는 광의 편광방향과 같이 광의 고유한 성질에 따라 배향방향이 달라지기 때문에, 기계적인 러빙을 사용했을 때 배향막에 먼지나 정전기가 생기는 문제를 해결할 수 있게 된다.Subsequently, a first alignment film is applied over the entire substrate. As the alignment layer, an optical alignment material such as polyimide, polyamide-based material or polysiloxanecinnamate, polyvinylcinnamate or cellulosecinnamate is used. When a polyimide or polyamide-based material is used as the alignment layer, a mechanical method such as rubbing is used to determine the alignment direction of the alignment layer, but light such as polysiloxane, polyvinylcinnamate or cellulose rosincinate is used. In the case of using the alignment material, the alignment direction is determined by irradiating the alignment film with light such as ultraviolet rays. In particular, since the orientation direction determined by the photoreactive alignment layer varies depending on the inherent properties of the light, such as the polarization direction of the irradiated light, it is possible to solve the problem of dust or static electricity generated in the alignment layer when mechanical rubbing is used. do.

이후, 도면으로 나타내지는 않았지만, 상기 기판과 대향하는 기판에 Cr, CrO, 또는 수지 등으로 이루어진 블랙매트릭스, 컬러필터층, 제2배향막을 형성한 후, 제1기판과 제2기판 사이로 액정을 주입하여 횡전계방식 액정표시소자를 완성한다.Subsequently, although not shown in the drawings, a black matrix, a color filter layer, and a second alignment layer made of Cr, CrO, or resin, etc. are formed on a substrate facing the substrate, and then liquid crystal is injected between the first substrate and the second substrate. A transverse electric field liquid crystal display device is completed.

본 발명에 따르면 이중 게이트 동시 식각, 소스/드레인 식각, 및 게이트절연막, 반도체층, 및 보호막의 동시 식각에 3회의 마스크 공정을 사용하여 제조 공정을 단축시키는 것이 가능하다.According to the present invention, it is possible to shorten the manufacturing process by using three mask processes for simultaneous double gate etching, source / drain etching, and simultaneous etching of the gate insulating film, the semiconductor layer, and the protective film.

또한, 본 발명은 상기한 바와같이 게이트절연막, 반도체층, 및 보호막의 동시 식각에 의해 공통전극과 데이터전극 사이에 형성되는 전기장의 세기를 강하게 하여 액정의 구동특성을 향상시킨다.In addition, the present invention improves the driving characteristics of the liquid crystal by increasing the strength of the electric field formed between the common electrode and the data electrode by simultaneous etching of the gate insulating film, the semiconductor layer, and the protective film as described above.

더욱, 패드영역에서의 절연막 삭제로 인하여 스트레스에 의한 금속 패턴의 손상을 방지할 수 있다.Further, damage to the metal pattern due to stress can be prevented due to the removal of the insulating film in the pad region.

Claims (3)

투명기판 위에 복수의 금속층을 형성한 후 제1마스크로 상기 금속층을 블로킹한 상태에서 동시 식각하여 게이트전극 및 공통전극을 형성하는 단계와,Forming a gate electrode and a common electrode by simultaneously etching a plurality of metal layers on the transparent substrate and simultaneously etching the metal layers with a first mask; 상기 게이트전극 및 공통전극 위에 무기물, 비정질실리콘, 불순물 비정질실리콘을 연속 적층하고, 상기 불순물 비정질실리콘층 위에 금속을 적층한 후 제2마스크로 블로킹한 상태에서 식각하여 소스/드레인전극 및 오믹컨택층을 형성하는 단계와,Inorganic, amorphous silicon, and impurity amorphous silicon are sequentially stacked on the gate electrode and the common electrode, and metals are stacked on the impurity amorphous silicon layer, and then, the source / drain electrode and the ohmic contact layer are etched by blocking with a second mask. Forming step, 상기 기판 위에 무기물 또는 유기물을 적층하여 보호막을 형성한 후 상기한 게이트절연막, 반도체층과 함께 제3마스크로 블로킹한 상태에서 패터닝하는 단계로 이루어진 횡전계방식 액정표시소자의 제조방법.Forming a protective film by laminating an inorganic material or an organic material on the substrate, and then patterning the protective film in a state of blocking with the gate insulating film and the semiconductor layer with a third mask. 제1항에 있어서, 상기한 오믹컨택층이 상기한 소스/드레인전극을 마스크로 하여 패터닝되는 것을 특징으로 횡전게방식 액정표시소자의 제조방법.The method of claim 1, wherein the ohmic contact layer is patterned using the source / drain electrode as a mask. 제1항에 있어서, 상기한 게이트절연막과 보호막을 구성하는 물질이 SiOx 및 SiNx로 이루어진 일군으로부터 선택되는 것을 특징으로 하는 횡전계방식 액정표시소자의 제조방법.The method of manufacturing a transverse electric field liquid crystal display device according to claim 1, wherein the material constituting the gate insulating film and the protective film is selected from the group consisting of SiOx and SiNx.
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