KR20000021473A - Wafer mapping system - Google Patents
Wafer mapping system Download PDFInfo
- Publication number
- KR20000021473A KR20000021473A KR1019980040571A KR19980040571A KR20000021473A KR 20000021473 A KR20000021473 A KR 20000021473A KR 1019980040571 A KR1019980040571 A KR 1019980040571A KR 19980040571 A KR19980040571 A KR 19980040571A KR 20000021473 A KR20000021473 A KR 20000021473A
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- wafer
- mapping system
- sensor
- stage
- carrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
- H01L21/67265—Position monitoring, e.g. misposition detection or presence detection of substrates stored in a container, a magazine, a carrier, a boat or the like
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
본 발명은 웨이퍼 맵핑 시스템에 관한 것으로서, 보다 상세하게는 웨이퍼 캐리어는 고정되고 센서가 상하운동을 하여 웨이퍼를 맵핑하는 웨이퍼 맵핑 시스템에 관한 것이다.The present invention relates to a wafer mapping system, and more particularly, to a wafer mapping system in which a wafer carrier is fixed and a sensor moves up and down to map a wafer.
통상, 반도체소자는 증착공정, 사진공정, 식각공정 및 이온주입공정 등의 공정들을 수행하여 이루어진다.In general, a semiconductor device is formed by performing processes such as a deposition process, a photo process, an etching process, and an ion implantation process.
즉, 반도체소자는 웨이퍼 상에 다결정막, 산화막, 질화막 및 금속막 등과 같은 여러 층의 박막을 증착한 후, 사진공정, 식각공정 및 이온주입공정 등을 통해 패턴을 형성시켜 완성한다.That is, the semiconductor device is completed by depositing a thin film of various layers such as a polycrystalline film, an oxide film, a nitride film and a metal film on the wafer, and then forming a pattern through a photo process, an etching process and an ion implantation process.
따라서, 상기 공정들을 수행하기 위해서는 상기 웨이퍼는 여러 반도체 설비를 통과하여야한다.Thus, the wafer must pass through several semiconductor equipment in order to perform the processes.
일반적으로 상기 반도체 설비는 웨이퍼 맵핑 시스템을 구비하고 있다.Generally, the semiconductor equipment has a wafer mapping system.
상기 웨이퍼 맵핑 시스템은 웨이퍼가 내재된 캐리어가 스테이지에 장착되면 센서를 이용하여 상기 캐리어내에 웨이퍼가 어느 슬롯에 위치하고 몇장의 웨이퍼가 내재하는지를 감지하여 기억함으로서 공정을 효율적으로 수행되도록한다.The wafer mapping system performs a process efficiently by detecting and storing which slots are located in the carrier and how many wafers are in the carrier when a carrier having a wafer is mounted on the stage.
도1은 종래의 방법에 의한 웨이퍼 맵핑 시스템의 모습을 나타내는 도면이다.1 is a view showing a state of a wafer mapping system according to a conventional method.
도1에서 보는 바와 같이, 웨이퍼 맵핑 시스템(1)은 웨이퍼(4)가 내재된 캐리어(2)가 안착되는 스테이지(6), 상기 스테이지(6)를 고정시키며 상·하운동을 가이드하는 수직지지대(8) 및 상기 수직지지대(8)와 동일 표면상에 위치하며 상기 스테이지(6)의 상·하운동시 상기 캐리어(2)내의 웨이퍼(4)를 인식하는 센서(10)를 구비하여 이루어진다.As shown in FIG. 1, the wafer mapping system 1 includes a stage 6 on which a carrier 2 in which a wafer 4 is embedded is mounted, and a vertical support for fixing the stage 6 and guiding vertical movement. And a sensor 10 positioned on the same surface as the vertical support 8 and recognizing the wafer 4 in the carrier 2 during the up and down movement of the stage 6.
그러나 상술한 종래의 웨이퍼 맵핑 시스템(1)은 웨이퍼 맵핑시 상기 스테이지(6)가 운동함으로서 파티클 발생을 유발시키고, 캐리어(2)의 유동으로 웨이퍼(4)가 브로큰되는 문제점이 있었다.However, the conventional wafer mapping system 1 described above has a problem that the stage 6 moves during wafer mapping, causing particle generation, and the wafer 4 is broken by the flow of the carrier 2.
본 발명의 목적은, 센서를 상·하운동하도록함으로서 파티클 발생을 최소화하고 웨이퍼 브로큰(Broken)을 방지할 수 있는 웨이퍼 맵핑 시스템을 제공하는 데 있다.An object of the present invention is to provide a wafer mapping system capable of minimizing particle generation and preventing wafer broken by allowing the sensor to move up and down.
도1은 종래의 방법에 의한 웨이퍼 맵핑 시스템의 모습을 나타내는 도면이다.1 is a view showing a state of a wafer mapping system according to a conventional method.
도2는 본 발명에 의한 웨이퍼 맵핑 시스템의 모습을 나타내는 도면이다.2 is a view showing a state of a wafer mapping system according to the present invention.
※도면의 주요부분에 대한 부호의 설명※ Explanation of symbols for main parts of drawing
1, 21 :웨이퍼 맵핑 시스템 2, 22 ; 캐리어1, 21: wafer mapping system 2, 22; carrier
4, 24 ; 웨이퍼 6, 26 ; 스테이지4, 24; Wafers 6, 26; stage
8, 28 ; 수직지지대 10, 30 ; 센서8, 28; Vertical supports 10, 30; sensor
32 ; 수평지지대32; Horizontal support
상기 목적을 달성하기 위한 본 발명에 따른 웨이퍼 맵핑 시스템은 웨이퍼가 내재된 캐리어가 안착되는 스테이지; 상기 스테이지가 고정되며 소정의 높이를 갖는 수직지지대; 상기 수직지지대를 가이드로하여 상·하운동을 하는 수평지지대; 및 상기 수평지지대에 부착되어 상기 수평지지대의 상·하운동에 따라 캐리어내의 웨이퍼를 감지하는 센서를 구비하여 이루어진다.Wafer mapping system according to the present invention for achieving the above object is a stage in which a carrier in which the wafer is embedded is seated; A vertical support fixed to the stage and having a predetermined height; Horizontal support for vertical movement with the vertical support as a guide; And a sensor attached to the horizontal support to sense a wafer in the carrier according to the vertical movement of the horizontal support.
상기 수직지지대는 소정간격 이격되어 한쌍으로 이루어지는 것이 바람직하며, 상기 센서는 광센서일 수 있다.The vertical support is preferably formed in a pair spaced apart a predetermined interval, the sensor may be an optical sensor.
이하, 본 발명의 구체적인 일 실시예를 첨부한 도면을 참조하여 상세히 설명한다.Hereinafter, with reference to the accompanying drawings a specific embodiment of the present invention will be described in detail.
도2는 본 발명에 의한 웨이퍼 맵핑 시스템의 모습을 나타내는 도면이다.2 is a view showing a state of a wafer mapping system according to the present invention.
도2에서 보는 바와 같이, 웨이퍼 맵핑 시스템(21)은 웨이퍼(24)가 내재된 캐리어(22)가 안착되는 스테이지(26), 상기 스테이지(26)가 고정되며 소정의 높이를 갖는 수직지지대(28), 상기 수직지지대(28)를 가이드로하여 상·하운동을 하는 수평지지대(32), 상기 수평지지대(32)에 부착되어 상기 수평지지대(32)의 상·하운동에 따라 캐리어(22)내의 웨이퍼(24)를 감지하는 센서(30)를 구비하여 이루어진다.As shown in FIG. 2, the wafer mapping system 21 includes a stage 26 on which a carrier 22 in which a wafer 24 is embedded is mounted, and a vertical support 28 having a predetermined height at which the stage 26 is fixed. ), A horizontal support 32 that moves up and down using the vertical support 28 as a guide, and is attached to the horizontal support 32 so that the carrier 22 may move according to the up and down movement of the horizontal support 32. It comprises a sensor 30 for sensing the wafer 24 in the inside.
상기 수직지지대(28)는 소정간격 이격되어 한쌍으로 이루어지는 것이 바람직하며, 상기 센서(30)는 빛의 반사를 이용하는 광센서일 수 있다.The vertical support 28 is preferably formed in a pair spaced apart a predetermined interval, the sensor 30 may be an optical sensor using the reflection of light.
상술한 구성으로 이루어지는 상기 웨이퍼 맵핑 시스템(21)의 구동방법을 살펴보면 웨이퍼(24)가 내재된 캐리어(22)를 상기 스테이지(26)에 안착하면 상기 수평지지대(32)가 상·하운동함으로서 상기 웨이퍼(24)를 인식하여 상기 캐리어(22)내의 상기 웨이퍼(24)가 위치하는 슬롯번호와 개수를 인식한다.Looking at the driving method of the wafer mapping system 21 having the above-described configuration, when the carrier 22 in which the wafer 24 is embedded seats on the stage 26, the horizontal support 32 moves upward and downward. The wafer 24 is recognized to recognize the slot number and the number of the slots 24 in which the wafer 24 in the carrier 22 is located.
따라서 본 발명에 의한 상기 웨이퍼 맵핑 시스템(21)은 웨이퍼 맵핑시 종래와 같이 스테이지(6)가 운동을 하지않고 상기 센서(30)가 운동하도록 구성함으로서 직접적인 웨이퍼의 운동을 방지하여 파티클 발생을 방지하며, 캐리어(22)의 유동에 의한 웨이퍼(24)이 브로큰되는 것을 방지한다.Therefore, the wafer mapping system 21 according to the present invention prevents particle generation by preventing the movement of the wafer directly by configuring the sensor 30 to move without the movement of the stage 6 as in the prior art during wafer mapping. This prevents the wafer 24 from breaking due to the flow of the carrier 22.
따라서, 파티클 발생이 억제되고, 웨이퍼 브로큰을 최소화되는 효과가 있다.Therefore, particle generation is suppressed and there is an effect of minimizing wafer broken.
이상에서 본 발명은 기재된 구체예에 대해서만 상세히 설명되었지만 본 발명의 기술사상 범위 내에서 다양한 변형 및 수정이 가능함은 당업자에게 있어서 명백한 것이며, 이러한 변형 및 수정이 첨부된 특허청구범위에 속함은 당연한 것이다.Although the present invention has been described in detail only with respect to the described embodiments, it will be apparent to those skilled in the art that various modifications and variations are possible within the technical scope of the present invention, and such modifications and modifications are within the scope of the appended claims.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019980040571A KR20000021473A (en) | 1998-09-29 | 1998-09-29 | Wafer mapping system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019980040571A KR20000021473A (en) | 1998-09-29 | 1998-09-29 | Wafer mapping system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20000021473A true KR20000021473A (en) | 2000-04-25 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019980040571A KR20000021473A (en) | 1998-09-29 | 1998-09-29 | Wafer mapping system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7413099B2 (en) | 2001-06-08 | 2008-08-19 | Shin-Etsu Polymer Co., Ltd. | Sealing element with a protruding part approximately obliquely outward and a hermetic container using the same |
| KR100856587B1 (en) * | 2000-12-27 | 2008-09-03 | 도쿄엘렉트론가부시키가이샤 | Automatic guided vehicle |
-
1998
- 1998-09-29 KR KR1019980040571A patent/KR20000021473A/en not_active Application Discontinuation
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100856587B1 (en) * | 2000-12-27 | 2008-09-03 | 도쿄엘렉트론가부시키가이샤 | Automatic guided vehicle |
| US7413099B2 (en) | 2001-06-08 | 2008-08-19 | Shin-Etsu Polymer Co., Ltd. | Sealing element with a protruding part approximately obliquely outward and a hermetic container using the same |
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