KR20000003908A - Method for manufacturing high density plasma oxide - Google Patents

Method for manufacturing high density plasma oxide Download PDF

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KR20000003908A
KR20000003908A KR1019980025215A KR19980025215A KR20000003908A KR 20000003908 A KR20000003908 A KR 20000003908A KR 1019980025215 A KR1019980025215 A KR 1019980025215A KR 19980025215 A KR19980025215 A KR 19980025215A KR 20000003908 A KR20000003908 A KR 20000003908A
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South Korea
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substrate
temperature
hdp oxide
oxide film
gas
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KR1019980025215A
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Korean (ko)
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김한민
이승진
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김영환
현대전자산업 주식회사
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Priority to KR1019980025215A priority Critical patent/KR20000003908A/en
Priority to JP11185467A priority patent/JP2000049158A/en
Publication of KR20000003908A publication Critical patent/KR20000003908A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Formation Of Insulating Films (AREA)
  • Plasma Technology (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE: A fabrication method of an HDP(high density plasma) oxide layer is provided to prevent a desorption of an argon(Ar) by increasing the Ar desorption temperature from the HDP oxide layer. CONSTITUTION: The HDP oxide formation process comprises the steps of: preparing a substrate being desired processes are committed; and depositing an HDP oxide layer on the substrate being the temperature of the substrate is more than 400°C. The gas flow rate is controlled by 15-100 sccm. The substrate temperature is controlled by controlling a bias power source to 2700-3800 watt(W).

Description

고밀도 플라즈마 산화막 제조방법High density plasma oxide film manufacturing method

본 발명은 고집적 회로의 반도체 소자 제조 방법에 관한 것으로, 특히 금속 층간 절연물질로 사용되는 HDP(High Density Plasma) 산화막 제조 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device of a highly integrated circuit, and more particularly, to a method for manufacturing a high density plasma (HDP) oxide film used as an interlayer insulating material.

일반적으로, 고집적 반도체 소자에 있어서 적층구조에서 낮은 지역에 매립되어 평탄화를 이루는 절연막은, 단차지역에 충분히 매립되는 우수한 갭필링(gap filling) 특성을 가지고 있어야 한다. 현재 반도체 공정에서 이러한 목적으로 가장 폭넓게 사용되는 산화막 중의 하나는 HDP 산화막이다.In general, in an integrated semiconductor device, an insulating film that is flattened by filling in a low region in a stacked structure should have excellent gap filling characteristics that are sufficiently embedded in a stepped region. One of the most widely used oxide films for this purpose in current semiconductor processes is HDP oxide films.

도 1은 SOG막과 HDP 산화막의 TDS(thermal desorption spectroscopy)의 결과를 나타낸 그래프로서, 막의 증착온도에 대한 가스방출량을 나타내고 있다. 한편, 도 1에 도시된 그래프의 SOG막은 코팅후 420℃에서 1시간 큐닝을 한 샘플을 사용하였다. 그래프를 통해 알 수 있는 바와 같이, HDP 산화막은 SOG막과 거의 동등한 양의 가스를 막내에 함유하고 있음을 알 수 있다. SOG막은 유기성분 -CHx기와 수분의 -OH가 막내에 존재한다.1 is a graph showing the results of thermal desorption spectroscopy (TDS) of an SOG film and an HDP oxide film, and shows the amount of gas released with respect to the deposition temperature of the film. On the other hand, the SOG film of the graph shown in Figure 1 used a sample subjected to 1 hour quenching at 420 ℃ after coating. As can be seen from the graph, it can be seen that the HDP oxide film contains almost the same amount of gas in the film as the SOG film. In the SOG film, the organic component -CHx group and -OH of moisture are present in the film.

도 2는 HDP 산화막으로부터의 이탈 가스 성분별 TDS분석 데이터이다. 그림에서 보는 바와 같이, 막내에 상당량의 Ar이 함유되어 있음을 알 수 있다. 이는 플라즈마 방전에 사용되는 상당량의 Ar 가스가 산화막내에 남아있기 때문이며, 후속공정인 금속 매립시 이들이 이탈되어 비아에서의 변형과 금속층의 매립시 이 가스방출로 금속층의 매립을 저해하는 문제점이 있었다.FIG. 2 is TDS analysis data for each leaving gas component from an HDP oxide film. FIG. As shown in the figure, it can be seen that the film contains a considerable amount of Ar. This is because a considerable amount of Ar gas used in the plasma discharge remains in the oxide film, and when the metal is buried in the subsequent process, they are separated, and there is a problem in that the deformation of the via and the filling of the metal layer inhibit the embedding of the metal layer.

따라서, 상기 문제점을 해결하기 위하여 안출된 본 발명은 HDP 산화막으로부터 Ar이 탈리되는 온도를 증가시켜 후속공정에서 Ar이 탈리되는 것을 방지하기 위한 HDP 산화막 제조방법을 제공하는데 그 목적이 있다.Accordingly, an object of the present invention is to provide a method for producing an HDP oxide film for preventing Ar from being detached in a subsequent process by increasing the temperature at which Ar is detached from the HDP oxide film.

도 1은 HDP산화막과 SOG막의 TDS 분석 그래프,1 is a TDS analysis graph of HDP oxide film and SOG film,

도 2는 HDP산화막에서 탈착되는 가스 성분별 TDS 분석 그래프,2 is a TDS analysis graph for each gas component desorbed from the HDP oxide film;

도 3은 본 발명에 따른 증착 온도의 증가에 따른 TDS 분석 그래프.3 is a graph of TDS analysis with increasing deposition temperature according to the present invention.

상기 목적을 달성하기 위하여 본 발명은, 반도체소자의 HDP 산화막 제조방법에 있어서, 소정공정이 완료된 기판을 준비하는 단계; 및 400℃ 이상의 기판 온도에서 상기 기판 상에 HDP 산화막을 증착하는 단계를 포함하여 이루어진다.In order to achieve the above object, the present invention provides a method for manufacturing an HDP oxide film of a semiconductor device, comprising: preparing a substrate having a predetermined process; And depositing an HDP oxide film on the substrate at a substrate temperature of 400 ° C. or higher.

바람직하게, 상기 기판 온도는 상기 기판에 제공되는 He 가스양을 15∼100sccm으로 하여 조절하는 것을 특징으로 하며, 또한 상기 기판 온도는 바이어스 전원을 2700∼3800Watt로 하여 조절하는 것을 특징으로 한다.Preferably, the substrate temperature is characterized by adjusting the amount of He gas provided to the substrate to 15 to 100 sccm, and the substrate temperature is characterized by adjusting the bias power to 2700 to 3800 Watts.

이하, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명의 기술적 사상을 용이하게 실시할 수 있을 정도로 상세히 설명하기 위하여, 본 발명의 가장 바람직한 실시예를 첨부된 도면을 참조하여 설명하기로 한다.DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

먼저, 본 발명의 HDP 산화막 형성 방법은 웨이퍼 기판에 바이어스 전원을 인가, 산화막 증착시 증착노에 주입되는 He 가스 양을 조절 또는 이들의 조합함으로써 상기 HDP 산화막을 400℃이상에서 증착한다. 이와 같이 고온에서 형성된 HDP 산화막은 Ar등의 탈리 양을 줄이고, 또 탈리 온도를 고온으로 이동시킴으로써, 후속공정에서의 금속매립을 향상시킨다. 특히, 바이어스 전원인가 보다는 He 가스로 조절하는 경우가 더 큰 효과를 나타낸다.First, the HDP oxide film forming method of the present invention deposits the HDP oxide film at 400 ° C. or more by applying a bias power to the wafer substrate, controlling the amount of He gas injected into the deposition furnace during oxide film deposition, or a combination thereof. As described above, the HDP oxide film formed at a high temperature reduces the amount of detachment of Ar and the like and moves the detachment temperature to a high temperature, thereby improving the metal filling in the subsequent step. In particular, it is more effective to control with He gas than to apply bias power.

도 3은 기판 온도를 He 가스 양 또는 바이어스 전원을 조절하여 온도를 355℃∼450℃까지 변화시켜 증착한 막에 대한 Ar 가스 의 TDS분석 데이터를 나타낸 그래프이다. 도면에서, 355℃의 막은 바이어스 전원을 2300W, He 가스를 7.5Torr로 적용했을 경우의 탈리되는 가스 양을 나타내고 있다. 또한, 400℃의 실선은 He 가스 주입량은 5.1Torr로, 400℃의 점선은 2753W를, 450℃실선은 3.1Torr로, 450℃의 점선은 3253W를 각각 인가하였을 때의 탈리되는 가스 양을 나타내고 있다,Figure 3 is a graph showing the TDS analysis data of Ar gas for the film deposited by changing the temperature of the substrate temperature to 355 ℃ ~ 450 ℃ by adjusting the amount of He gas or the bias power supply. In the figure, the film at 355 ° C shows the amount of gas desorbed when the bias power is 2300 W and the He gas is 7.5 Torr. In addition, the solid line of 400 ° C shows He gas injection amount of 5.1 Torr, the dotted line of 400 ° C shows 2753W, the solid line of 450 ° C shows 3.1Torr, and the dotted line of 450 ° C shows the amount of degassed gas when 3253W is applied. ,

도 3에서 도시된 바와 같이, 어느 경우든 증착 온도가 높아짐에 따라 Ar의 탈리 양이 감소하는 것을 알 수 있다. 또 하나 주목할 만한 점은 탈리되는 가스의 온도가 증착온도를 높임으로써 탈리 시작온도와 탈리 양의 피크(peak) 온도가 고온으로 이동하는 점이다. 이의 효과는 바이어스 전원인가 의한 경우보다 He 가스로 조절한 경우가 더 큰 효과를 나타냄을 알 수 있다.As shown in FIG. 3, in any case, it can be seen that the amount of detachment of Ar decreases as the deposition temperature increases. Another notable point is that the temperature of the desorbed gas increases the deposition temperature, so that the desorption start temperature and the peak temperature of the desorption amount are shifted to a high temperature. It can be seen that the effect is more effective when the He gas is adjusted than when the bias power supply.

HDP 산화막의 특성상, 바이어스 전원을 높여주면 증착시 금속층의 상부의 귀퉁이가 깎여져 나가는 현상이 나타나는데 이는 제품의 신뢰성에 문제가 된다. 따라서 바이어스 전원보다는 He 가스로 증착하는 것이 더 바람직하다. He 가스로 450℃에서 증착한 막의 경우, 탈리 시작온도는 약 300℃에서 500℃까지 이동하며, 탈리 피크온도는 약 600℃에서 700℃으로 이동되어 있음을 알 수 있다.Due to the characteristics of the HDP oxide film, if the bias power is increased, the top corner of the metal layer is scraped off during deposition, which is a problem in the reliability of the product. Therefore, deposition with He gas is more preferable than bias power. In the case of the film deposited at 450 ° C. with He gas, it can be seen that the stripping start temperature is moved from about 300 ° C. to 500 ° C., and the stripping peak temperature is moved from about 600 ° C. to 700 ° C.

현재 후속 공정에서 진행 중에 Al매립의 경우 증착 온도가 450℃인 점을 감안 하면 이러한 탈리 시작온도의 이동은 Al매립시 이들의 매립이 억제되는 효과를 가져와 충분한 매립의 효과를 가져올 수 있다.Considering that the deposition temperature is 450 ° C. in the case of Al buried in the subsequent process, the shift of the desorption start temperature may have the effect of suppressing their buried during Al buried, thereby bringing sufficient buried effects.

본 발명의 기술 사상은 상기 바람직한 실시예에 따라 구체적으로 기술되었으나, 상기한 실시예는 그 설명을 위한 것이며 그 제한을 위한 것이 아니다. 또한, 본 발명의 기술분야의 통상의 전문가라면 본 발명의 기술 사상의 범위 내에서 다양한 실시예가 가능함을 이해할 수 있을 것이다.Although the technical idea of the present invention has been described in detail according to the above-described preferred embodiment, the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

본 발명으로 말미암아 HDP 산화막의 층간 절연막 증착시 증착 온도를 He 가스를 조절하여 400℃로 함으로써 HDP 산화막의 열적 안정성을 확보할 수 있으며 이후 공정이 450℃의 금속매립 고온 공정에서 HDP 산화막내의 함유 가스가 탈리되는 것을 억제하여 향상된 금속 매립을 확보할 수 있는 효과를 얻을 수 있다.According to the present invention, the thermal stability of the HDP oxide film can be ensured by controlling the He gas to 400 ° C. when depositing the interlayer insulating film of the HDP oxide film. By suppressing detachment, an effect of securing an improved metal buried can be obtained.

Claims (3)

반도체소자의 HDP 산화막 제조방법에 있어서,In the HDP oxide film production method of a semiconductor device, 소정공정이 완료된 기판을 준비하는 단계; 및Preparing a substrate on which a predetermined process is completed; And 400℃ 이상의 기판 온도에서 상기 기판 상에 HDP 산화막을 증착하는 단계를 포함하여 이루어진 반도체소자의 HDP 산화막 제조방법.Method of manufacturing an HDP oxide film of a semiconductor device comprising the step of depositing an HDP oxide film on the substrate at a substrate temperature of 400 ℃ or more. 제 1 항에 있어서,The method of claim 1, 상기 기판 온도는 상기 기판에 제공되는 He 가스양을 15∼100sccm으로 하여 조절하는 것을 특징으로 하는 반도체소자의 HDP 산화막 제조방법.And the substrate temperature is adjusted by adjusting the amount of He gas provided to the substrate to 15 to 100 sccm. 제 1 항 또는 제 2 항에 있어서,The method according to claim 1 or 2, 상기 기판 온도는 바이어스 전원을 2700∼3800Watt로 하여 조절하는 것을 특징으로 하는 반도체소자의 HDP 산화막 제조방법.The substrate temperature is a HDP oxide film manufacturing method of a semiconductor device, characterized in that the bias power is adjusted to 2700 ~ 3800Watt.
KR1019980025215A 1998-06-30 1998-06-30 Method for manufacturing high density plasma oxide KR20000003908A (en)

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KR1019980025215A KR20000003908A (en) 1998-06-30 1998-06-30 Method for manufacturing high density plasma oxide
JP11185467A JP2000049158A (en) 1998-06-30 1999-06-30 Manufacture of high-density plasma oxide film

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030058015A (en) * 2001-12-29 2003-07-07 주식회사 하이닉스반도체 Method of forming high density plasm oxide layer for semiconductor device
KR100605194B1 (en) * 2004-12-29 2006-07-31 동부일렉트로닉스 주식회사 Method for forming the pad layer of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030058015A (en) * 2001-12-29 2003-07-07 주식회사 하이닉스반도체 Method of forming high density plasm oxide layer for semiconductor device
KR100605194B1 (en) * 2004-12-29 2006-07-31 동부일렉트로닉스 주식회사 Method for forming the pad layer of semiconductor device

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