KR19990082715A - 반도체장치 - Google Patents
반도체장치 Download PDFInfo
- Publication number
- KR19990082715A KR19990082715A KR1019990007062A KR19990007062A KR19990082715A KR 19990082715 A KR19990082715 A KR 19990082715A KR 1019990007062 A KR1019990007062 A KR 1019990007062A KR 19990007062 A KR19990007062 A KR 19990007062A KR 19990082715 A KR19990082715 A KR 19990082715A
- Authority
- KR
- South Korea
- Prior art keywords
- wiring board
- semiconductor chip
- semiconductor device
- wiring
- wiring pattern
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 90
- 229920001971 elastomer Polymers 0.000 claims abstract description 30
- 239000000806 elastomer Substances 0.000 claims abstract description 30
- 239000000853 adhesive Substances 0.000 claims abstract description 26
- 230000001070 adhesive effect Effects 0.000 claims abstract description 24
- 239000010410 layer Substances 0.000 claims description 33
- 239000011347 resin Substances 0.000 claims description 12
- 229920005989 resin Polymers 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 8
- 239000012790 adhesive layer Substances 0.000 claims description 7
- 239000002923 metal particle Substances 0.000 claims description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 27
- 239000010931 gold Substances 0.000 abstract description 22
- 229910052737 gold Inorganic materials 0.000 abstract description 22
- 229910000679 solder Inorganic materials 0.000 abstract description 18
- 238000004519 manufacturing process Methods 0.000 abstract description 12
- 230000008646 thermal stress Effects 0.000 abstract description 9
- 239000000758 substrate Substances 0.000 description 24
- 230000035882 stress Effects 0.000 description 8
- 238000007747 plating Methods 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000004075 alteration Effects 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 230000008602 contraction Effects 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
- H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (7)
- 배선 기판의 한쪽 면에 형성된 배선 패턴에 반도체칩이 플립칩 접속으로 탑재되고, 상기 배선 기판의 다른 쪽 면에 상기 배선 패턴과 전기적으로 접속된 외부 접속 단자가 형성된 반도체 장치에 있어서,상기 반도체칩이 상기 배선 기판에 엘라스토머층 및 접착제층을 각각 소정 부위에 개재시켜 탑재되고, 상기 반도체칩의 전극 단자와 상기 배선 기판의 배선 패턴이 전기적으로 접속되어 있는 것을 특징으로 하는 반도체 장치.
- 제 1항에 있어서,상기 접착제층은 이방 도전성 시트로 형성되어 있는 것을 특징으로 하는 반도체 장치.
- 제 2항에 있어서,상기 이방 도전성 시트는 수지계 접착제 중에 금속 입자가 혼입되여 형성된 것인 것을 특징으로 하는 반도체 장치.
- 제 1항 내지 제 3항 중 어느 한항에 있어서,상기 엘라스토머층은 접착성을 가지고 있으며, 상기 반도체칩을 상기 배선 기판에 접착하고 있는 것을 특징으로 하는 반도체 장치.
- 제 1항 내지 제 4항 중 어느 한항에 있어서,상기 반도체칩의 전극 단자는 와이어본딩된 와이어가 절단되어 소정 형상으로 성형된 스터드 범프인 것을 특징으로 하는 반도체 장치.
- 제 1항 내지 제 5항 중 어느 한항에 있어서,상기 배선 기판의 전극 단자 접속 부위에 상기 접착제층이 형성되며, 그 외의 부위에 상기 엘라스토머층이 형성되어 있는 것을 특징으로 하는 반도체 장치.
- 제 1항, 제 4항 내지 제 6항 중 어느 한항에 있어서,상기 접착제층은 절연성 수지로 형성되어 있는 것을 특징으로 하는 반도체 장치.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP98-94895 | 1998-04-07 | ||
JP9489598 | 1998-04-07 |
Publications (2)
Publication Number | Publication Date |
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KR19990082715A true KR19990082715A (ko) | 1999-11-25 |
KR100352865B1 KR100352865B1 (ko) | 2002-09-16 |
Family
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KR1019990007062A KR100352865B1 (ko) | 1998-04-07 | 1999-03-04 | 반도체 장치 및 그 제조방법 |
Country Status (2)
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US (1) | US6081038A (ko) |
KR (1) | KR100352865B1 (ko) |
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WO1996042107A1 (en) * | 1995-06-13 | 1996-12-27 | Hitachi Chemical Company, Ltd. | Semiconductor device, wiring board for mounting semiconductor and method of production of semiconductor device |
CN1143373C (zh) * | 1998-07-01 | 2004-03-24 | 精工爱普生株式会社 | 半导体装置及其制造方法、电路基板和电子装置 |
JP3844032B2 (ja) * | 1998-07-14 | 2006-11-08 | 日本テキサス・インスツルメンツ株式会社 | 半導体装置及びその製造方法 |
JP2000124348A (ja) * | 1998-10-14 | 2000-04-28 | Oki Electric Ind Co Ltd | Vlsiパッケージ |
US6225704B1 (en) * | 1999-02-12 | 2001-05-01 | Shin-Etsu Chemical Co., Ltd. | Flip-chip type semiconductor device |
JP2001015551A (ja) * | 1999-06-29 | 2001-01-19 | Toshiba Corp | 半導体装置およびその製造方法 |
JP2001044226A (ja) * | 1999-07-27 | 2001-02-16 | Mitsubishi Electric Corp | 半導体装置の製造方法および半導体装置 |
JP3343730B2 (ja) * | 1999-08-27 | 2002-11-11 | 埼玉日本電気株式会社 | 実装基板及び電気部品の実装方法 |
JP3973340B2 (ja) * | 1999-10-05 | 2007-09-12 | Necエレクトロニクス株式会社 | 半導体装置、配線基板、及び、それらの製造方法 |
AU1219001A (en) * | 1999-10-19 | 2001-04-30 | Motorola, Inc. | Method of forming a microelectronic assembly |
US6331119B1 (en) * | 1999-12-28 | 2001-12-18 | International Business Machines Corporation | Conductive adhesive having a palladium matrix interface between two metal surfaces |
US6656765B1 (en) * | 2000-02-02 | 2003-12-02 | Amkor Technology, Inc. | Fabricating very thin chip size semiconductor packages |
US20020162679A1 (en) * | 2001-05-04 | 2002-11-07 | Nael Hannan | Package level pre-applied underfills for thermo-mechanical reliability enhancements of electronic assemblies |
EP1448745B1 (en) * | 2001-11-28 | 2009-02-18 | Dow Corning Toray Co., Ltd. | Anisotropically electroconductive adhesive film, method for the production thereof, and semiconductor devices |
TWI251313B (en) * | 2003-09-26 | 2006-03-11 | Seiko Epson Corp | Intermediate chip module, semiconductor device, circuit board, and electronic device |
CN100468674C (zh) * | 2004-11-25 | 2009-03-11 | 日本电气株式会社 | 半导体器件及其制造方法、线路板及其制造方法、半导体封装件和电子装置 |
JP2009135150A (ja) * | 2007-11-28 | 2009-06-18 | Toshiba Corp | プリント回路板、プリント回路板の製造方法および電子機器 |
KR101237668B1 (ko) * | 2011-08-10 | 2013-02-26 | 삼성전기주식회사 | 반도체 패키지 기판 |
US9515036B2 (en) | 2012-04-20 | 2016-12-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods and apparatus for solder connections |
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ITUB20155111A1 (it) | 2015-11-04 | 2017-05-04 | St Microelectronics Srl | Dispositivo a semiconduttore e relativo procedimento |
US9754914B1 (en) * | 2016-05-10 | 2017-09-05 | Rosemount Aerospace Inc. | Method to provide die attach stress relief using gold stud bumps |
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JP7091696B2 (ja) * | 2018-02-20 | 2022-06-28 | 株式会社デンソー | 物理量センサおよび半導体装置 |
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JPH01132138A (ja) * | 1987-08-13 | 1989-05-24 | Shin Etsu Polymer Co Ltd | Icチップの電気的接続方法、樹脂バンプ形成材料および液晶表示器 |
JPH0282633A (ja) * | 1988-09-20 | 1990-03-23 | Seiko Epson Corp | 半導体素子の実装構造 |
JPH098186A (ja) * | 1995-06-22 | 1997-01-10 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JPH09181210A (ja) * | 1995-12-27 | 1997-07-11 | Matsushita Electron Corp | 半導体装置およびその製造方法 |
JPH09246423A (ja) * | 1996-03-13 | 1997-09-19 | Hitachi Ltd | 半導体装置 |
JPH09260533A (ja) * | 1996-03-19 | 1997-10-03 | Hitachi Ltd | 半導体装置及びその実装構造 |
JP4094074B2 (ja) * | 1996-03-22 | 2008-06-04 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
JP2891184B2 (ja) * | 1996-06-13 | 1999-05-17 | 日本電気株式会社 | 半導体装置及びその製造方法 |
JPH10163386A (ja) * | 1996-12-03 | 1998-06-19 | Toshiba Corp | 半導体装置、半導体パッケージおよび実装回路装置 |
-
1999
- 1999-03-04 KR KR1019990007062A patent/KR100352865B1/ko not_active IP Right Cessation
- 1999-04-05 US US09/285,971 patent/US6081038A/en not_active Expired - Lifetime
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KR100352865B1 (ko) | 2002-09-16 |
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