KR19980015422A - Manufacturing method of depressed electrode type solar cell - Google Patents
Manufacturing method of depressed electrode type solar cell Download PDFInfo
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- KR19980015422A KR19980015422A KR1019960034725A KR19960034725A KR19980015422A KR 19980015422 A KR19980015422 A KR 19980015422A KR 1019960034725 A KR1019960034725 A KR 1019960034725A KR 19960034725 A KR19960034725 A KR 19960034725A KR 19980015422 A KR19980015422 A KR 19980015422A
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- 238000004519 manufacturing process Methods 0.000 title abstract description 19
- 230000000994 depressogenic effect Effects 0.000 title abstract description 7
- 239000004065 semiconductor Substances 0.000 claims abstract description 76
- 239000000758 substrate Substances 0.000 claims abstract description 49
- 239000012535 impurity Substances 0.000 claims abstract description 20
- 239000010410 layer Substances 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 19
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 13
- 239000010703 silicon Substances 0.000 claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims abstract description 12
- 239000002184 metal Substances 0.000 claims abstract description 12
- 239000011521 glass Substances 0.000 claims abstract description 11
- 239000002345 surface coating layer Substances 0.000 claims abstract description 7
- 238000004528 spin coating Methods 0.000 claims abstract description 6
- 238000007747 plating Methods 0.000 claims abstract description 5
- 238000007650 screen-printing Methods 0.000 claims abstract description 5
- 238000000137 annealing Methods 0.000 claims abstract description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 2
- 229920003986 novolac Polymers 0.000 claims description 2
- 229920002120 photoresistant polymer Polymers 0.000 claims description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims 1
- -1 polyhydroxystyrene Polymers 0.000 claims 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims 1
- 238000006243 chemical reaction Methods 0.000 abstract description 8
- 239000011248 coating agent Substances 0.000 description 9
- 238000000576 coating method Methods 0.000 description 9
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000007669 thermal treatment Methods 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Condensed Matter Physics & Semiconductors (AREA)
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- Computer Hardware Design (AREA)
- Life Sciences & Earth Sciences (AREA)
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- Sustainable Energy (AREA)
- Manufacturing & Machinery (AREA)
- Photovoltaic Devices (AREA)
Abstract
본 발명은 (a) p형 반도체 기판 전면에 n형 불순물을 함유하고 있는 실리콘 글래스(silicon glass)를 스핀코팅한 다음, 베이킹하는 단계; (b) 반도체 기판 후면에 p형 불순물을 함유하고 있는 실리콘 글래스를 스핀코팅한 다음, 베이킹하는 단계; (c) 어닐링으로 상기 반도체 기판 전면과 후면에 n+ 반도체층과 p+ 반도체층을 각각 형성하는 단계; (d) 상기 반도체 기판 전면내에 홈을 형성하고, 이 홈내로 n형 불순물을 확산시켜 n++ 반도체층을 형성하는 단계; (e) 상기 홈 상부에 전도성 금속을 도금하여 전면전극을 형성하는 단계; (f) 반도체 기판 전면에 표면 코팅층을 형성하고 나서, 반도체 기판 후면의 산화막만을 선택적으로 제거하는 단계; (g) 스크린 프린팅 방법을 이용하여 산화막이 제거된 반도체 기판 후면에 전도성 금속으로 후면전극을 형성하는 단계; (h) 반도체 기판 전면의 표면 코팅층을 제거하는 단계; (i) 반도체 기판 전면에 반사방지막을 형성하는 단계; (j) 에지(edge)를 분리하는 단계를 포함하는 것을 특징으로 하는 함몰전극형 태양전지의 제조방법을 제공한다. 본 발명에 따르면, 낮은 제조비용으로 변환효율이 우수한 함몰전극형 태양전지를 제조할 수 있다.(A) spin-coating a silicon glass containing an n-type impurity on the entire surface of a p-type semiconductor substrate and then baking; (b) spin-coating a silicon glass containing a p-type impurity on the back surface of the semiconductor substrate, followed by baking; (c) forming an n + semiconductor layer and a p + semiconductor layer on the front surface and the rear surface of the semiconductor substrate, respectively, by annealing; (d) forming a groove in the front surface of the semiconductor substrate and diffusing the n-type impurity into the groove to form an n ++ semiconductor layer; (e) forming a front electrode by plating a conductive metal on the groove; (f) selectively removing only the oxide film on the back surface of the semiconductor substrate after forming a surface coating layer on the entire surface of the semiconductor substrate; (g) forming a rear electrode with a conductive metal on the rear surface of the semiconductor substrate from which the oxide film is removed using a screen printing method; (h) removing a surface coating layer on the entire surface of the semiconductor substrate; (i) forming an antireflection film on the entire surface of the semiconductor substrate; (j) separating the edge of the photovoltaic cell. INDUSTRIAL APPLICABILITY According to the present invention, it is possible to manufacture a depressed electrode type solar cell having an excellent conversion efficiency at a low manufacturing cost.
Description
본 발명은 함몰전극형 태양전지의 제조방법에 관한 것으로서, 상세하기로는 낮은 제조비용으로 변환효율이 우수한 함몰전극형 태양전지를 제조하는 방법에 관한 것이다.The present invention relates to a method for manufacturing a depression electrode type solar cell, and more particularly, to a method for manufacturing a depression electrode type solar cell having a high conversion efficiency at a low manufacturing cost.
태양전지는 반도체의 광 기전력 효과를 이용한 것으로서, p형 반도체와 n형 반도체를 조합하여 만든다. p형 반도체와 n형 반도체가 접한 부분(pn 접합부)에 빛이 들어오면, 빛 에너지에 의하여 반도체 내부에서 마이너스의 전하(전자)와 플러스의 전하(정공)가 발생한다.Solar cells are based on the photovoltaic effect of semiconductors and are made by combining p-type and n-type semiconductors. When light enters a portion where the p-type semiconductor and the n-type semiconductor are in contact (pn junction), negative charges (electrons) and positive charges (holes) are generated inside the semiconductor due to the light energy.
빛에너지에 의해 발생된 전자와 정공은 내부의 전계에 의하여 각각 n형 반도체측과 p형 반도체측으로 이동하여 양쪽의 전극부에 모아진다. 이러한 두 개의 전극을 도선으로 연결하면 전류가 흐르고 외부에서 전력으로 이용할 수 있게 된다.The electrons and holes generated by the light energy move to the n-type semiconductor side and the p-type semiconductor side by the internal electric field, respectively, and are collected in both electrode portions. When these two electrodes are connected by a lead wire, current flows and can be used as an external power source.
태양전지는 전극의 형태에 따라 스크린 프린팅형 태양전지(Screen Printing Solar Cell: SPSC)와 함몰전극형 태양전지(Buried Contact Solar Cell: BCSC)로 구분할 수 있다.Solar cells can be divided into screen printing solar cells (SPSC) and buried contact solar cells (BCSC) depending on the shape of the electrodes.
SPSC는 일반적으로 제조하기가 용이하지만 금속 전극에서의 반사, 후면 전류 흐름에서 기인된 저항 및 일반적으로 깊게 도핑되어 있는 이미터 영역에서의 캐리어들의 높은 재결합률로 인하여 전지의 변환효율이 낮은 편이고 어스펙트비가 불량하다.SPSC is generally easy to manufacture, but its conversion efficiency is low due to reflections at the metal electrode, resistance caused by the backside current flow, and high recombination rates of carriers in the generally deeply-doped emitter regions, The rain is bad.
한편, BCSC에서는 금속 전극을 반도체 기판 전면내로 깊게 파인 홈에 형성시키는데, 이 전지의 변환효율은 SPSC보다 높은 편이다. 이렇게 BCSC가 SPSC보다 변환효율이 높은 것은 반도체 기판 전면내로 깊게 도핑되어 있는 금속 전극이 전지의 활성영역과 떨어져 있어서 개방회로전압 및 전지 변환효율을 감소시키는 원인으로 작용하는 캐리어들의 재결합이 보다 감소되기 때문이다.On the other hand, in the BCSC, the metal electrode is formed in the groove deeply drawn into the front surface of the semiconductor substrate, and the conversion efficiency of this battery is higher than that of the SPSC. The higher conversion efficiency of the BCSC than the SPSC is due to the fact that the metal electrode deeply doped into the front surface of the semiconductor substrate is separated from the active region of the battery and the recombination of the carriers, which causes the decrease in the open circuit voltage and the battery conversion efficiency, to be.
도 1은 통상적인 BCSC의 단면구조를 나타낸 도면으로서, 이를 제조하는 방법은 다음과 같다.1 shows a cross-sectional structure of a conventional BCSC, and a method of manufacturing the same is as follows.
먼저 p형 반도체 기판 (11)에 텍스처링을 실시하여 기판 전면과 후면에 피라미드 구조를 형성한다. 상기 반도체 기판 전면상에 pn접합을 형성하여 n+ 반도체층 (12)을 형성한 다음, 산화공정을 실시하여 반도체 기판 전면에 산화막 (13)을 형성하고 그 기판 후면에도 산화막(미도시)을 형성한다. 상기 반도체 기판 전면내로 홈을 깊게 스크라이빙한 다음, 이 홈내에 전도성 금속을 도금하여 전면전극 (16)를 형성한다. 이 때 전면전극 (16)이 형성되어 있는 홈의 하부에는 n++ 반도체층 (15)을 형성시킨다.First, the p-type semiconductor substrate 11 is textured to form a pyramid structure on the front and rear surfaces of the substrate. A pn junction is formed on the entire surface of the semiconductor substrate to form an n + semiconductor layer 12, and then an oxidation process is performed to form an oxide film 13 on the entire surface of the semiconductor substrate and an oxide film (not shown) . The groove is deeply scribed into the entire surface of the semiconductor substrate, and the front electrode 16 is formed by plating conductive metal in the groove. At this time, an n ++ semiconductor layer 15 is formed under the grooves in which the front electrodes 16 are formed.
반도체 기판 (11) 후면에는 알루미늄을 증착, 소결하여 p+ 반도체층 (17)을 형성하고, 그 상부에 전도성 금속을 도금하여 후면전극 (18)을 형성한다.On the back surface of the semiconductor substrate 11, aluminum is deposited and sintered to form a p + semiconductor layer 17, and a conductive metal is plated on the p + semiconductor layer 17 to form a back electrode 18. [
마지막으로, 상기 반도체 기판 (11) 전면에 반사방지막 (14)을 형성함으로써 함몰전극형 태양전지가 완성된다.Finally, by forming the antireflection film 14 on the entire surface of the semiconductor substrate 11, a depressed electrode type solar cell is completed.
BCSC를 상기 방법에 따라 제조하는 경우, 고가의 용광로(furnace)와 진공증발기 등이 필요하며 많은 비용과 시간이 소요된다. 또한 제조공정중에 몇몇의 공정이 고온조건하에서 실시되는데, 이러한 고온조건하의 공정 수가 많으면 많을수록 오염발생률이 높아지고 제조비용이 상승되는 원인으로서 작용한다.When BCSC is prepared according to the above method, an expensive furnace and a vacuum evaporator are required, which is expensive and time consuming. Also, some steps during the manufacturing process are carried out under high temperature conditions. The higher the number of processes under such a high temperature condition, the higher the contamination incidence and the higher the manufacturing cost.
그러므로 본 발명이 이루고자 하는 기술적 과제는 상기 문제점을 해결하여 저렴한 비용으로 우수한 변환효율 특성을 갖는 함몰전극형 태양전지를 제조할 수 있는 방법을 제공하는 것이다.SUMMARY OF THE INVENTION Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and an object of the present invention is to provide a method of manufacturing a depressed electrode type solar cell having excellent conversion efficiency characteristics at low cost.
도 1은 통상적인 함몰전극형 태양전지의 단면구조를 개략적으로 나타낸 도면이고,1 is a schematic cross-sectional view of a typical depression electrode type solar cell,
도2a-e는 본 발명에 따른 함몰전극형 태양전지의 제조방법을 설명하기 위한 도면들이다.FIGS. 2A to 2E are views for explaining a method of manufacturing a depression electrode type solar cell according to the present invention.
도면의 주요 부분에 대한 부호의 설명DESCRIPTION OF THE REFERENCE NUMERALS
11, 21. p형 반도체기판11, 21. A p-type semiconductor substrate
12, 22. n+ 반도체층12, 22. n + semiconductor layer
13, 23, 24. 산화막13, 23, 24. The oxide film
14. 반사방지막14. Antireflection film
15, 25. n++ 반도체층15, 25. n ++ semiconductor layer
16, 26. 전면전극16, 26. Front electrode
17, 27. 후면전극17, 27. Rear electrode
28. p+ 반도체층28. p + semiconductor layer
29. 표면코팅막29. Surface coating film
상기 과제를 이루기 위하여 본 발명에서는 (a) p형 반도체 기판 전면에 n형 불순물을 함유하고 있는 실리콘 글래스(silicon glass)를 스핀코팅한 다음, 베이킹하는 단계; (b) 반도체 기판 후면에 p형 불순물을 함유하고 있는 실리콘 글래스를 스핀코팅한 다음, 베이킹하는 단계; (c) 어닐링으로 상기 반도체 기판 전면과 후면에 n+ 반도체층과 p+ 반도체층을 각각 형성하는 단계; (d) 상기 반도체 기판 전면내에 홈을 형성하고, 이 홈내로 n형 불순물을 확산시켜 n++ 반도체층을 형성하는 단계; (e) 상기 홈 상부에 전도성 금속을 도금하여 전면전극을 형성하는 단계; (f) 반도체 기판 전면에 표면 코팅층을 형성하고 나서, 반도체 기판 후면의 산화막만을 선택적으로 제거하는 단계; (g) 스크린 프린팅 방법을 이용하여 산화막이 제거된 반도체 기판 후면에 전도성 금속으로 후면전극을 형성하는 단계; (h) 반도체 기판 전면의 표면 코팅층을 제거하는 단계; (i) 반도체 기판 전면에 반사방지막을 형성하는 단계; (j) 에지(edge)를 분리하는 단계를 포함하는 것을 특징으로 하는 함몰전극형 태양전지의 제조방법을 제공한다.According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: (a) spin-coating a silicon glass containing n-type impurities on the entire surface of a p- (b) spin-coating a silicon glass containing a p-type impurity on the back surface of the semiconductor substrate, followed by baking; (c) forming an n + semiconductor layer and a p + semiconductor layer on the front surface and the rear surface of the semiconductor substrate, respectively, by annealing; (d) forming a groove in the front surface of the semiconductor substrate and diffusing the n-type impurity into the groove to form an n ++ semiconductor layer; (e) forming a front electrode by plating a conductive metal on the groove; (f) selectively removing only the oxide film on the back surface of the semiconductor substrate after forming a surface coating layer on the entire surface of the semiconductor substrate; (g) forming a rear electrode with a conductive metal on the rear surface of the semiconductor substrate from which the oxide film is removed using a screen printing method; (h) removing a surface coating layer on the entire surface of the semiconductor substrate; (i) forming an antireflection film on the entire surface of the semiconductor substrate; (j) separating the edge of the photovoltaic cell.
상기 표면코팅막의 재료로는 통상적인 반도체 소자 제조시 사용되는 표면코팅막 형성용 물질이라면 모두 사용할 수 있다. 그 중에서도 특히 노볼락(novolak) 및 폴리하이드록시스티렌과 같이 물에는 잘 녹지 않으면서 아세톤이나 톨루엔 등의 유기용제에 잘 녹는 물질이나 내에칭성 피막을 형성하는 감광성 수지인 포토레지스트로 형성하는 것이 바람직하다. 따라서, 상기 표면코팅막은 산화막 제거시 통상적으로 사용되는 식각액인 불산에 용해되지 않으므로 이 표면코팅막을 마스크로 사용하여 반도체 기판 후면의 산화막만을 선택적으로 제거할 수 있다.The material for the surface coating film may be any material for forming a surface coating film used in the conventional semiconductor device production. Among them, it is preferable to form a material which is not soluble in water, such as novolak and polyhydroxystyrene, but soluble in an organic solvent such as acetone or toluene, or a photoresist which is a photosensitive resin for forming an etchable film Do. Therefore, since the surface coating film is not dissolved in hydrofluoric acid, which is a commonly used etchant for removing the oxide film, only the oxide film on the rear surface of the semiconductor substrate can be selectively removed using the surface coating film as a mask.
본 발명에서는 오직 한 단계의 고온 공정 즉, 반도체 기판 전면내의 홈에 n형 불순물을 확산하는 공정을 포함하고 있으므로 통상적인 함몰전극형 전지와 비교하여 전지 제조비용이 매우 절감된다. 또한 반도체 기판 전면에 pn 접합을 형성하거나 반도체 기판 후면에 전계를 형성하는 경우, 종래의 함몰전극형 태양전지에서는 고가의 진공증착설비를 사용하는 반면, 본 발명에서는 급속 열적 어닐링기를 사용한다. 여기에서 RTA를 사용하면 비교적 낮은 온도에서 매우 단시간 즉, 30초 내지 1분동안의 열처리로 충분하므로 열적 버지트 감소에 유리하며 불순물의 재분포를 방지함으로써 품질이 낮은 반도체 기판의 벌크 수명을 보존하는 데 유용하다.Since the present invention includes only a one-step high-temperature process, that is, a process of diffusing n-type impurities into the grooves in the front surface of the semiconductor substrate, the manufacturing cost of the battery is greatly reduced as compared with the conventional depressed electrode type cell. In addition, when a pn junction is formed on the entire surface of the semiconductor substrate or an electric field is formed on the back surface of the semiconductor substrate, the conventional depressed electrode type solar cell uses an expensive vacuum deposition facility, whereas the present invention uses a rapid thermal annealing unit. Here, the use of RTA is advantageous in that the thermal treatment is performed at a relatively low temperature for a very short period of time, that is, 30 seconds to 1 minute, which is advantageous in reducing thermal budget and preventing the redistribution of impurities, It is useful.
이하, 도 2a-e를 참조하여 본 발명에 따른 함몰전극형 태양전지의 제조방법을 설명하기로 한다.Hereinafter, a method of manufacturing a depressed electrode type solar cell according to the present invention will be described with reference to FIGS.
먼저, p형 반도체 기판 (21)을 세정한 다음, 이 반도체 기판 (21) 전면에 n형 불순물인 인을 함유하고 있는 실리콘 글래스를 스핀코팅한다. 이 때 n형 불순물과 실리콘 글래스의 중량비는 5:95 내지 15:85이 바람직하며, 10:90이 가장 바람직하다. 이어서, 120∼170℃에서 15∼20동안 베이킹한다. 그리고 나서, 반도체 기판 (21) 후면에는 p형 불순물인 보론을 함유하고 있는 실리콘 글래스를 스핀코팅한다. 이 때 p형 불순물과 실리콘 그래스의 중량비는 10:90 내지 20:80이 바람직하며, 15:85가 가장 바람직하다. 이어서, 120∼170℃에서 15 내지 20동안 베이킹한다.First, the p-type semiconductor substrate 21 is cleaned, and then silicon glass containing phosphorus, which is an n-type impurity, is spin-coated on the entire surface of the semiconductor substrate 21. In this case, the weight ratio of the n-type impurity to the silicon glass is preferably 5:95 to 15:85, and most preferably 10:90. Then, baking is performed at 120 to 170 DEG C for 15 to 20 hours. Then, silicon glass containing boron, which is a p-type impurity, is spin-coated on the back surface of the semiconductor substrate 21. In this case, the weight ratio of the p-type impurity to the silicon grains is preferably 10:90 to 20:80, and most preferably 15:85. Then, it is baked at 120 to 170 DEG C for 15 to 20 minutes.
그 후, RTA를 이용하여 30초 내지 1분동안 어닐링하여 반도체 기판 전면에 n+ 반도체층 (22)과 산화막으로서 산화규소막 (23)을 형성하고, 반도체 기판 후면에는 p+ 반도체층 (28)과 산화규소막 (24)을 형성한다 (도 2a).Thereafter, the n + semiconductor layer 22 and the silicon oxide film 23 are formed as an oxide film on the entire surface of the semiconductor substrate by RTA for 30 seconds to 1 minute, and the p + semiconductor layer 28 is oxidized Thereby forming a silicon film 24 (Fig. 2A).
레이저를 이용하여 반도체 기판 (21) 전면내에 홈을 스크라이빙한 다음, 형성된 홈을 식각하고 세정한다. 그 후, 세정된 홈내로 n형 불순물인 인을 깊게 확산시켜 n++ 반도체층 (25)을 형성한다. 이어서 선택적 도금이 가능한 무전해도금방법으로 상기홈에 전도성 금속을 도금하여 전면전극 (26)을 형성한다 (도 2b).The groove is scribed in the front surface of the semiconductor substrate 21 by using a laser, and then the formed groove is etched and cleaned. Thereafter, phosphorus, which is an n-type impurity, is deeply diffused into the cleaved groove to form an n ++ semiconductor layer 25. Subsequently, a conductive metal is plated on the grooves by a electroless plating method capable of selective plating to form front electrodes 26 (FIG. 2B).
전면전극 (26)이 형성된 상기 반도체 기판 (21) 전면에 표면코팅막 (29)을 형성한다. 이렇게 표면코팅막 (29)을 형성하면 반도체 기판 후면의 산화막 (24)을 선택적으로 제거할 수 있다(도 2c). 여기에서 표면코팅막은 식각마스크로서의 역할을 수행한다.A surface coating film 29 is formed on the entire surface of the semiconductor substrate 21 on which the front electrode 26 is formed. When the surface coating film 29 is formed as described above, the oxide film 24 on the rear surface of the semiconductor substrate can be selectively removed (FIG. 2C). Here, the surface coating film serves as an etching mask.
산화막 (24)이 제거된 반도체 기판 (21) 후면에 스크린 인쇄방법을 이용하여 전극을 인쇄한 다음, 소결하여 후면전극 (27)을 형성한다 (도 2d). 그 후, 반도체 기판 전면에 형성된 표면코팅막 (29)을 제거한 다음, 반사방지막(미도시)을 형성한다 (도 2e). 이어서, 전지 제조 공정중 불순물로 인하여 오염된 부분을 제거하기 위하여 에지(edge)를 분리해내면 도 1과 같은 구조를 갖는 함몰전극형 태양전지가 완성된다.An electrode is printed on the rear surface of the semiconductor substrate 21 from which the oxide film 24 is removed by using a screen printing method, and then sintered to form the rear electrode 27 (FIG. Thereafter, the surface coating film 29 formed on the entire surface of the semiconductor substrate is removed, and an antireflection film (not shown) is formed (FIG. 2E). Next, in order to remove the contaminated portion due to impurities in the battery manufacturing process, the edge is separated, and thus a recessed electrode type solar cell having a structure as shown in FIG. 1 is completed.
상기에서 알 수 있는 바와 같이, 본 발명에서는 p형 또는 n형 확산 불순물을 주입하는 경우, 스핀 코터와 RTA만이 필요하며 고온조건하의 공정이 한 번이다. 따라서 종래보다 오염발생률이 낮아지고 전지 제조비용이 매우 절감된다.As can be seen from the above, in the present invention, only the spin coater and RTA are required when the p-type or n-type diffusion impurity is implanted, and the process under the high temperature condition is once. Therefore, the contamination incidence is lower than in the prior art, and the battery manufacturing cost is greatly reduced.
본 발명에 따르면 저렴한 비용으로 변환효율이 우수한 함몰전극형 태양전지를 제조할 수 있다.According to the present invention, it is possible to manufacture a depression electrode type solar cell having an excellent conversion efficiency at a low cost.
Claims (7)
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