KR101464282B1 - Semiconductor device - Google Patents

Abstract

The present invention discloses a semiconductor device comprising a semiconductor stacked layer, an electrode, and a conductive structure formed by a nano-imprint process and formed between the electrode and the semiconductor stack, And can be uniformly dispersed in the semiconductor stack through the conductive structure. The conductive structure has a width of the top part, a width and height of the bottom part, and the width of the upper end part is smaller than the width of the bottom part or the height is larger than the width of the bottom part.

Semiconductor layer, conductive dot, conductive line, nanoimprint, transparent conductive layer

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a light emitting diode device having conductive dots or conductive lines.

Light emitting diodes are widely used light sources in semiconductor devices. Compared with conventional incandescent lamps or fluorescent tubes, light emitting diodes have advantages in that they save electricity and have a long life span. Therefore, the conventional light sources are being gradually replaced and used in various fields such as traffic lights, backlight modules, It is used in industry. As utilization and power generation of light emitting diode light source are getting wider, the demand for luminance is increasing, and increasing the luminance by improving the luminous efficiency has become an important research direction jointly in this field.

Here, there is a method of increasing the surface area of the die by a method of improving the output and the luminous flux of the light emitting diode element. However, when the die is enlarged, the current can not be uniformly dispersed from the contact electrode to the light emitting layer. When the die is enlarged and the contact electrodes are also made large together, the current can be uniformly dispersed, but acts to cut off the light, thereby reducing the light emitting area. Therefore, all of these methods can not improve the light emitting efficiency of the light emitting diode. Therefore, it is a problem to be solved in the future to uniformly disperse the current in the light emitting layer and improve the light emitting efficiency of the light emitting diode under the premise that the area of the contact electrode is not changed.

Conventionally, a method of obtaining the effect of current dispersion by using a semi-transparent current spreading layer formed on a P-type semiconductor layer is used. In general, the thinner the current dispersion layer is, the lower the light absorption effect is, and the thinner the current dispersion layer, the more the sheet resistance becomes larger.

An object of the present invention is to provide a semiconductor device capable of uniformly dispersing an electric current in a light emitting layer and improving light emitting efficiency of a light emitting diode.

SUMMARY OF THE INVENTION The present invention is based on the discovery that a nano-imprint process is used to provide a conductive structure between an electrode and a semiconductor stacked layer so that current is uniformly dispersed in the stack of semi- And a semiconductor device. The conductive structure may be a conductive dot or a conductive line, and the width of the bottom and the width of the top may have a specific ratio, or the height may be greater than the width of the bottom or the width of the top Or the width of either the bottom part or the top part is smaller than the light emitting wavelength of the semiconductor element. In addition, one roughing structure or periodic concave-convex structure can be formed on the semiconductor laminated surface.

The present invention also relates to a method of manufacturing a semiconductor device, which comprises sequentially forming an electrode, a transparent electrode, a conductive structure and a semiconductor lamination in the order from top to bottom, or sequentially including an electrode, a first transparent electrode, a conductive structure, An electrode, a conductive structure, and a semiconductor lamination layer sequentially.

The present invention is also directed to a method of manufacturing a semiconductor device comprising the steps of: forming a protective layer on a sidewall of a conductive structure disposed between an electrode and a semiconductor stacked layer to strengthen a bottom portion of the conductive structure to increase a ratio of height and width of the conductive structure; A semiconductor device capable of solving the problem of easily tilting a conductive structure when it is provided. Further, by forming the plurality of channels in the semiconductor light-emitting laminate by filling the insulating protective layer by performing the etching process using the conductive structure as a photomask, the number of photomasks required for the manufacturing process can be reduced, Device.

The present invention also provides a semiconductor device comprising a semiconductor laminate and a conductive structure. The semiconductor stack includes a first semiconductor layer, an active layer and a second semiconductor layer, and the conductive structure is formed in the first semiconductor layer or the second semiconductor layer.

Through the conductive structures having the above-described various constructions, current can be uniformly dispersed in the semiconductor stack through the electrodes, and the luminous efficiency can be improved.

The present invention relates to a method of forming a conductive structure, for example, a plurality of conductive dots or conductive lines between an electrode of a semiconductor element and a semiconductor stacked layer by using a nanoimprint technique and a method in which a current flows from an electrode through conductive dots or conductive lines, To be uniformly dispersed. The width of the conductive structure formed by the nanoimprint technique is very small and is smaller than the emission wavelength of the semiconductor device. Therefore, the luminous efficiency of the semiconductor device can be efficiently improved without causing a significant light blocking phenomenon. The structure is not limited to a specified semiconductor device, and can be applied to, for example, a light emitting device, a solar energy photoelectric device, or a diode device. In accordance with the above technical features, the present invention exemplifies various different embodiments and is described in detail below.

1A to 1G are diagrams showing respective steps of a semiconductor device manufacturing process according to a first embodiment of the present invention. 1A, a photoresist layer 102 is formed on a temporary substrate 101 and a nano template 103 having a nanostructure is manufactured. Thereafter, the nanoimprinting step shown in FIG. 1B was performed, and the nanostructure of the nanotemplate 103 already prepared was imprinted on the photoresist layer 102 to form a trapezoidal patterned photoresist layer 104. 1C, a semiconductor stack including a first semiconductor layer 112, an active layer 113, and a second semiconductor layer 114 is further formed on a substrate 111, and as shown in FIG. 1B, A trapezoidal patterned photoresist layer 104 formed in one stage 2 was connected over the second semiconductor layer 114. [ Then, as shown in Fig. 1D, the temporary substrate 101 was removed using a peeling process. Then, by etching the surface of the patterned photoresist layer 104 using an O 2 plasma (O 2 Plasma) to remove a portion of the photoresist layer, a trapezoidal shaped photoresist layer 105 of the opposite configuration shown in FIG. . Next, as shown in FIG. 1F, a conductive material is injected into a space between the molding photoresist layers 105 by a sputtering method or an electron beam evaporation (E-beam) method, The photoresist layer 105 was removed. Through this process, a plurality of conductive dots 115 having a narrow stomach and a wide lower triangular shape are obtained. The actual shape of the conductive dots is shown in Fig. 9, that is, as shown in a photograph by a scanning electron microscope (SEM). The conductive dot 115 has a width W1 of the bottom portion in contact with the second semiconductor layer 114 and a width W2 of the top portion and a width W1 of the bottom portion located on the opposite sides of the width W1 of the bottom portion, And a height H that is a distance between the widths W2. The width W1 of the bottom portion is smaller than 5 占 퐉 and preferably between 0.1 占 퐉 and 3 占 퐉. It is preferable that the width W2 of the upper end portion is smaller than 0.7 times the width W1 of the bottom portion and smaller than 0.35 times the width W1 of the bottom portion or close to the triangular shape. On the other hand, the height H is preferably larger than the width W1 of the bottom portion and 1.5 times or more of the width W1 of the bottom portion. The width W1 of the bottom portion and the width W2 of the top portion according to the present embodiment may be smaller than the light emitting wavelength of the semiconductor device and the height H may be larger than 50 mu m.

1G, after the transparent conductive layer 116 is formed on the conductive dot 115, a first electrode 117 is formed on the transparent conductive layer 116, a first electrode 117 is formed on the substrate 111 The second electrode 118 is formed on the lower portion of the first electrode 118 to complete a semiconductor device having a plurality of conductive dots uniformly dispersing the current according to the present embodiment. Through the structural design of such a semiconductor device, the electric current is transferred from the first electrode 117 in the lateral direction through the transparent conductive layer 116, and then uniformly dispersed and distributed through the conductive dot 115, The current is not concentrated on only the lower region of the first electrode 117. [ FIG. 1H is a plan view of FIG. 1G according to the present embodiment, showing that the conductive dots 115 are uniformly distributed in a semiconductor element in a dot shape.

The temporary substrate 101 may be a metal substrate, an insulating substrate, a semiconductor substrate, or a thermoplastic polymer substrate. For example, a copper (Cu) substrate, a nickel (Ni) substrate, an epoxy resin substrate, a sapphire ) Substrate or a gallium nitride (GaN) substrate can be used. The substrate 111 may be formed of a material such as sapphire, silicon carbide (SiC), silicon (Si), zinc oxide (ZnO), magnesium oxide (MgO), aluminum nitride (AlN), gallium nitride (GaN) , Gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), gallium arsenide phosphide (GaAsP) or a metal substrate such as a copper (Cu) substrate and a nickel (Ni) substrate. The photoresist layer 102 may be a soft metal layer, a UV glue, a thermoset material, a thermoplastic polymer layer, or an indium tin oxide (ITO) layer. The imprint template 103 can be formed by patterning a material such as silicon (Si), nickel (Ni), gallium nitride (GaN), quartz, sapphire and a polymer material. The first semiconductor layer 112, the active layer 113 and the second semiconductor layer 114 undergo an epitaxy process on a semiconductor material of aluminum indium gallium phosphide (AlGaInP) or indium gallium nitride (InGaN) . The conductive dots 115 may be formed of gold (Au), silver (Ag), chromium / gold (Cr / Au), gold / beryllium-gold / gold (Au / BeAu / Au) or gold / germanium-gold- Au / GeAuNi / Au) or carbon nanotubes. The transparent conductive layer 116 is formed of indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide (CTO), zinc oxide (ZnO), indium oxide, tin oxide, Gallium, strontium oxide, copper, or carbon nanotubes. The first electrode 117 and the second electrode 118 may be formed of a metal such as Cr / Au, Ti / Pt / Au, Au / BeAu / Au, Or gold / germanium-gold-nickel / gold (Au / GeAuNi / Au). The same reference numerals are used for the same parts in the other drawings to be described below and will not be described repeatedly.

2A and 2B illustrate a second embodiment of the present invention. The manufacturing method and structure of the second embodiment are substantially similar to those of the first embodiment, except that the conductive line 116 is used instead of the conductive dot 115 . As shown in FIG. 2B, the current is uniformly dispersed throughout the semiconductor device through the variously patterned conductive lines 121. The conductive line 121 has a width W1 of the bottom portion in contact with the second semiconductor layer 114 and a width W2 of the top portion and a width W1 of the bottom portion located on the opposite sides of the width W1 of the bottom portion, And a height H that is a distance between the first and second surfaces W1 and W2. It is preferable that the width W1 of the bottom portion is less than 5 mu m and 0.1 mu m to 3 mu m and the width W2 of the top portion is less than 0.7 times the width W1 of the bottom portion and 0.35 times the width W1 of the bottom portion It is preferable that it is a structure which is smaller or has a shape close to a triangular shape. On the other hand, the height H is preferably larger than the width W1 of the bottom portion and 1.5 times the width W1 of the bottom portion. The conductive line 121 according to this embodiment has a long band shape whose cross section is close to a triangle, and its actual shape is the same as that shown in a scanning electron microscope (SEM) photograph shown in Fig.

The present invention can also form a roughness-processed structure 131 by performing a roughing process on the surface of the second semiconductor layer 114 as in the third embodiment shown in FIG. 3A. Alternatively, the periodic or almost periodic concavo-convex structure 132 may be formed on the surface of the second semiconductor layer 114 as in the fourth embodiment of the present invention shown in FIG. 3B. Light can be efficiently guided from the active layer 113 through the two types of structures to improve the luminous efficiency of the semiconductor device.

The nanoimprint technique according to the present invention differs from the conventional photomask technology, and a photoresist pattern having a smaller line width can be formed simply and efficiently, and a subsequent patterning process can be easily performed. 3C, the conductive line 121 is formed on the surface 133 of the second semiconductor layer 114 having a roughness (Ra) of 0.1 mu m to 3 mu m using a nanoimprint technique as shown in FIG. 3C 3D, a photoresist pattern is formed on the second semiconductor layer 114 using a nanoimprint technique as shown in FIG. 3D, and then an etching process is performed on the second semiconductor layer 114 A plurality of channels 122 are formed on the transparent conductive layer 116 and then a conductive line 121 is injected into the plurality of channels to form one plane 134, (117). ≪ / RTI >

4A is a view showing a semiconductor device according to a seventh embodiment of the present invention. As shown in the figure, in this embodiment, a conductive line 121 having various patterns is formed under the first electrode 117 and directly electrically connected to the first electrode 117. Therefore, the current is uniformly dispersed throughout the device through the conduction of the conductive line 121 directly from the first electrode 117. The first electrode 117 having a finger-like extension pattern (not shown) may be designed on the conductive line 121. When the conductive line 121 is disconnected, So that it can still be electrically conducted through the finger-shaped extension pattern provided on the base 117. The main characteristic of the eighth embodiment according to the present invention as shown in FIG. 4B is that a first transparent conductive layer 141 is first formed on the second semiconductor layer 114, and then the first transparent conductive layer 141 And then the first electrode 117 is formed on the second transparent conductive layer 142. The second transparent conductive layer 142 is formed on the second transparent conductive layer 142,

5 is a view showing a semiconductor device according to a ninth embodiment of the present invention. The manufacturing method and structure of the semiconductor device are substantially similar to those of the first embodiment, except that they further include a protective layer 151. The protective layer 151 covers the side surface of the conductive line 121 to increase the adhesion strength between the conductive line 121 and the second semiconductor layer 114 so that when the ratio of the height and width of the conductive line 121 increases Thereby solving the problem that the conductive line 121 is dropped due to insufficient supporting force. Here, the passivation layer 151 may be made of a transparent material such as silicon dioxide or a polymer material, and may be formed by a sol-gel method or a spin coating method, A protective layer 151 was formed on the side surface.

6 is a view showing a semiconductor device according to a tenth embodiment of the present invention. In the method of forming the semiconductor device according to the present embodiment, first, the conductive line 121 is formed on the second semiconductor layer 114 of the semiconductor laminated layer by using the nanoimprint technique, Mask is used as a mask and an etching process is performed on the semiconductor stack by using inductively coupled plasma etching to form a columnar semiconductor stacked structure and a plurality of channels below the conductive line 121 Respectively. Next, an insulating material is filled in the plurality of channels to form an insulating protective layer 161, and finally, a transparent conductive layer 162 and a first electrode 117 are formed on the insulating protective layer 161 Thereby completing the semiconductor device according to the present embodiment. The luminous efficiency of light from the semiconductor laminate can be improved through the columnar semiconductor lamination. Here, the transparent protective layer may be made of a material such as epoxy resin (Epoxy), silicon dioxide (SiO ₂ ), or the like.

The structures of all the embodiments described above are not limited to conductive dots or conductive lines, and they may be compatible with each other or may exist at the same time, or may be of another conductive structure having the same characteristics. Further, the material is not limited to a metal material, and any material having a conductive property can be used. The conductive dots or conductive lines according to the present invention are not limited to those located between the electrode and the semiconductor laminate but can also be used to distribute current by locating the upper and lower sides of the semiconductor laminate or inside the semiconductor laminate or between different semiconductor laminate layers .

7 is a diagram showing a backlight module device. The backlight module device includes a light source device 710 composed of a semiconductor device 711 according to an arbitrary embodiment, an optical device 720 installed in a light emitting path of the light source device 710 for processing and outputting light, And a power supply system 730 for supplying necessary power to the power supply units 710 and 710.

8 is a view showing a lighting device. The lighting device may be an automobile lamp, a portable light, a street light, an indicator light, and the like. The illumination device includes a light source device 810 composed of a semiconductor device 811 according to any embodiment, a power supply system 820 supplying power necessary for the light source device 810 and a light source device 810 And a control element 830 for controlling a power source to be inputted to the power source 810.

Although the embodiments of the present invention have been described above, the scope of the present invention is not limited thereto, and various modifications and variations of the present invention are within the scope of the present invention.

1A is a diagram showing a first step of manufacturing a semiconductor device according to a first embodiment of the present invention.

1B is a view showing a second step of manufacturing a semiconductor device according to the first embodiment of the present invention.

1C is a view showing a third step of manufacturing a semiconductor device according to the first embodiment of the present invention.

FIG. 1D is a view showing a fourth step of manufacturing a semiconductor device according to the first embodiment of the present invention.

1E is a view showing a fifth step of manufacturing a semiconductor device according to the first embodiment of the present invention.

FIG. 1F shows a sixth step of manufacturing a semiconductor device according to the first embodiment of the present invention.

1G is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention.

1H is a plan view of a semiconductor device according to the first embodiment of the present invention.

2A is a cross-sectional view of a semiconductor device according to a second embodiment of the present invention.

2B is a plan view of a semiconductor device according to a second embodiment of the present invention.

3A is a cross-sectional view of a semiconductor device according to a third embodiment of the present invention.

3B is a cross-sectional view illustrating a semiconductor device according to a fourth embodiment of the present invention.

3C is a cross-sectional view of a semiconductor device according to a fifth embodiment of the present invention.

FIG. 3D is a diagram showing a cross-sectional structure of a semiconductor device according to a sixth embodiment of the present invention.

4A is a cross-sectional view of a semiconductor device according to a seventh embodiment of the present invention.

4B is a cross-sectional view of a semiconductor device according to an eighth embodiment of the present invention.

5 is a cross-sectional view of a semiconductor device according to a ninth embodiment of the present invention.

6 is a cross-sectional view of a semiconductor device according to a tenth embodiment of the present invention.

7 is a diagram illustrating a backlight module device of the present invention.

8 is a view showing a lighting apparatus of the present invention.

9 is a SEM photograph of the conductive dot of the present invention.

10 is a SEM photograph of the conductive line of the present invention.

Description of the Related Art

101: temporary substrate 102: photoresist layer

103: Imprint template 104: Patterned photoresist layer

105: Molded photoresist layer 111:

112: first semiconductor layer 113: active layer

114: second semiconductor layer 115: conductive dots

116: transparent conductive layer 117: first electrode

118: second electrode 121: conductive line

122: channel

131: Roughness structure 132: Periodic concave and convex structure

141: first transparent conductive layer 142: second transparent conductive layer

151: protection layer 161: insulation protection layer

162: transparent conductive layer 710: light source device

711: Semiconductor device 720: Optical device

730: Power supply system 810: Light source device

820: Power supply system 811: Semiconductor device

830: Control element

Claims (15)

A semiconductor stacked layer; And And a width of the top portion located on the opposite side of the width of the bottom portion and a width of the bottom portion contacting the width of the bottom portion, A conductive structure having a ratio of less than 0.7; And A protective layer formed on a side wall of the conductive structure; ≪ / RTI > The method according to claim 1, Wherein a width of the bottom portion is smaller than 5 占 퐉 or smaller than an emission wavelength emitted by the semiconductor element. The method according to claim 1, Further comprising a roughened structure or a periodic concavo-convex structure formed on the surface of the semiconductor laminate, or wherein an average roughness (Ra) of the semiconductor laminate surface is larger than 0.1 mu m. The method according to claim 1, Further comprising a transparent conductive layer covering the top of the conductive structure or another transparent conductive layer formed between the conductive structure and the semiconductor stack. The method according to claim 1, Wherein the conductive structure is a conductive line structure, and an electrode is directly formed on the conductive line structure. Semiconductor stacking; A height formed on the semiconductor laminate and being a distance between the width of the bottom portion in contact with the semiconductor stack, the width of the top portion located on the opposite side of the width of the bottom portion, and the width of the bottom portion and the width of the top portion, A conductive structure larger than the width of the bottom portion; And A protective layer formed on a side wall of the conductive structure; ≪ / RTI > The method according to claim 6, Wherein a width of the bottom portion is smaller than an emission wavelength emitted by the semiconductor element. delete delete delete delete delete delete delete delete

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