KR101374111B1 - Electrostatic Discharging Circuit of Thin Film Transistor and Method for Fabricating the Same - Google Patents

Electrostatic Discharging Circuit of Thin Film Transistor and Method for Fabricating the Same Download PDF

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KR101374111B1
KR101374111B1 KR1020070120220A KR20070120220A KR101374111B1 KR 101374111 B1 KR101374111 B1 KR 101374111B1 KR 1020070120220 A KR1020070120220 A KR 1020070120220A KR 20070120220 A KR20070120220 A KR 20070120220A KR 101374111 B1 KR101374111 B1 KR 101374111B1
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gate lines
conductive patterns
layer
thin film
semiconductor layer
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KR1020070120220A
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Korean (ko)
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KR20090053385A (en
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송인덕
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엘지디스플레이 주식회사
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136204—Arrangements to prevent high voltage or static electricity failures

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)

Abstract

The present invention relates to an antistatic circuit of a thin film transistor, and more particularly, to an antistatic circuit of a thin film transistor capable of protecting a device from static electricity through a simple structure.

The present invention includes a plurality of gate lines formed in one direction to be parallel to each other on a substrate; A semiconductor layer insulated from the plurality of gate lines and formed in another direction crossing the plurality of gate lines; A plurality of conductive patterns corresponding to the plurality of gate lines and formed to intersect the plurality of gate lines; And a plurality of connection patterns corresponding to the plurality of gate lines and the plurality of conductive patterns and electrically connecting the gate lines and the respective conductive patterns that cross each other, wherein the plurality of conductive patterns include: And spaced apart from each other and connected to the semiconductor layer.

Thin film transistor, electrostatic, equipotential, semiconductor layer

Description

Electrostatic Discharging Circuit of Thin Film Transistor and Method for Fabricating the Same

The present invention relates to an antistatic circuit of a thin film transistor, and more particularly, to an antistatic circuit of a thin film transistor capable of protecting a device from static electricity through a simple structure.

As the information society develops, various demands on display devices are diversified, such as plasma display panels (PDPs), field emission displays (FEDs), and organic light emitting diodes (OLEDs), which replace the conventional cathode ray tube (CRT). Branch flat panel displays have emerged.

As described above, various flat panel display devices include a plurality of pixels arranged in a matrix on a substrate, and a passive matrix drive type flat panel display device and an active matrix drive type according to a method of driving the pixels arranged in the matrix. It is classified as a flat panel display device.

An active matrix driving method capable of driving each pixel independently is widely adopted.

As such, in order to drive each pixel, a switching device capable of turning on / off a pixel for each pixel is required, and a thin film transistor is used as the switching device.

1 is a cross-sectional view showing a cross section of an inverted staggered thin film transistor which is widely used for driving a liquid crystal display among conventional thin film transistors.

As shown in Figure 1, the conventional inverted staggered thin film transistor,

A gate electrode 12 formed on the substrate 5, a gate insulating film 32 formed to cover the gate electrode, a semiconductor layer 26 formed on the gate insulating film so as to correspond to an upper gate electrode, and the semiconductor layer It is composed of a source electrode 22 and a drain electrode 24 formed to face each other on the upper side,

The semiconductor layer 26 may further include an ohmic contact layer 28 formed to allow ohmic contact between the semiconductor layer, the source electrode, and the drain electrode.

In addition, the pixel electrode 38 connected to the drain electrode through the passivation layer 30 formed to cover the source electrode and the drain electrode, and the contact hole 36 formed by removing a portion of the passivation layer to expose a portion of the drain electrode. ) May be further provided.

The pixel electrode is connected to the drain electrode through a contact hole formed by removing a portion of the passivation layer so as to expose a part of the drain electrode.

In the thin film transistor having such a structure, when a turn-on signal is supplied from the gate line to the gate electrode, a channel through which the electrons can move between the source electrode and the drain electrode is formed through the semiconductor layer,

When the gate electrode is turned off, the channel is closed to perform a function as a switching element.

However, in the case of a flat panel display device including a thin film transistor substrate having thin film transistors for driving a plurality of pixels, as the patterns are finer to realize high resolution, a plurality of patterns are densified in a narrow area to prevent static electricity. There is a problem that becomes vulnerable.

In particular, in addition to the active region in which an image is implemented, the link portion region receiving a signal from an external circuit has a structure that is more vulnerable to such static electricity because the pattern density is high.

In order to prevent the device from being damaged by the static electricity, when static electricity flows through the three transistors T1, T2, and T3 as shown in FIGS. 2 and 3, between the gate line GL and the common line CL. To prevent static electricity by forming an antistatic circuit to form an equipotential in the

In this case, as the width of the wiring, the distance between the wiring, the contact hole size, etc. become constraints, it becomes difficult to implement an antistatic circuit as the definition becomes more fine.

For reference, FIG. 2 is a view showing an example of a circuit diagram of a conventional antistatic circuit, and FIG. 3 is a plan view showing a pattern of the antistatic circuit according to FIG.

In order to solve the above problems, the present invention implements an antistatic circuit with a simple structure to prevent damage to a device by static electricity and to implement an antistatic circuit even in a region where a plurality of patterns are dense. Provide the effect of enabling it.

In order to solve the above problems, an antistatic circuit of a thin film transistor according to an embodiment of the present invention includes a plurality of gate lines formed in one direction to be parallel to each other on a substrate; A semiconductor layer insulated from the plurality of gate lines and formed in another direction crossing the plurality of gate lines; A plurality of conductive patterns corresponding to the plurality of gate lines and formed to intersect the plurality of gate lines; And a plurality of connection patterns corresponding to the plurality of gate lines and the plurality of conductive patterns and electrically connecting the gate lines and the respective conductive patterns that cross each other, wherein the plurality of conductive patterns include: Spaced apart from each other and connected to the semiconductor layer.
In the method of manufacturing an antistatic circuit of a thin film transistor according to an exemplary embodiment of the present invention, a first metal layer on a substrate is patterned to form a plurality of gate lines parallel to each other and a light shielding pattern provided in an area between the gate lines. step; Forming an insulating layer on the entire surface of the substrate to cover the plurality of gate lines and the light blocking pattern; Sequentially forming a semiconductor material layer and a second metal layer on the insulating film; Patterning the semiconductor material layer and the second metal layer to form a semiconductor layer intersecting the plurality of gate lines and a plurality of conductive patterns corresponding to the plurality of gate lines; Forming a protective film on the entire surface of the insulating film to cover the semiconductor layer and the plurality of conductive patterns; Patterning the passivation layer to form a first contact hole exposing a portion of the conductive pattern and a second contact hole exposing a portion of the gate line; And forming a plurality of connection patterns corresponding to the plurality of gate lines and the plurality of conductive patterns on the passivation layer.
Among the plurality of conductive patterns, in the forming of the semiconductor layer and the plurality of conductive patterns, each of the plurality of conductive patterns intersects and spaces apart from each of the plurality of gate lines, and is connected to the semiconductor layer, and the plurality of connection patterns In the forming of the plurality of connection patterns, each of the plurality of connection patterns electrically connects each of the gate lines and the respective conductive patterns that cross each other through the first and second contact holes.

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An antistatic circuit of a thin film transistor according to an embodiment of the present invention,

Usually, each conductive pattern has the same potential as each gate line because the semiconductor layer does not pass current. However, when a high voltage static electricity flows through one gate line, all the conductive patterns and gate lines pass through the semiconductor layer. By forming the equipotential, it is possible to prevent the patterns formed on the thin film transistor substrate from being damaged by static electricity.

In addition, the antistatic circuit of the thin film transistor according to the exemplary embodiment of the present invention has a simple structure, and thus, it is possible to correspond to a high definition display device.

Next, the antistatic circuit of the thin film transistor according to the embodiment of the present invention will be described in detail.

An antistatic circuit of a thin film transistor according to an embodiment of the present invention,

A plurality of gate lines formed to be parallel to each other on the substrate, a plurality of conductive patterns formed to cross each gate line and the insulating layer corresponding to the respective gate lines, and a connection pattern electrically connecting the gate lines and the conductive patterns to each other; It is configured to include,

The conductive pattern may be formed to face an adjacent conductive pattern and a spaced area therebetween, and a semiconductor layer connected to each of the adjacent conductive patterns may be formed in the spaced area.

Next, the antistatic circuit of the thin film transistor according to the first embodiment of the present invention will be described in detail with reference to the accompanying drawings.

An antistatic circuit of a thin film transistor according to a first embodiment of the present invention may include, for example, a liquid crystal display having a display area in which a plurality of pixels are formed in a matrix form and a non-display area surrounding the display area in a frame shape. It will be possible to be applied to the thin film transistor substrate constituting.

4A is a plan view of the antistatic circuit of the thin film transistor according to the first embodiment of the present invention, and FIG. 4B is a cross-sectional view showing a cross-section of a part of FIG. 4A.

As can be seen in Figures 4a and 4b, the antistatic circuit of the thin film transistor according to the first embodiment of the present invention,

A plurality of gate lines GL n and GL n +1 formed on the substrate 100 so as to be parallel to each other, and a plurality of conductive patterns formed to cross each gate line and the insulating layer 115 corresponding to the respective gate lines. 130a and 130b, protrusions 160a and 160b extending from the gate line, a connection pattern 140 electrically connecting the protrusions and the conductive pattern, and a semiconductor layer 120a formed in a region between the conductive patterns. It is configured to include).

That is, the conductive patterns 130a and 130b are formed such that adjacent conductive patterns face each other with a spaced area therebetween, and the semiconductor layer 120a is exposed in a region between spaced conductive patterns, that is, a spaced area.

In addition, the semiconductor layer 120a is connected to both of the adjacent conductive patterns 130a and 130b. That is, when a general gate signal is supplied through a gate line, the semiconductor layer acts as a non-conductor to insulate each gate line, but when high voltage static electricity flows through the gate line, the semiconductor layer acts as a conductor. The conductive patterns and gate lines are equipotential to protect the device from static electricity.

The substrate 100 may be formed of a transparent insulating substrate, such as a glass substrate or a plastic substrate, or a metal foil having a buffer film.

The display area may be divided into a display area including a plurality of pixels arranged in a matrix and a non-display area formed to surround the display area.

In this case, although not shown, in the display area on the substrate, like a thin film transistor substrate in a general liquid crystal display device, a plurality of data lines defining a pixel area crossing the gate line and pixel electrodes formed for each of the pixel areas And a thin film transistor formed at an intersection of the gate line and the data line and connected to the pixel electrode.

The thin film transistor includes a gate electrode formed to branch from the gate line, a gate insulating film formed to cover the gate electrode, an active layer formed on the insulating film, and a source electrode formed on the semiconductor layer and branched from the data line. And a drain electrode formed to face the source electrode.

The gate line may receive a gate signal from an external circuit and turn on the thin film transistor connected to the gate line, thereby charging the pixel electrode with a data voltage supplied through the data line.

The gate insulating layer may be formed of, for example, an inorganic insulating layer such as silicon nitride (SiNx) or silicon oxide (SiOx).

The pixel electrode is connected to the drain electrode through a contact hole formed so that a portion of the protective film formed on the entire surface of the substrate including the source electrode and the drain electrode is removed to expose a portion of the drain electrode.

The protective film may be formed of an inorganic insulating film such as silicon nitride or silicon oxide, like the insulating film.

In addition, the antistatic circuit of the thin film transistor according to the first embodiment of the present invention may further include a light shielding pattern 110 formed to overlap the exposed semiconductor layer 120a.

In addition, the pixel electrode may be formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

For example, the light blocking pattern 110 may be formed of the same layer as the gate lines GL n and GL n +1 .

That is, the light blocking pattern 110 is formed of a metal that does not transmit light, and blocks light emitted from the backlight unit positioned on the rear surface of the substrate, thereby generating a photo current in the semiconductor layer 120a. To prevent them.

The conductive patterns 130a and 130b may be formed of the same layer as the data line.

In addition, a passivation layer 135 formed to cover the entire surface of the substrate including the conductive pattern may be further formed on the conductive pattern, and the passivation layer may be formed of the same layer as the passivation layer formed on the source electrode and the drain electrode.

In addition, the insulating film 115 interposed between the light shielding pattern and the conductive pattern may be formed of the same layer as the insulating film formed on the gate electrode.

The semiconductor layer 120a may be formed under the conductive pattern in addition to the region exposed through the separation region, or may be formed by floating only in the separation region.

The connection pattern is connected to the conductive pattern through the first contact hole 150a formed by removing a portion of the passivation layer 135 formed on the conductive pattern to expose a portion of the conductive pattern.

A portion of the insulating layer and the protective layer is removed to expose a portion of the protrusions 160a and 160b extending from the gate line and connected to the protrusion through the second contact hole 150b.

In addition, the connection pattern may be formed of the same layer as the pixel electrode formed in the display area.

As described above, in the antistatic circuit of the thin film transistor according to the first embodiment of the present invention, since each conductive pattern has the same potential as that of each gate line since the semiconductor layer does not normally pass current, When a high voltage of static electricity flows through all the conductive patterns and gate lines through the semiconductor layer to form an equipotential,

It is possible to prevent the patterns formed on the thin film transistor substrate from being damaged by static electricity.

In addition, the antistatic circuit of the thin film transistor according to the first exemplary embodiment of the present invention has a simple structure, and thus, it is possible to correspond to a high definition display device.

Next, an antistatic circuit of the thin film transistor according to the second embodiment of the present invention will be described. 5 is a plan view illustrating an antistatic circuit of a thin film transistor according to a second exemplary embodiment of the present invention.

An antistatic circuit of a thin film transistor according to a second embodiment of the present invention,

A plurality of gate lines GL n and GL n +1 formed on the substrate to be parallel to each other, and a plurality of conductive patterns 130a formed to cross each gate line and the insulating layer 115 in correspondence to the respective gate lines. 130b), a connection pattern 140 electrically connecting the gate line and the conductive pattern, and a semiconductor layer 120a formed in a region between the conductive patterns.

The conductive pattern is formed to face the adjacent conductive pattern and the spaced area therebetween, and the semiconductor layer 120a connected to each of the adjacent conductive patterns is exposed in the spaced area.

In addition, the antistatic circuit of the thin film transistor according to the second embodiment of the present invention may further include a light shielding pattern 110 formed to overlap the exposed semiconductor layer 120a.

In addition, the connection pattern 140 is connected to the conductive pattern through the first contact hole 150a formed by removing a portion of the protective layer so as to expose a portion of the conductive pattern.

A portion of the insulating layer and the passivation layer are removed to expose a portion of the gate line and is directly connected to the gate line through the second contact hole 150b.

As described above, the antistatic circuit of the thin film transistor according to the second embodiment of the present invention is the first embodiment of the present invention, except that the connection pattern is directly connected to the gate line, not the protrusion formed by extending from the gate line. Since it has the same configuration as the antistatic circuit of the thin film transistor according to the example,

The description of other components will be replaced with the above description.

As described above, in the antistatic circuit of the thin film transistor according to the second embodiment of the present invention, the connection pattern is directly connected to the gate line instead of the protrusion formed by extending from the gate line,

The high-definition flat panel display in which the spacing between the gate lines is formed more densely has an effect that can be dealt with more effectively.

Next, a method of manufacturing an antistatic circuit of a thin film transistor according to an embodiment of the present invention will be described.

Method of manufacturing an antistatic circuit of a thin film transistor according to an embodiment of the present invention,

Forming a plurality of gate lines formed in parallel with each other on the substrate and a light blocking layer pattern provided in a region between the gate lines, forming an insulating film to cover the light blocking layer pattern, and forming a semiconductor material over the insulating film Forming a layer and a metal layer in turn, and removing a portion of the metal layer to expose a semiconductor layer corresponding to the light shielding layer pattern in the semiconductor material layer, and cross each other to correspond to each of the gate lines; Forming a plurality of conductive patterns to face each other and facing each other, forming a protective film on the entire surface of the substrate including the conductive pattern, and removing a portion of the protective film and the insulating layer to expose a portion of the conductive pattern. Forming a second contact hole exposing a hole and a portion of the gate line; And forming a connection pattern to cover the first contact hole and the second contact hole at the same time.

6A to 6D are cross-sectional views illustrating a method of manufacturing an antistatic circuit of a thin film transistor according to an exemplary embodiment of the present invention, and correspond to the regions of FIGS.

First, as shown in FIG. 6A, after forming a first metal layer on the substrate 100, the metal layer is patterned to form gate lines GL n and GL n +1 and light blocking patterns 110.

The first metal layer may be formed of a single layer structure or a multilayer structure made of a metal such as Mo, Ti, Cu, Al, Al / Nd, or an alloy of these metals, but is not limited to these materials.

At this time, although not shown, the gate electrode on the substrate is also formed.

In addition, the gate line may be formed to have a protrusion formed by branching from the gate line.

Subsequently, an insulating film 115 is formed to cover the gate line and the light blocking pattern. The insulating film is preferably formed of an inorganic insulating film such as silicon nitride or silicon oxide.

Next, as shown in FIG. 6B, the semiconductor material layer 120 and the second metal layer 130 are sequentially stacked on the insulating layer.

As the second metal layer, Cr, Mo, MoW, Al / Cr, Cu, Al (Nd), Al / Mo, Al (Nd) / Al, Al (Nd) / Cr, Mo / Al (Nd) / Mo A metal material such as Cu / Mo, Ti / Al (Nd) / Ti may be used, and may be formed of the same layer as the data line, the source electrode, and the drain electrode formed in the display area on the substrate.

Next, as shown in FIG. 6C, only a part of the second metal layer is selectively removed to form conductive patterns 130a and 130b spaced apart from each other.

As such, the semiconductor layer 120a is exposed through the region from which a part of the second metal layer is removed.

Each of the conductive patterns corresponds to the gate line, and is formed to intersect the insulating line 115 with the gate lines GL n and GL n +1 .

In addition, the arbitrary conductive patterns 130a are formed to face each other between the adjacent conductive patterns 130b and a spaced area, that is, a region from which a part of the second metal layer is removed.

The semiconductor layer 120a is formed to be connected to both adjacent conductive patterns 130a and 130b.

Next, as shown in FIG. 6D, the passivation layer 135 is formed to cover the entire surface of the substrate including the conductive patterns 130a and 130b. In this case, the protective film is preferably formed of an inorganic insulating film such as silicon nitride or silicon oxide.

Thereafter, the passivation layer and the insulating layer are patterned to form a first contact hole 150a exposing a portion of the conductive pattern and a second contact hole exposing a portion of the gate line.

At this time, when the protrusion is formed in the gate line, it is also possible to form the second contact hole above the protrusion.

Next, after depositing a transparent conductive material on the entire surface of the substrate, the transparent conductive material is patterned to form a connection pattern to cover the first contact hole and the second contact hole at the same time.

That is, the connection pattern is connected to the conductive pattern through the first contact hole and to the gate line through the second contact hole.

In addition, the connection pattern may be formed of a transparent conductive material such as, for example, indium tin oxide (ITO) or indium zinc oxide (IZO), and may be formed of the same layer as the pixel electrode of the display area. It can be formed as.

As described above, the method of manufacturing the antistatic circuit of the thin film transistor according to the embodiment of the present invention, when a high voltage static electricity flows through the gate line without adding a separate process, all the conductive pattern and The gate line can form an equipotential to form an antistatic circuit that can protect the device,

At the same time, by implementing the antistatic circuit of the thin film transistor in a simple structure, it is possible to effectively cope with high-definition flat panel display devices.

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible that various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention. It will be apparent to those with conventional knowledge in.

1 is a cross-sectional view showing a cross section of a conventional inverted staggered thin film transistor.

2 is a circuit diagram of an antistatic circuit of a conventional thin film transistor.

3 is a plan view showing a configuration of an antistatic circuit of the thin film transistor according to FIG. 2;

4A is a plan view showing the structure of an antistatic circuit of a thin film transistor according to a first embodiment of the present invention;

Fig. 4B is a sectional view showing a section of the Ι˜Ι´ portion in Fig. 4A.

5 is a plan view showing the configuration of an antistatic circuit of a thin film transistor according to a second embodiment of the present invention;

6A to 6D are cross-sectional views illustrating a method of manufacturing a thin film transistor according to an exemplary embodiment of the present invention.

 Description of the Related Art

5, 100: substrate 12: gate electrode

30, 135: protective films 32, 115: insulating films

26: active layer 28: ohmic contact layer

22 source electrode 24 drain electrode

36 contact hole 38 pixel electrode

GL n , GL n +1 : Gate line CL: Common line

110: shading pattern 130: second metal layer

120: semiconductor material layer 120a: semiconductor layer

130a, 130b: conductive pattern 140: connection pattern

150a: first contact hole 150b: second contact hole

160a, 160b: protrusions

Claims (7)

A plurality of gate lines formed in one direction to be parallel to each other on the substrate; A semiconductor layer insulated from the plurality of gate lines and formed in another direction crossing the plurality of gate lines; A plurality of conductive patterns corresponding to the plurality of gate lines and formed to intersect the plurality of gate lines; And A plurality of connection patterns corresponding to the plurality of gate lines and the plurality of conductive patterns and electrically connecting the gate lines and the conductive patterns that cross each other; The plurality of conductive patterns are spaced apart from each other, and the antistatic circuit of the thin film transistor, characterized in that connected to the semiconductor layer. The method of claim 1, The light blocking pattern may further include a light blocking pattern formed to prevent light from being transmitted below a spaced area between two adjacent conductive patterns among the plurality of conductive patterns. And the separation region is provided between two gate lines corresponding to the two conductive patterns among the plurality of gate lines. The method of claim 2, And the light blocking pattern is formed on the same layer as the plurality of gate lines. The method of claim 1, Further comprising a plurality of protrusions extending from the plurality of gate lines, One side of each connection pattern is connected to one of each of the gate lines and the protrusions extending from each gate line, and the other side of each connection pattern is connected to a conductive pattern crossing the one gate line. An antistatic circuit of a thin film transistor. delete 5. The method of claim 4, An insulating film formed on the entire surface of the substrate so as to cover the plurality of gate lines, and insulating the plurality of gate lines and the semiconductor layer; And A protective film is formed on the entire surface of the insulating film to cover the semiconductor layer and the plurality of conductive patterns. The plurality of connection patterns are formed on the passivation layer. Each of the plurality of connection patterns may include a first contact hole formed by removing the passivation layer to expose a portion of the conductive pattern crossing the one gate line, and a portion of any one of the one gate line and a protrusion extending therefrom. And a second contact hole formed by removing the insulating layer and the protective layer so as to be exposed, and electrically connecting the one gate line and the conductive pattern crossing the conductive line. Patterning a first metal layer on the substrate to form a plurality of gate lines parallel to each other and a light blocking pattern provided in a region between the gate lines; Forming an insulating layer on the entire surface of the substrate to cover the plurality of gate lines and the light blocking pattern; Sequentially forming a semiconductor material layer and a second metal layer on the insulating film; Patterning the semiconductor material layer and the second metal layer to form a semiconductor layer intersecting the plurality of gate lines and a plurality of conductive patterns corresponding to the plurality of gate lines; Forming a protective film on the entire surface of the insulating film to cover the semiconductor layer and the plurality of conductive patterns; Patterning the passivation layer to form a first contact hole exposing a portion of the conductive pattern and a second contact hole exposing a portion of the gate line; And Forming a plurality of connection patterns corresponding to the plurality of gate lines and the plurality of conductive patterns on the passivation layer, In the forming of the semiconductor layer and the plurality of conductive patterns, each of the plurality of conductive patterns intersects and spaces apart from each of the plurality of gate lines, and is connected to the semiconductor layer, In the forming of the plurality of connection patterns, each of the plurality of connection patterns may be electrically connected between each of the gate lines and the respective conductive patterns that cross each other through the first and second contact holes. Method for manufacturing an antistatic circuit of a thin film transistor.
KR1020070120220A 2007-11-23 2007-11-23 Electrostatic Discharging Circuit of Thin Film Transistor and Method for Fabricating the Same KR101374111B1 (en)

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KR102325191B1 (en) 2015-01-05 2021-11-10 삼성디스플레이 주식회사 Display Device

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KR20030058766A (en) * 2001-12-31 2003-07-07 엘지.필립스 엘시디 주식회사 Structure of mps test line for liquid crystal display
KR20030091333A (en) * 2002-05-27 2003-12-03 엘지.필립스 엘시디 주식회사 Liquid crystal display panel and fabricating method thereof

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KR20170057600A (en) * 2015-11-17 2017-05-25 엘지디스플레이 주식회사 Electrostatic Discharge Circuit, Backplane Substrate Applying the Same and Manufacturing the Same
KR102330861B1 (en) 2015-11-17 2021-11-24 엘지디스플레이 주식회사 Electrostatic Discharge Circuit, Backplane Substrate Applying the Same and Manufacturing the Same

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