KR101088878B1 - Apparatus for manufacturing poly-silicon thin film - Google Patents

Apparatus for manufacturing poly-silicon thin film Download PDF

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Publication number
KR101088878B1
KR101088878B1 KR1020100092884A KR20100092884A KR101088878B1 KR 101088878 B1 KR101088878 B1 KR 101088878B1 KR 1020100092884 A KR1020100092884 A KR 1020100092884A KR 20100092884 A KR20100092884 A KR 20100092884A KR 101088878 B1 KR101088878 B1 KR 101088878B1
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conductive
electrode
conductive electrode
electrode terminal
conductive layer
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KR1020100092884A
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Korean (ko)
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노재상
홍원의
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주식회사 엔씰텍
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Priority to PCT/KR2011/006363 priority patent/WO2012039552A2/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02425Conductive materials, e.g. metallic silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02595Microstructure polycrystalline
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/326Application of electric currents or fields, e.g. for electroforming
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/127Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1285Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors

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  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
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  • Crystallography & Structural Chemistry (AREA)
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Abstract

The present invention chamber; A substrate stage installed in the chamber and having a substrate including a conductive layer; A power supply unit installed in the chamber and including an electrode terminal including a support and a first conductive electrode positioned in a central region of the support; And a second conductive electrode positioned between the electrode terminal and the conductive layer.
Accordingly, the present invention can provide a polycrystalline silicon thin film manufacturing apparatus capable of forming a polycrystalline silicon thin film having a uniform crystallinity by forming a uniform electric field on the conductive layer.

Description

Apparatus for manufacturing Poly-Silicon thin film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for manufacturing a polycrystalline silicon thin film, and to an apparatus and method for producing a polycrystalline silicon thin film by generating joule heat by applying power to a substrate.

In general, amorphous silicon (a-Si) has disadvantages of low mobility and opening ratio of electrons, which are charge carriers, and incompatibility with CMOS processes. On the other hand, in the poly-silicon thin film device, it is possible to configure a driving circuit on the substrate like the pixel TFT-array, which is necessary for writing an image signal to the pixel, which was not possible in the amorphous silicon TFT (a-Si TFT). . Therefore, in the polycrystalline silicon thin film element, the connection between the plurality of terminals and the driver IC becomes unnecessary, so that the productivity and reliability can be increased and the thickness of the panel can be reduced. In addition, in the polycrystalline silicon TFT process, since the microfabrication technology of silicon LSI can be used as it is, a microstructure can be formed in wiring etc. Therefore, since there is no pitch constraint on the TAB mounting of the driver IC seen in the amorphous silicon TFT, pixel reduction is easy and a large number of pixels can be realized with a small field of view. The thin film transistor using polycrystalline silicon in the active layer has a high switching capability and the channel position of the active layer is determined by self-matching, compared with the thin film transistor using amorphous silicon, so that device miniaturization and CMOS are possible. For this reason, polycrystalline silicon thin film transistors are used as pixel switch elements in active matrix type flat panel displays (e.g., liquid crystal displays, organic ELs), and the like. It is emerging as a major device.

On the other hand, the inventors of the present invention in Korea Patent Application No. 2007-0021252 has proposed a method for crystallization by heating the joule by applying an electric field after interposing a conductive thin film on or below the silicon thin film.

1A is a schematic perspective view illustrating a conventional method of manufacturing a polycrystalline silicon thin film, FIG. 1B is a cross-sectional view taken along line II of FIG. 1A, and FIG. 1C is a plan view of FIG. 1A.

First, referring to FIGS. 1A and 1B, in the conventional method of manufacturing a polycrystalline silicon thin film, an amorphous silicon film 12 is formed on a substrate 11 made of glass, stainless steel, or plastic, and the amorphous silicon film ( 12, an insulating film 13 such as a silicon oxide film or a silicon nitride film is formed, and the conductive layer 14 is formed of a transparent conductive thin film or a metal thin film on the insulating film 13.

Thereafter, an electric field is applied to the conductive layer 14 through the electrode terminal 15 provided in the polycrystalline silicon thin film manufacturing apparatus, and the amorphous silicon film 12 is crystallized by Joule heating. Meanwhile, reference numeral 130 denotes a power applying unit.

However, the conductive layer 14 used in the manufacture of the conventional polycrystalline silicon thin film is a result of the conductive layer forming method, the thickness of the conductive layer is relatively thin in the center region, the outer region is relatively thick. 1C, the center region becomes a high resistance region, and becomes a low resistance region from the center region to the outer region.

Therefore, when an electric field is applied to the conductive layer through the electrode terminal 15, since the current applied to the low resistance region is relatively larger than the high resistance region, heat is generated at a high temperature in the low resistance region, and in the high resistance region. The heat is generated at a relatively low temperature. As a result, the central region becomes a high temperature region and becomes a low temperature region from the central region to the outer region.

Accordingly, a difference occurs in the heat transferred to the amorphous silicon film formed under the low temperature region of the conductive layer and the amorphous silicon film formed under the high temperature region of the conductive layer, resulting in a polycrystalline silicon thin film having overall uniform crystallinity. There is a problem that can not be formed.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object thereof is to provide a polycrystalline silicon thin film manufacturing apparatus capable of forming a polycrystalline silicon thin film having a uniform crystallinity by forming a uniform electric field in the conductive layer.

The present invention chamber; A substrate stage installed in the chamber and having a substrate including a conductive layer; A power supply unit installed in the chamber and including an electrode terminal including a support and a first conductive electrode positioned in a central region of the support; And a second conductive electrode positioned between the electrode terminal and the conductive layer.

The present invention also provides an electric field applying apparatus, wherein the second conductive electrode is a conductive pad.

The present invention also provides an electric field applying apparatus, wherein the conductive pad includes at least one of gold, silver, copper, nickel, silver / glass, and silver / copper, and at least one of polyurethane and silicon. to provide.

In addition, the present invention provides an electric field applying apparatus, characterized in that the substrate further comprises an amorphous silicon film.

In addition, the present invention provides an electric field applying apparatus, wherein the second conductive electrode is electrically connected to the first conductive electrode and electrically insulated from the support.

The present invention also provides an electric field applying apparatus, wherein the second conductive electrode is attached to the electrode terminal.

In another aspect, the present invention provides a field application device characterized in that the power supplied to the first conductive electrode is applied to the second conductive electrode, the electric field is applied to the conductive layer through the second conductive electrode.

In addition, the present invention provides an electric field applying apparatus characterized in that the current path is longer from the center region of the second conductive electrode toward the outer region.

In addition, the present invention provides a field applying apparatus, characterized in that the thickness of the center region of the conductive layer is formed thinner than the thickness of the outer region.

In addition, the present invention provides an electric field applying apparatus, characterized in that the electric field applying apparatus is a polycrystalline silicon thin film manufacturing apparatus.

Accordingly, the present invention can provide a polycrystalline silicon thin film manufacturing apparatus capable of forming a polycrystalline silicon thin film having a uniform crystallinity by forming a uniform electric field on the conductive layer.

1A is a schematic perspective view for explaining a method of manufacturing a conventional polycrystalline silicon thin film.
FIG. 1B is a cross-sectional view taken along line II of FIG. 1A.
1C is a top view of FIG. 1A.
2A is a schematic perspective view for explaining an apparatus for manufacturing a polycrystalline silicon thin film according to a first embodiment of the present invention.
FIG. 2B is a cross-sectional view taken along line II of FIG. 2A.
FIG. 2C is a plan view of FIG. 2A.
3A to 3G are cross-sectional views showing an example of a coupling relationship between an electrode terminal and a second conductive electrode according to the present invention.
4A is a schematic plan view illustrating an apparatus for manufacturing a polycrystalline silicon thin film according to a second exemplary embodiment of the present invention.
4B is a cross-sectional view taken along the line II-II of FIG. 4A.
5A is a schematic plan view illustrating an apparatus for manufacturing a polycrystalline silicon thin film according to a third exemplary embodiment of the present invention.
FIG. 5B is a cross-sectional view taken along line III-III of FIG. 5A.
6 is an example of the overall configuration of a polycrystalline silicon thin film manufacturing apparatus according to the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided so that the disclosure may be made thorough and complete, and to fully convey the spirit of the invention to those skilled in the art. Like reference numerals designate like elements throughout the specification.

FIG. 2A is a schematic perspective view illustrating an apparatus for manufacturing a polycrystalline silicon thin film according to a first exemplary embodiment of the present invention, FIG. 2B is a cross-sectional view taken along line II of FIG. 2A, and FIG. 2C is a plan view of FIG. 2A.

First, referring to FIGS. 2A and 2B, an amorphous silicon film 12, an insulating film 13, and a conductive layer 14 are sequentially formed on a substrate 11, and an electric field is applied to the conductive layer 14. High Joules are generated by inducing Joule heating to crystallize the amorphous silicon film 14 by the high heat.

The material of the substrate 11 is not particularly limited. For example, a transparent substrate material such as glass, quartz, plastic, or the like may be used, and glass is more preferable in terms of economy.

The amorphous silicon film 12 may be formed by, for example, low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition, plasma enhanced chemical vapor deposition (PECVD), sputtering, vacuum evaporation, or the like.

The insulating layer 13 may serve to prevent the amorphous silicon film 12 from being contaminated by the conductive layer 14 during the heat treatment process and to insulate the TFT device. In general, silicon oxide (SiO 2 ), It can be formed by depositing silicon nitride.

The conductive layer 14 may be formed of a transparent conductive thin film or a metal thin film. Specifically, the transparent conductive thin film may use indium tin oxide (ITO), indium zinc oxide (IZO), or the like. Mo, Ti, Cr, Al, Cu, Au, Ag, Pd or MoW may be used, but the material of the conductive layer is not limited in the present invention.

The conductive layer 14 may be formed by a method such as sputtering or evaporation, and may be formed at 500 kPa to 3000 kPa. But it is not limited to that.

In the present invention, as described above, Joule heating is generated by applying an electric field to the conductive layer. Joule heating means heating by using heat generated by resistance when current flows through a conductor. .

That is, the amount of energy per unit time applied to the conductive layer by Joule heating due to the application of the electric field may be represented by the following equation.

W = V × I

In the above formula, W is the amount of energy per unit time of Joule heating, V is the voltage across the conductive layer, and I is the current, respectively.

From the above equation, it can be seen that as the voltage V increases and / or the current I increases, the amount of energy per unit time applied to the conductive layer by Joule heating increases. When the temperature of the conductive layer is increased by Joule heating, the amorphous silicon film 14 is crystallized into a polysilicon film by the high heat.

In this case, since the application of the electric field is determined by various factors such as resistance, length and thickness of the conductive layer, it is difficult to be specified, but about 100 W / cm 2 to 1,000,000 W / cm 2 May be enough. In addition, the applied current may be direct current or alternating current, and the application time of the electric field may be 1 / 10,000,000 to 10 seconds continuously applied. The application of this electric field can be repeated several times in regular or irregular units.

In this case, applying the electric field to the conductive layer 14 is applied through the electrode terminal 15 installed in the polycrystalline silicon thin film manufacturing apparatus, in the present invention, the electrode terminal 15 is the support (15a) and the support (15a) And a first conductive electrode 15b positioned at the center region of the substrate. At this time, in the present invention, the central region will be defined as a central region based on the length of the support 15a.

On the other hand, the first conductive electrode 15b is a portion in which current flows to the electrode for applying power, and the support 15a is a portion in which current does not flow to the insulator.

Accordingly, the first conductive electrode may be formed of a metal material having a good current flow, and the support may be formed of an insulating material having a poor current flow. However, in the present invention, materials of the first conductive electrode and the support are limited. It is not.

In addition, the present invention includes a second conductive electrode 16 positioned below the support, wherein the second conductive electrode 16 is electrically connected to the first conductive electrode 15b, and The second conductive electrode 16 is electrically insulated from the support 15a.

In this case, the second conductive electrode 16 may be formed of a metal material having good current flow in the same manner as the first conductive electrode, and the present invention is not limited to the material of the second conductive electrode. In the present invention, the second conductive electrode is preferably formed of a conductive pad.

The conductive pad is a single or at least two or more kinds of high-conductivity metal powders such as gold, silver, copper, nickel, silver / glass, silver / copper, and the like are dispersed in a liquid polymer resin such as polyurethane or silicon. And mixing and mixing them together to produce a plate-like material that retains conductivity and cushioning power.

Such conductive pads, which have conductivity and cushioning force, are capable of uniform surface contact with the conductive layer by cushioning force even if the surface where the conductive layer and the conductive pad are in contact are not uniform, thus providing a uniform electric field to the conductive layer. It is preferable because it can be formed.

As described above, in the apparatus for manufacturing a polycrystalline silicon thin film according to the first embodiment of the present invention, the electrode terminal includes a support 15a and a first conductive electrode 15b positioned in the central region of the support 15a. In this case, the first conductive electrode 15b is made of a metal material through which current flows, and the support 15a is made of an insulating material through which current does not flow. In addition, a second conductive electrode 16 electrically connected to the first conductive electrode 15b is formed under the support.

That is, in the present invention, the power supplied from the apparatus for manufacturing a polycrystalline silicon thin film to be described later is supplied to the first conductive electrode 15b, and the power supplied to the first conductive electrode 15b is the second conductive electrode 16. The electric field is applied to the conductive layer 14 through the second conductive electrode 16.

In this case, as shown in FIG. 2C, since the power applied to the second conductive electrode 16 is supplied from the first conductive electrode positioned in the center region of the support, the second conductive electrode (the second conductive electrode) is gradually moved from the center region to the outer region. The current path of 16 becomes long.

That is, since the current path is longer from the center region of the second conductive electrode to the outer region, the current applied to the conductive layer from the second conductive electrode is applied from the center region to the outer region rather than the current applied to the center region. The amount of current that becomes becomes small.

As a result, the amount of energy applied to the conductive layer by Joule heating due to the application of the electric field increases as the current increases, and therefore, the amount of energy applied to the outer region becomes smaller than the amount of energy applied to the central region.

On the other hand, as described above, the conductive layer 14 used in the production of the polycrystalline silicon thin film is a result of the method of forming the conductive layer, the center region is formed relatively thin thickness, the outer region is relatively Since the thickness is formed thick, the center region becomes a high resistance region and becomes a low resistance region from the center region to the outer region.

Therefore, in the related art, the amount of current applied to the center region is smaller than the amount of current applied to the outer region due to the resistance difference of the conductive layer. As a result, the amount of current applied to the conductive layer from the second conductive electrode is increased to increase the amount of current applied to the center region, thereby increasing the amount of current applied to the center region and the outer region. It is mutual compensation.

Accordingly, in the present invention, by reducing the difference between the heat transferred to the amorphous silicon film formed under the center region of the conductive layer and the amorphous silicon film formed under the outer region of the conductive layer, the polycrystal has a uniform crystallinity as a whole. A silicon thin film can be formed.

Meanwhile, reference numeral 130 denotes a power applying unit to be described later.

3A to 3G are cross-sectional views showing an example of a coupling relationship between an electrode terminal and a second conductive electrode according to the present invention. In this case, for convenience of description, the electrode terminals are not divided into the first conductive electrode and the support, but the electrode terminals are disposed in the center region of the support and the support as described above. The first conductive electrode is positioned, and the first conductive electrode and the second conductive electrode are electrically connected to each other.

First, as illustrated in FIG. 3A, the size and shape of the electrode terminal 200 and the second conductive electrode 300 may be the same.

In addition, as illustrated in FIG. 3B, the size of the second conductive electrode 310 may be smaller than that of the electrode terminal 200.

In addition, as illustrated in FIG. 3C, the electrode terminal 210 includes a protrusion 210a and the second conductive electrode 320 includes a groove 320a to insert the protrusion into the groove. Can be formed.

In addition, as illustrated in FIG. 3D, the size of the electrode terminal 200 may be smaller than that of the second conductive electrode 330.

In addition, as illustrated in FIG. 3E, a groove 220a may be formed in the electrode terminal 220, and the second conductive electrode 340 may be inserted into the groove.

In addition, as shown in FIG. 3F, the electrode terminal 220 includes a groove 220a and the second conductive electrode 350 includes a protrusion 350a to form the protrusion into the groove. can do.

In addition, as illustrated in FIG. 3G, the shape of the second conductive electrode 360 may be a cylindrical shape having a spherical cross section.

However, the shape of the second conductive electrode and the electrode terminal is not limited in the present invention.

4A is a schematic plan view illustrating an apparatus for manufacturing a polycrystalline silicon thin film according to a second exemplary embodiment of the present invention, and FIG. 4B is a cross-sectional view taken along line II-II of FIG. 4A. The apparatus for manufacturing a polycrystalline silicon thin film according to the second embodiment of the present invention may be the same as the apparatus for manufacturing a polycrystalline silicon thin film according to the first embodiment described above, except as described below.

4A and 4B, in the apparatus for manufacturing a polycrystalline silicon thin film according to the second embodiment of the present invention, an electrode terminal 20 has a first conductivity in which a support 20a and a center region of the support 20a are located. It is the same as that of the first embodiment in that the electrode 20b is included.

However, in the second embodiment of the present invention, only the first conductive electrode 20b is positioned in the central region of the support, not the form in which the first conductive electrode 20b is inserted in the central region of the support.

That is, in the first embodiment, the first conductive electrode is inserted into the central region of the support, and a part of the support and the first conductive electrode are simultaneously positioned in the central region. In the second embodiment, the first conductive electrode is formed in the central region of the support. Only the electrode is located.

5A is a schematic plan view illustrating an apparatus for manufacturing a polycrystalline silicon thin film according to a third exemplary embodiment of the present invention, and FIG. 5B is a cross-sectional view taken along line III-III of FIG. 5A. An apparatus for manufacturing a polycrystalline silicon thin film according to a third embodiment of the present invention may be the same as the apparatus for manufacturing a polycrystalline silicon thin film according to the first embodiment described above, except as described below.

5A and 5B, in the apparatus for manufacturing a polycrystalline silicon thin film according to the third exemplary embodiment of the present invention, a first conductive property in which an electrode terminal 30 is positioned in a central region of the support 30a and the support 30a is provided. It is the same as that of the first embodiment in that the electrode 30b is included.

However, in the third embodiment of the present invention, the shape of the first conductive electrode 30b positioned in the center region of the support is formed in the form of a circle instead of a quadrangle.

That is, in the first embodiment of the present invention, the first conductive electrode is inserted into a rectangular or cuboid shape in the center region of the support, but in the third embodiment of the present invention, the first conductive electrode is cylindrical in the center region of the support. It is inserted.

As a result, as can be seen in the first to third embodiments as described above, the first conductive electrode is located in the center region of the support, so that the current path of the second conductive electrode is longer from the center region to the outer region. If possible, the shape and structure of the first conductive electrode are not limited.

6 is an example of the overall configuration of a polycrystalline silicon thin film manufacturing apparatus according to the present invention.

Referring to FIG. 6, the polycrystalline silicon thin film manufacturing apparatus 100 according to the present invention may be installed at a chamber 110, a substrate stage 120 installed at a lower portion of the chamber 110, and an upper portion of the chamber 110. It includes a power supply unit 130, the substrate support unit 120 and the power supply unit 130 is installed to face.

In addition, the polycrystalline silicon thin film manufacturing apparatus 100 may further include an alignment check unit 140 installed in the chamber 110.

The chamber 110 provides a process progress space enclosed therein to allow the polycrystalline silicon thin film manufacturing process to proceed.

The substrate stage 120 is a device for aligning and fixing the substrate 50 at an accurate position so that a polycrystalline silicon thin film manufacturing process may be performed on the loaded substrate 50.

In this case, a substrate 50 to be loaded is positioned on an upper surface of the substrate stage 120, and the substrate 50 includes an amorphous silicon film, an insulating film, and a conductive layer as described above.

In addition, the substrate stage 120 may include one or more adsorption holes formed to be exposed to the upper surface thereof.

The suction hole is connected to the vacuum unit 150 through the vacuum line 151, and the vacuum unit 150 is positioned on the upper surface of the substrate stage 120 in the suction hole through the vacuum line 151. It provides a vacuum for adsorption fixing the substrate 50.

The power applying unit 130 is a device for applying power to the conductive thin film of the substrate 50 aligned and fixed to the substrate stage 120, the electrode movement unit 131 is installed in the upper portion of the chamber 110 And an electrode terminal 135 installed on the electrode movement unit 131.

The electrode movement unit 131 is connected to a cylinder 132 fixed to an upper portion of the chamber 110, a piston 133 and a piston 133 which are coupled to the cylinder 132 to reciprocate at a predetermined distance. It includes an electrode holder 134 is installed, the electrode holder 134 may be a flat plate formed integrally with the piston 133.

The electrode terminal 135 is installed on a lower surface of the electrode holder 134 opposite to the substrate support part 120 so as to apply power to the conductive thin film of the substrate 50.

In addition, the electrode terminal 135 is installed so that two electrodes 136 and 137 having different polarities are maintained at a constant interval, and are electrically connected to the power supply unit 160 via the power line 161.

In this case, as described above, the electrode terminal 135 includes support bodies 136a and 137a and first conductive electrodes 136b and 137b positioned in the central region of the supports 136a and 137a. In addition, second conductive electrodes 123 electrically connected to the first conductive electrodes 136b and 137b are formed on the electrode terminals two electrodes 136 and 137, respectively.

In this case, the second conductive electrode 123 may be integrally attached to the electrode terminal, or may be separately provided between the conductive layer and the electrode terminal during the crystallization process in a form not attached to the electrode terminal.

The power supply unit 160 supplies power to the electrode terminal 135 through the power line 161 to the conductive thin film of the substrate 50.

The alignment check unit 140 is a device for monitoring the alignment state of the substrate stage 120 and the substrate 50 from the outside and may be installed on an inner wall of the chamber 110.

Of course, the alignment check unit 140 may be installed anywhere in the chamber 110 to monitor the alignment of the substrate stage 120 and the substrate 50.

In addition, when the electrode terminal 135 contacts the substrate 50 to apply power to the substrate 50, the alignment check unit 140 may contact the substrate 50 and the electrode terminal 135. You can also monitor the alignment of your liver.

Therefore, the alignment check unit 140 is installed to monitor the preset positions, for example, corners of the substrate 50, to check the alignment state.

In addition, the alignment check unit 140 may be prepared before the crystallization process is performed in addition to the alignment state of the substrate stage 120 and the substrate 50 and the alignment state of the substrate 50 and the electrode terminal 135. You can also monitor the process.

However, the present invention is characterized in that it comprises an electrode terminal consisting of the first conductive electrode and the support and the second conductive electrode located below the support, and therefore, in the present invention the configuration and shape of the polycrystalline silicon thin film manufacturing apparatus It is not limiting.

As mentioned above, although the present invention has been described with reference to the illustrated embodiments, it is only an example, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Therefore, the scope of the present invention should be defined by the appended claims and their equivalents.

11: substrate 12: amorphous silicon film
13: insulating film 14: conductive layer
15: electrode terminal 15a: support
15b: first conductive electrode 16: second conductive electrode
100: polycrystalline silicon thin film manufacturing apparatus
110: chamber
120: substrate stage
130: power supply unit 131: electrode moving unit
140: alignment check unit
160: power supply unit

Claims (17)

An electric field applying apparatus comprising a power supply unit including an electrode terminal for applying power to a conductive layer on a substrate,
The power applying unit includes an electrode terminal consisting of a support and a first conductive electrode located in the central region of the support,
A second conductive electrode positioned between the electrode terminal and the conductive layer,
Power supplied to the first conductive electrode is applied to the second conductive electrode, an electric field is applied to the conductive layer through the second conductive electrode,
And a current path is longer from the center area of the second conductive electrode to the outer area.
The method of claim 1,
And the second conductive electrode is a conductive pad.
The method of claim 2,
The conductive pad may include at least one of gold, silver, copper, nickel, silver / glass, and silver / copper, and at least one of polyurethane and silicon.
The method of claim 1,
The substrate further comprises an amorphous silicon film.
The method of claim 1,
And the second conductive electrode is electrically connected to the first conductive electrode and electrically insulated from the support.
The method of claim 1,
And the second conductive electrode is attached to the electrode terminal.
The method of claim 1,
And the same size as that of the electrode terminal and the second conductive electrode.
The method of claim 1,
And the size of the second conductive electrode is smaller than that of the electrode terminal.
The method of claim 1,
And the electrode terminal has a size smaller than that of the second conductive electrode.
The method of claim 1,
The electrode terminal has a protrusion, and the second conductive electrode is provided with a groove.
The method of claim 1,
The second conductive electrode has a protrusion, and the electrode terminal has a groove.
The method of claim 1,
The electrode terminal has a groove, and the second conductive electrode is inserted into the groove.
delete delete The method of claim 1,
The thickness of the center region of the conductive layer is formed thinner than the thickness of the outer region.
The method of claim 1,
The electric field applying device is characterized in that the polycrystalline silicon thin film manufacturing apparatus.
chamber;
A substrate stage installed in the chamber and having a substrate including a conductive layer;
A power supply unit installed in the chamber and including an electrode terminal including a support and a first conductive electrode positioned in a central region of the support; And
A second conductive electrode positioned between the electrode terminal and the conductive layer,
Power supplied to the first conductive electrode is applied to the second conductive electrode, an electric field is applied to the conductive layer through the second conductive electrode,
And a current path is longer from the center area of the second conductive electrode to the outer area.
KR1020100092884A 2010-09-24 2010-09-24 Apparatus for manufacturing poly-silicon thin film KR101088878B1 (en)

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KR1020100092884A KR101088878B1 (en) 2010-09-24 2010-09-24 Apparatus for manufacturing poly-silicon thin film
PCT/KR2011/006363 WO2012039552A2 (en) 2010-09-24 2011-08-29 Device for manufacturing polycrystalline silicon thin films

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