KR101088878B1 - Apparatus for manufacturing poly-silicon thin film - Google Patents
Apparatus for manufacturing poly-silicon thin film Download PDFInfo
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- KR101088878B1 KR101088878B1 KR1020100092884A KR20100092884A KR101088878B1 KR 101088878 B1 KR101088878 B1 KR 101088878B1 KR 1020100092884 A KR1020100092884 A KR 1020100092884A KR 20100092884 A KR20100092884 A KR 20100092884A KR 101088878 B1 KR101088878 B1 KR 101088878B1
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- 239000010409 thin film Substances 0.000 title claims abstract description 58
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 48
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 38
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 230000005684 electric field Effects 0.000 claims abstract description 29
- 239000010408 film Substances 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 24
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 22
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
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- 239000011521 glass Substances 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
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- 238000010438 heat treatment Methods 0.000 description 12
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- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02425—Conductive materials, e.g. metallic silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/326—Application of electric currents or fields, e.g. for electroforming
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
- H01L27/1285—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
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- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Photovoltaic Devices (AREA)
Abstract
The present invention chamber; A substrate stage installed in the chamber and having a substrate including a conductive layer; A power supply unit installed in the chamber and including an electrode terminal including a support and a first conductive electrode positioned in a central region of the support; And a second conductive electrode positioned between the electrode terminal and the conductive layer.
Accordingly, the present invention can provide a polycrystalline silicon thin film manufacturing apparatus capable of forming a polycrystalline silicon thin film having a uniform crystallinity by forming a uniform electric field on the conductive layer.
Description
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for manufacturing a polycrystalline silicon thin film, and to an apparatus and method for producing a polycrystalline silicon thin film by generating joule heat by applying power to a substrate.
In general, amorphous silicon (a-Si) has disadvantages of low mobility and opening ratio of electrons, which are charge carriers, and incompatibility with CMOS processes. On the other hand, in the poly-silicon thin film device, it is possible to configure a driving circuit on the substrate like the pixel TFT-array, which is necessary for writing an image signal to the pixel, which was not possible in the amorphous silicon TFT (a-Si TFT). . Therefore, in the polycrystalline silicon thin film element, the connection between the plurality of terminals and the driver IC becomes unnecessary, so that the productivity and reliability can be increased and the thickness of the panel can be reduced. In addition, in the polycrystalline silicon TFT process, since the microfabrication technology of silicon LSI can be used as it is, a microstructure can be formed in wiring etc. Therefore, since there is no pitch constraint on the TAB mounting of the driver IC seen in the amorphous silicon TFT, pixel reduction is easy and a large number of pixels can be realized with a small field of view. The thin film transistor using polycrystalline silicon in the active layer has a high switching capability and the channel position of the active layer is determined by self-matching, compared with the thin film transistor using amorphous silicon, so that device miniaturization and CMOS are possible. For this reason, polycrystalline silicon thin film transistors are used as pixel switch elements in active matrix type flat panel displays (e.g., liquid crystal displays, organic ELs), and the like. It is emerging as a major device.
On the other hand, the inventors of the present invention in Korea Patent Application No. 2007-0021252 has proposed a method for crystallization by heating the joule by applying an electric field after interposing a conductive thin film on or below the silicon thin film.
1A is a schematic perspective view illustrating a conventional method of manufacturing a polycrystalline silicon thin film, FIG. 1B is a cross-sectional view taken along line II of FIG. 1A, and FIG. 1C is a plan view of FIG. 1A.
First, referring to FIGS. 1A and 1B, in the conventional method of manufacturing a polycrystalline silicon thin film, an
Thereafter, an electric field is applied to the
However, the
Therefore, when an electric field is applied to the conductive layer through the
Accordingly, a difference occurs in the heat transferred to the amorphous silicon film formed under the low temperature region of the conductive layer and the amorphous silicon film formed under the high temperature region of the conductive layer, resulting in a polycrystalline silicon thin film having overall uniform crystallinity. There is a problem that can not be formed.
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object thereof is to provide a polycrystalline silicon thin film manufacturing apparatus capable of forming a polycrystalline silicon thin film having a uniform crystallinity by forming a uniform electric field in the conductive layer.
The present invention chamber; A substrate stage installed in the chamber and having a substrate including a conductive layer; A power supply unit installed in the chamber and including an electrode terminal including a support and a first conductive electrode positioned in a central region of the support; And a second conductive electrode positioned between the electrode terminal and the conductive layer.
The present invention also provides an electric field applying apparatus, wherein the second conductive electrode is a conductive pad.
The present invention also provides an electric field applying apparatus, wherein the conductive pad includes at least one of gold, silver, copper, nickel, silver / glass, and silver / copper, and at least one of polyurethane and silicon. to provide.
In addition, the present invention provides an electric field applying apparatus, characterized in that the substrate further comprises an amorphous silicon film.
In addition, the present invention provides an electric field applying apparatus, wherein the second conductive electrode is electrically connected to the first conductive electrode and electrically insulated from the support.
The present invention also provides an electric field applying apparatus, wherein the second conductive electrode is attached to the electrode terminal.
In another aspect, the present invention provides a field application device characterized in that the power supplied to the first conductive electrode is applied to the second conductive electrode, the electric field is applied to the conductive layer through the second conductive electrode.
In addition, the present invention provides an electric field applying apparatus characterized in that the current path is longer from the center region of the second conductive electrode toward the outer region.
In addition, the present invention provides a field applying apparatus, characterized in that the thickness of the center region of the conductive layer is formed thinner than the thickness of the outer region.
In addition, the present invention provides an electric field applying apparatus, characterized in that the electric field applying apparatus is a polycrystalline silicon thin film manufacturing apparatus.
Accordingly, the present invention can provide a polycrystalline silicon thin film manufacturing apparatus capable of forming a polycrystalline silicon thin film having a uniform crystallinity by forming a uniform electric field on the conductive layer.
1A is a schematic perspective view for explaining a method of manufacturing a conventional polycrystalline silicon thin film.
FIG. 1B is a cross-sectional view taken along line II of FIG. 1A.
1C is a top view of FIG. 1A.
2A is a schematic perspective view for explaining an apparatus for manufacturing a polycrystalline silicon thin film according to a first embodiment of the present invention.
FIG. 2B is a cross-sectional view taken along line II of FIG. 2A.
FIG. 2C is a plan view of FIG. 2A.
3A to 3G are cross-sectional views showing an example of a coupling relationship between an electrode terminal and a second conductive electrode according to the present invention.
4A is a schematic plan view illustrating an apparatus for manufacturing a polycrystalline silicon thin film according to a second exemplary embodiment of the present invention.
4B is a cross-sectional view taken along the line II-II of FIG. 4A.
5A is a schematic plan view illustrating an apparatus for manufacturing a polycrystalline silicon thin film according to a third exemplary embodiment of the present invention.
FIG. 5B is a cross-sectional view taken along line III-III of FIG. 5A.
6 is an example of the overall configuration of a polycrystalline silicon thin film manufacturing apparatus according to the present invention.
Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided so that the disclosure may be made thorough and complete, and to fully convey the spirit of the invention to those skilled in the art. Like reference numerals designate like elements throughout the specification.
FIG. 2A is a schematic perspective view illustrating an apparatus for manufacturing a polycrystalline silicon thin film according to a first exemplary embodiment of the present invention, FIG. 2B is a cross-sectional view taken along line II of FIG. 2A, and FIG. 2C is a plan view of FIG. 2A.
First, referring to FIGS. 2A and 2B, an
The material of the
The
The insulating
The
The
In the present invention, as described above, Joule heating is generated by applying an electric field to the conductive layer. Joule heating means heating by using heat generated by resistance when current flows through a conductor. .
That is, the amount of energy per unit time applied to the conductive layer by Joule heating due to the application of the electric field may be represented by the following equation.
W = V × I
In the above formula, W is the amount of energy per unit time of Joule heating, V is the voltage across the conductive layer, and I is the current, respectively.
From the above equation, it can be seen that as the voltage V increases and / or the current I increases, the amount of energy per unit time applied to the conductive layer by Joule heating increases. When the temperature of the conductive layer is increased by Joule heating, the
In this case, since the application of the electric field is determined by various factors such as resistance, length and thickness of the conductive layer, it is difficult to be specified, but about 100 W / cm 2 to 1,000,000 W / cm 2 May be enough. In addition, the applied current may be direct current or alternating current, and the application time of the electric field may be 1 / 10,000,000 to 10 seconds continuously applied. The application of this electric field can be repeated several times in regular or irregular units.
In this case, applying the electric field to the
On the other hand, the first
Accordingly, the first conductive electrode may be formed of a metal material having a good current flow, and the support may be formed of an insulating material having a poor current flow. However, in the present invention, materials of the first conductive electrode and the support are limited. It is not.
In addition, the present invention includes a second
In this case, the second
The conductive pad is a single or at least two or more kinds of high-conductivity metal powders such as gold, silver, copper, nickel, silver / glass, silver / copper, and the like are dispersed in a liquid polymer resin such as polyurethane or silicon. And mixing and mixing them together to produce a plate-like material that retains conductivity and cushioning power.
Such conductive pads, which have conductivity and cushioning force, are capable of uniform surface contact with the conductive layer by cushioning force even if the surface where the conductive layer and the conductive pad are in contact are not uniform, thus providing a uniform electric field to the conductive layer. It is preferable because it can be formed.
As described above, in the apparatus for manufacturing a polycrystalline silicon thin film according to the first embodiment of the present invention, the electrode terminal includes a
That is, in the present invention, the power supplied from the apparatus for manufacturing a polycrystalline silicon thin film to be described later is supplied to the first
In this case, as shown in FIG. 2C, since the power applied to the second
That is, since the current path is longer from the center region of the second conductive electrode to the outer region, the current applied to the conductive layer from the second conductive electrode is applied from the center region to the outer region rather than the current applied to the center region. The amount of current that becomes becomes small.
As a result, the amount of energy applied to the conductive layer by Joule heating due to the application of the electric field increases as the current increases, and therefore, the amount of energy applied to the outer region becomes smaller than the amount of energy applied to the central region.
On the other hand, as described above, the
Therefore, in the related art, the amount of current applied to the center region is smaller than the amount of current applied to the outer region due to the resistance difference of the conductive layer. As a result, the amount of current applied to the conductive layer from the second conductive electrode is increased to increase the amount of current applied to the center region, thereby increasing the amount of current applied to the center region and the outer region. It is mutual compensation.
Accordingly, in the present invention, by reducing the difference between the heat transferred to the amorphous silicon film formed under the center region of the conductive layer and the amorphous silicon film formed under the outer region of the conductive layer, the polycrystal has a uniform crystallinity as a whole. A silicon thin film can be formed.
Meanwhile,
3A to 3G are cross-sectional views showing an example of a coupling relationship between an electrode terminal and a second conductive electrode according to the present invention. In this case, for convenience of description, the electrode terminals are not divided into the first conductive electrode and the support, but the electrode terminals are disposed in the center region of the support and the support as described above. The first conductive electrode is positioned, and the first conductive electrode and the second conductive electrode are electrically connected to each other.
First, as illustrated in FIG. 3A, the size and shape of the
In addition, as illustrated in FIG. 3B, the size of the second
In addition, as illustrated in FIG. 3C, the
In addition, as illustrated in FIG. 3D, the size of the
In addition, as illustrated in FIG. 3E, a
In addition, as shown in FIG. 3F, the
In addition, as illustrated in FIG. 3G, the shape of the second
However, the shape of the second conductive electrode and the electrode terminal is not limited in the present invention.
4A is a schematic plan view illustrating an apparatus for manufacturing a polycrystalline silicon thin film according to a second exemplary embodiment of the present invention, and FIG. 4B is a cross-sectional view taken along line II-II of FIG. 4A. The apparatus for manufacturing a polycrystalline silicon thin film according to the second embodiment of the present invention may be the same as the apparatus for manufacturing a polycrystalline silicon thin film according to the first embodiment described above, except as described below.
4A and 4B, in the apparatus for manufacturing a polycrystalline silicon thin film according to the second embodiment of the present invention, an
However, in the second embodiment of the present invention, only the first
That is, in the first embodiment, the first conductive electrode is inserted into the central region of the support, and a part of the support and the first conductive electrode are simultaneously positioned in the central region. In the second embodiment, the first conductive electrode is formed in the central region of the support. Only the electrode is located.
5A is a schematic plan view illustrating an apparatus for manufacturing a polycrystalline silicon thin film according to a third exemplary embodiment of the present invention, and FIG. 5B is a cross-sectional view taken along line III-III of FIG. 5A. An apparatus for manufacturing a polycrystalline silicon thin film according to a third embodiment of the present invention may be the same as the apparatus for manufacturing a polycrystalline silicon thin film according to the first embodiment described above, except as described below.
5A and 5B, in the apparatus for manufacturing a polycrystalline silicon thin film according to the third exemplary embodiment of the present invention, a first conductive property in which an
However, in the third embodiment of the present invention, the shape of the first
That is, in the first embodiment of the present invention, the first conductive electrode is inserted into a rectangular or cuboid shape in the center region of the support, but in the third embodiment of the present invention, the first conductive electrode is cylindrical in the center region of the support. It is inserted.
As a result, as can be seen in the first to third embodiments as described above, the first conductive electrode is located in the center region of the support, so that the current path of the second conductive electrode is longer from the center region to the outer region. If possible, the shape and structure of the first conductive electrode are not limited.
6 is an example of the overall configuration of a polycrystalline silicon thin film manufacturing apparatus according to the present invention.
Referring to FIG. 6, the polycrystalline silicon thin
In addition, the polycrystalline silicon thin
The
The
In this case, a
In addition, the
The suction hole is connected to the
The
The
The
In addition, the
In this case, as described above, the
In this case, the second
The
The
Of course, the
In addition, when the
Therefore, the
In addition, the
However, the present invention is characterized in that it comprises an electrode terminal consisting of the first conductive electrode and the support and the second conductive electrode located below the support, and therefore, in the present invention the configuration and shape of the polycrystalline silicon thin film manufacturing apparatus It is not limiting.
As mentioned above, although the present invention has been described with reference to the illustrated embodiments, it is only an example, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Therefore, the scope of the present invention should be defined by the appended claims and their equivalents.
11: substrate 12: amorphous silicon film
13: insulating film 14: conductive layer
15:
15b: first conductive electrode 16: second conductive electrode
100: polycrystalline silicon thin film manufacturing apparatus
110: chamber
120: substrate stage
130: power supply unit 131: electrode moving unit
140: alignment check unit
160: power supply unit
Claims (17)
The power applying unit includes an electrode terminal consisting of a support and a first conductive electrode located in the central region of the support,
A second conductive electrode positioned between the electrode terminal and the conductive layer,
Power supplied to the first conductive electrode is applied to the second conductive electrode, an electric field is applied to the conductive layer through the second conductive electrode,
And a current path is longer from the center area of the second conductive electrode to the outer area.
And the second conductive electrode is a conductive pad.
The conductive pad may include at least one of gold, silver, copper, nickel, silver / glass, and silver / copper, and at least one of polyurethane and silicon.
The substrate further comprises an amorphous silicon film.
And the second conductive electrode is electrically connected to the first conductive electrode and electrically insulated from the support.
And the second conductive electrode is attached to the electrode terminal.
And the same size as that of the electrode terminal and the second conductive electrode.
And the size of the second conductive electrode is smaller than that of the electrode terminal.
And the electrode terminal has a size smaller than that of the second conductive electrode.
The electrode terminal has a protrusion, and the second conductive electrode is provided with a groove.
The second conductive electrode has a protrusion, and the electrode terminal has a groove.
The electrode terminal has a groove, and the second conductive electrode is inserted into the groove.
The thickness of the center region of the conductive layer is formed thinner than the thickness of the outer region.
The electric field applying device is characterized in that the polycrystalline silicon thin film manufacturing apparatus.
A substrate stage installed in the chamber and having a substrate including a conductive layer;
A power supply unit installed in the chamber and including an electrode terminal including a support and a first conductive electrode positioned in a central region of the support; And
A second conductive electrode positioned between the electrode terminal and the conductive layer,
Power supplied to the first conductive electrode is applied to the second conductive electrode, an electric field is applied to the conductive layer through the second conductive electrode,
And a current path is longer from the center area of the second conductive electrode to the outer area.
Priority Applications (2)
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KR1020100092884A KR101088878B1 (en) | 2010-09-24 | 2010-09-24 | Apparatus for manufacturing poly-silicon thin film |
PCT/KR2011/006363 WO2012039552A2 (en) | 2010-09-24 | 2011-08-29 | Device for manufacturing polycrystalline silicon thin films |
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KR1020100092884A KR101088878B1 (en) | 2010-09-24 | 2010-09-24 | Apparatus for manufacturing poly-silicon thin film |
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WO2021138541A1 (en) * | 2020-01-03 | 2021-07-08 | Synopsys, Inc. | Electro-thermal method to manufacture monocrystalline vertically oriented silicon channels for three-dimensional (3d) nand memories |
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KR100524874B1 (en) * | 1998-06-10 | 2006-02-20 | 엘지.필립스 엘시디 주식회사 | Crystallization Method of Amorphous Silicon Thin Film |
KR100623693B1 (en) * | 2004-08-25 | 2006-09-19 | 삼성에스디아이 주식회사 | Method for fabricating thin film transistor |
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WO2012039552A2 (en) | 2012-03-29 |
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