KR101062985B1 - Semiconductor heat sink and its manufacturing method - Google Patents

Semiconductor heat sink and its manufacturing method Download PDF

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KR101062985B1
KR101062985B1 KR1020090035200A KR20090035200A KR101062985B1 KR 101062985 B1 KR101062985 B1 KR 101062985B1 KR 1020090035200 A KR1020090035200 A KR 1020090035200A KR 20090035200 A KR20090035200 A KR 20090035200A KR 101062985 B1 KR101062985 B1 KR 101062985B1
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composition
heat dissipation
semiconductor
silicon carbide
thermal expansion
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KR20100116466A (en
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유기석
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유기석
주식회사 마이크로테크
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]

Abstract

본 발명은 반도체칩에 접합하여 방열용으로 사용할 수 있도록 된 반도체용 방열기판 및 이의 제조방법에 관한 것으로, 본 발명에 따른 반도체용 방열기판은 실리콘카바이드(SiC)를 포함하는 제1 조성물과, 상기 제1 조성물에 혼합되는 알루미늄을 포함하는 제2 조성물을 구비하고, 상기 제1 조성물을 100 기준 체적부로 했을 때, 상기 제2 조성물은 45 내지 65 체적부가 상기 제1 조성물에 혼합되어 형성된 것이다.The present invention relates to a semiconductor heat dissipation substrate bonded to a semiconductor chip and to be used for heat dissipation, and a method for manufacturing the same, wherein the semiconductor heat dissipation substrate according to the invention comprises a first composition comprising silicon carbide (SiC), and A second composition comprising aluminum mixed in the first composition is provided, and when the first composition is 100 reference volumes, the second composition is formed by mixing 45 to 65 volumes by mixing with the first composition.

상기 제1 조성물은 상기 실리콘카바이드를 감싸는 코팅층을 더 구비할 수 있으며, 상기 코팅층은 니켈 또는 구리가 코팅되어 형성되되, 상기 코팅층이 구리로 형성되는 경우 코팅층의 코팅두께는 각각 0.04 내지 0.2㎛, 니켈이 코팅층을 형성할 경우 코팅층의 두께는 0.2 내지 0.5㎛인 것이 바람직하다.The first composition may further include a coating layer surrounding the silicon carbide, the coating layer is formed by coating nickel or copper, when the coating layer is formed of copper, the coating thickness of the coating layer is 0.04 to 0.2㎛, nickel When forming the coating layer, the thickness of the coating layer is preferably 0.2 to 0.5㎛.

본 발명에 따른 반도체용 방열기판은 열팽창계수가 장착대상이 되는 반도체칩의 열팽창계수와 유사하여 반도체칩과 반도체용 방열기판 사이의 결합상태가 안정적으로 유지될 수 있는 이점이 있다.The heat dissipation substrate for a semiconductor according to the present invention has an advantage that the thermal expansion coefficient is similar to the thermal expansion coefficient of a semiconductor chip to be mounted, so that the bonding state between the semiconductor chip and the heat dissipation substrate for the semiconductor can be stably maintained.

열팽창계수, 방열기판 Thermal expansion coefficient, heat dissipation board

Description

반도체용 방열기판 및 이의 제조방법 {Heat-sink for semiconductor and manufacturing method of that}Heat-dissipating substrate for semiconductor and its manufacturing method {Heat-sink for semiconductor and manufacturing method of that}

본 발명은 반도체용 방열기판 및 이의 제조방법에 관한 것으로서, 더욱 상세하게는 반도체칩에 접합하여 방열용으로 사용할 수 있도록 된 반도체용 방열기판 및 이의 제조방법에 관한 것이다.The present invention relates to a heat dissipation substrate for a semiconductor and a method for manufacturing the same, and more particularly, to a heat dissipation substrate for a semiconductor and a method for manufacturing the same that can be used for heat dissipation by bonding to a semiconductor chip.

최근에 반도체칩은 소형화, 고속화되는 방향으로 연구가 거듭되고 있는데, 이러한 요구성능을 달성하기 위해서 고집적, 고속, 대용량 IC 등의 반도체칩들이 개발되고 있다.Recently, researches have been made in the direction of miniaturization and high speed, and semiconductor chips such as high-integration, high-speed, and high-capacity ICs have been developed to achieve such required performance.

이러한 반도체칩은 발열량이 많기 때문에 정상작동을 위해서는 방열이 매우 중요한데, 방열을 위해 주로 반도체칩에 방열을 위한 방열판을 부착하여 반도체칩에서 발생한 열을 제거하도록 하였다.The heat dissipation is very important for normal operation because these semiconductor chips have a large amount of heat, and a heat sink for heat dissipation is mainly attached to the semiconductor chip to dissipate heat generated from the semiconductor chip.

반도체칩에 설치되는 방열판은 열전도도가 뛰어난 금속재가 주로 사용되어 왔으며, 가벼우면서도 구리에 비해 저렴한 알루미늄이 방열판의 재료로 많이 사용되어 왔다.The heat sink installed on the semiconductor chip has been mainly used as a metal material having excellent thermal conductivity, and aluminum, which is light and cheaper than copper, has been used as a material for the heat sink.

그런데 종래의 금속재 방열판은 반도체칩의 실리콘계열 기판과 열팽창계수가 상이하기 때문에 반도체칩의 발열에 의한 팽창과 수축 과정에서 팽창량과 수축량이 상호 상이하여 팽창과 수축의 반복에 의해 반도체칩과 방열판 사이의 접착부에서 크랙이 발생할 수 있으며, 반도체칩에서 발열된 열이 용이하게 방열판으로 전달되지 못하는 등의 문제점이 발생하기도 하였다.However, in the conventional metal heat sink, the thermal expansion coefficient of the semiconductor chip is different from that of the silicon-based substrate of the semiconductor chip, so that the expansion amount and the contraction amount are different from each other during the expansion and contraction process due to the heat generation of the semiconductor chip. Cracks may occur in the adhesive portion of the semiconductor chip, and heat generated from the semiconductor chip may not be easily transferred to the heat sink.

이러한 문제점을 해결하기 위해서 반도체칩과 열팽창계수가 유사한 방열판의 조성물에 대한 연구가 지속적으로 이루어져 왔다.In order to solve this problem, studies on the composition of a heat sink having a similar thermal expansion coefficient to a semiconductor chip have been continuously conducted.

본 발명은 상기 문제점을 해결하기 위해 창출된 것으로서, 방열기판이 장착되는 반도체칩과 열팽창계수가 유사하며 성형이 용이한 반도체용 방열기판 및 이의 제조방법을 제공하는데 그 목적이 있다.The present invention has been made to solve the above problems, and an object thereof is to provide a heat dissipation substrate for a semiconductor having a similar thermal expansion coefficient to a semiconductor chip on which a heat dissipation substrate is mounted, and an easy forming method.

상기 목적을 달성하기 위한 본 발명에 따른 반도체용 방열기판은 실리콘카바이드(SiC)를 포함하는 제1 조성물과, 상기 제1 조성물에 접합되는 알루미늄을 포함하는 제2 조성물을 구비하고, 상기 제1 조성물을 100 기준 체적부로 했을 때, 상기 제2 조성물은 25 내지 100 체적부가 상기 제1 조성물에 접합되어 형성된 것이다.The heat dissipation substrate for a semiconductor according to the present invention for achieving the above object comprises a first composition comprising silicon carbide (SiC), and a second composition comprising aluminum bonded to the first composition, the first composition When the ratio is set to 100 reference volumes, the second composition is formed by bonding 25 to 100 volumes to the first composition.

상기 제1 조성물은 상기 실리콘카바이드에 니켈 및 구리가 코팅되어 형성되며, 상기 구리 및 니켈은 코팅두께가 각각 0.04 내지 0.2㎛, 0.2 내지 0.5㎛이며 상기 실리콘카바이드에 무전해 코팅된 것이 바람직하다.The first composition is formed by coating nickel and copper on the silicon carbide, wherein the copper and nickel have a coating thickness of 0.04 to 0.2 μm and 0.2 to 0.5 μm, respectively, and are electrolessly coated on the silicon carbide.

또한 본 발명에 따른 반도체용 방열기판의 제작방법은 실리콘카바이드에 구리 및 니켈을 무전해 코팅하여 제1 조성물을 제작하는 예비성형체 제작단계와, 상기 제1 조성물에 알루미늄을 포함하는 제2 조성물을 접합하는 결합단계를 포함한다.In addition, the method for manufacturing a heat dissipation substrate for a semiconductor according to the present invention comprises a preform manufacturing step of preparing a first composition by electrolessly coating copper and nickel on silicon carbide, and bonding a second composition containing aluminum to the first composition. It includes a coupling step.

상기 알루미늄은 상기 제1 조성물을 100 기준 체적부로 했을 때, 25 내지 100 체적부가 접합되고, 상기 결합단계는 온도가 400 내지 750℃이며, 아르곤 또는 헬륨가스로 비활성 상태인 분위기에서 상호 접촉된 제1, 제2 조성물을 50 내지 150MPa의 압력으로 가압하여 이루어지는 것이 바람직하다.The aluminum is bonded to 25 to 100 parts by volume when the first composition is 100 reference volume parts, the bonding step is a temperature of 400 to 750 ℃, the first contact with each other in an atmosphere of inert state with argon or helium gas It is preferable to pressurize the 2nd composition to the pressure of 50-150 Mpa.

본 발명에 따른 반도체용 방열기판은 열팽창계수가 장착되는 반도체칩의 열팽창계수와 유사하여 반도체칩과 반도체용 방열기판 사이의 접합상태가 안정적으로 유지될 수 있는 이점이 있다.The heat dissipation substrate for a semiconductor according to the present invention has an advantage that the bonding state between the semiconductor chip and the heat dissipation substrate for a semiconductor can be stably maintained, similar to the thermal expansion coefficient of a semiconductor chip having a thermal expansion coefficient mounted thereon.

이하, 첨부된 도면을 참조하여 본 발명에 따른 반도체용 방열기판 및 이의 제조방법을 더욱 상세하게 설명한다.Hereinafter, a heat dissipation substrate for a semiconductor and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

도 1을 참조하면, 본 발명에 따른 반도체용 방열기판(10)은 제1 조성물(20)과, 제1 조성물(20)에 혼합되는 제2 조성물(30)로 된 것이다.Referring to FIG. 1, the heat dissipation substrate 10 for a semiconductor according to the present invention includes a first composition 20 and a second composition 30 mixed with the first composition 20.

제1 조성물(20)은 실리콘카바이드(SiC)를 포함한다.The first composition 20 comprises silicon carbide (SiC).

실리콘카바이드는 역학적으로 강하며, 열극(裂隙) 특성을 가지고 있어서 숫돌차, 연마용 종이, 직물 제품에도 사용되는 재질이다. 특히, 실리콘카바이드는 내용해성·내용융성·내산화성 외에 열전도도가 크며, 온도가 낮을 때에는 전기절연체이기 때문에 반도체칩의 방열기판(10)으로써 적합하다.Silicon carbide is a mechanically strong and thermopolar material, which is used for grinding wheels, abrasive paper and textile products. In particular, silicon carbide has a high thermal conductivity in addition to solvent resistance, solvent resistance, and oxidation resistance, and is suitable as a heat dissipation substrate 10 of a semiconductor chip because it is an electrical insulator when the temperature is low.

그런데 일반적인 반도체칩의 경우 열팽창계수가 6~9ppm/K인데 반해 실리콘카바이드는 열팽창계수가 3.7~4.4ppm/K이기 때문에 반도체칩이 발열하여 온도가 상승할 때, 반도체칩과 방열기판(10) 사이의 팽창량이 상이하게 되며, 이에 따라 접합성이 떨어지고 열전도율이 낮아지게 되어 충분한 방열효과를 기대하기 어렵게 되며, 심한 경우 박리현상이 나타나는 문제가 발생하게 된다.However, in the case of a general semiconductor chip, the thermal expansion coefficient is 6-9 ppm / K, whereas silicon carbide has a thermal expansion coefficient of 3.7-4.4 ppm / K, so when the semiconductor chip generates heat and the temperature rises, the semiconductor chip and the heat sink 10 The amount of expansion is different, and thus the bonding property is lowered and the thermal conductivity is lowered, so that it is difficult to expect a sufficient heat dissipation effect.

따라서 방열기판(10)의 열팽창계수가 반도체칩의 열팽창계수와 유사해 지도록 상기 제1 조성물(20)에 열팽창계수 조절을 위한 제2 조성물(30)을 혼합한다.Therefore, the second composition 30 for adjusting the thermal expansion coefficient is mixed with the first composition 20 so that the thermal expansion coefficient of the heat dissipation substrate 10 becomes similar to the thermal expansion coefficient of the semiconductor chip.

제2 조성물(30)은 알루미늄이 적합하다.The second composition 30 is suitably aluminum.

알루미늄은 가공성이 좋으며 경량이고, 열전도도가 높은 금속에 속하기 때문에 방열에 효과적이다. 그리고 알루미늄은 열팽창계수가 약 23.5ppm/K 이기 때문에 알루미늄을 상기 실리콘카바이드에 혼합함으로써 방열기판(10)의 열팽창계수를 반도체칩의 열팽창계수와 유사하도록 조절할 수 있다.Aluminum is effective in heat dissipation because it belongs to a metal with good workability, light weight, and high thermal conductivity. In addition, since aluminum has a thermal expansion coefficient of about 23.5 ppm / K, by mixing aluminum with the silicon carbide, the thermal expansion coefficient of the heat dissipation substrate 10 can be adjusted to be similar to that of the semiconductor chip.

본 실시예에서는 제1 조성물(20) 65 체적%와, 제2 조성물(30) 35 체적%를 혼합하여 방열기판(10)을 제작하였다.In this embodiment, the heat dissipation substrate 10 was manufactured by mixing 65% by volume of the first composition 20 and 35% by volume of the second composition 30.

상기 제1, 제2 조성물(20,30) 사이의 혼합비는 이에 한정되는 것은 아니며, 장착되는 반도체칩의 열팽창계수에 따라 적정 혼합비로 조정될 수 있다.The mixing ratio between the first and second compositions 20 and 30 is not limited thereto, and may be adjusted to an appropriate mixing ratio according to the thermal expansion coefficient of the semiconductor chip to be mounted.

즉, 제1, 제2 조성물(20,30)의 혼합시 제1 조성물(20)을 100 기준 체적부로 했을 때, 상기 알루미늄을 포함하는 제2 조성물(30) 45~65 체적부를 제1 조성물(20)에 혼합할 때, 방열기판(10)의 열팽창계수가 반도체칩의 열팽창계수에 대응하는 6~9ppm/K이 된다. 따라서 장착되는 반도체칩의 열팽창계수에 따라 제1, 제2 조성물(20,30)의 혼합비를 적절히 조절하여 장착되는 반도체칩의 열팽창계수와 유사한 방열기판(10)을 형성한다.That is, when the first composition 20 is 100 reference volume parts when the first and second compositions 20 and 30 are mixed, 45 to 65 volume parts of the second composition 30 containing aluminum may be added to the first composition ( 20), the thermal expansion coefficient of the heat dissipation substrate 10 is 6 to 9 ppm / K corresponding to the thermal expansion coefficient of the semiconductor chip. Accordingly, the heat dissipation substrate 10 similar to the thermal expansion coefficient of the semiconductor chip to be mounted is formed by appropriately adjusting the mixing ratio of the first and second compositions 20 and 30 according to the thermal expansion coefficient of the semiconductor chip to be mounted.

상기와 같은 제1, 제2 조성물(20,30) 사이의 혼합비는 혼합비에 따른 열팽창계수의 측정을 통해 산출한 값이며, 제1, 제2 조성물(20,30)의 혼합비 즉, 실리콘카바이드와 알루미늄의 혼합비에 따른 열팽창계수는 도 2에 도시된 그래프의 결과값과 같다.The mixing ratio between the first and second compositions 20 and 30 as described above is a value calculated by measuring the thermal expansion coefficient according to the mixing ratio, that is, the mixing ratio of the first and second compositions 20 and 30, that is, silicon carbide and The coefficient of thermal expansion according to the mixing ratio of aluminum is the same as the result of the graph shown in FIG.

도 2에 나타난 바와 같이 알루미늄과 실리콘카바이드가 결합되어 형성되는 조성물에 있어서, 실리콘카바이드의 조성비가 점점 높아질수록 열팽창계수가 점점 낮아지는 것을 확인할 수 있다.As shown in FIG. 2, in the composition formed by combining aluminum and silicon carbide, it can be seen that as the composition ratio of silicon carbide increases, the coefficient of thermal expansion decreases gradually.

반복되는 실험을 통해 실리콘카바이드와 알루미늄의 조성비에 따른 조성물의 열팽창계수를 확인할 수 있었으며, 이를 통해서 상기 실리콘카바이드와 알루미늄의 혼합조성물이 실리콘기판의 일반적인 열팽창계수 즉, 6~9ppm/K가 되기 위해서는 그래프에 나타나 있는 것처럼 실리콘카바이드가 60~70 체적%, 알루미늄이 40~30 체적%가 되어야 하므로 실리콘카바이드와 알루미늄의 적정 혼합비는 실리콘카바이드를 100 기준 체적부로 했을 때, 상기 알루미늄 25~100 체적부가 혼합되어야 함을 확인할 수 있다.Through repeated experiments, the thermal expansion coefficient of the composition according to the composition ratio of silicon carbide and aluminum could be confirmed. Through this, the composite composition of the silicon carbide and aluminum became a general thermal expansion coefficient of the silicon substrate, that is, 6 to 9 ppm / K. Since silicon carbide should be 60 to 70% by volume and aluminum to 40 to 30% by volume as shown in the following, an appropriate mixing ratio of silicon carbide and aluminum should be 25 to 100% by volume when silicon carbide is used as the 100 reference volume. Can be confirmed.

이때, 실리콘카바이드와 알루미늄의 접합성 향상을 위해 실리콘카바이드에 니켈 또는 구리가 코팅되더라도 혼합비에 따른 열팽창계수에는 변화가 거의 없기 때문에 니켈과 구리가 코팅된 제1 조성물(20)과 제2 조성물(30)의 혼합조성비 역시 상기 실리콘카바이드와 알루미늄의 혼합조성비와 동일하다.At this time, even if nickel or copper is coated on the silicon carbide to improve the bonding between the silicon carbide and aluminum, the thermal expansion coefficient according to the mixing ratio is hardly changed, so the first and second compositions 20 and 30 coated with nickel and copper are coated. The mixing composition ratio of is also the same as the mixing ratio of the silicon carbide and aluminum.

상기 제1 조성물(20)은 상술한 바와 같이 실리콘카바이드에 니켈 또는 구리가 코팅된 코팅층을 더 구비하는 것이 바람직하다.As described above, the first composition 20 may further include a coating layer coated with nickel or copper on silicon carbide.

실리콘카바이드와 알루미늄을 직접 가압하여 결합하는 경우에는 탄화알루미늄(Al3C4)이 생성되며, 탄화알루미늄이 실리콘카바이드와 알루미늄 사이의 결합을 방해하게 된다.In the case of directly bonding silicon carbide with aluminum, aluminum carbide (Al 3 C 4 ) is produced, and aluminum carbide interferes with the bonding between silicon carbide and aluminum.

따라서 제1, 제2 조성물(20,30)의 결합성을 증대시키기 위해 상술한 바와 같이 실리콘카바이드에 니켈 또는 구리를 코팅한 코팅층을 형성한다.Therefore, in order to increase the bondability of the first and second compositions 20 and 30, a coating layer coated with nickel or copper is formed on silicon carbide as described above.

니켈 또는 구리는 무전해 코팅되며, 각각 코팅 두께가 0.2~0.5㎛, 0.04~0.2㎛가 되도록 코팅된다.Nickel or copper is electrolessly coated and coated so as to have a coating thickness of 0.2 to 0.5 µm and 0.04 to 0.2 µm, respectively.

니켈 또는 구리의 코팅두께가 상기 두께 범위를 벗어나는 경우 즉, 더 두꺼운 경우에는 코팅층에 의해 방열기판의 열팽창계수와 열전도도가 영향을 받아 방열기판이 소기 목적한 열팽창계수와 열전도도값을 가지지 못하게 되며, 코팅두께가 지나치게 얇은 경우에는 실리콘카바이드와 알루미늄 사이의 결합성 증대 효과를 기대하기 어렵다. 따라서 니켈과 구리의 코팅두께는 상기 범주 내에서 이루어지는 것이 바람직하다.When the coating thickness of nickel or copper is out of the thickness range, that is, when the coating thickness is thicker, the thermal expansion coefficient and thermal conductivity of the heat radiation substrate are affected by the coating layer, so that the heat radiation substrate does not have a desired thermal expansion coefficient and thermal conductivity value. If the coating thickness is too thin, it is difficult to expect the effect of increasing the bonding between silicon carbide and aluminum. Therefore, the coating thickness of nickel and copper is preferably made within the above range.

상기 반도체용 방열기판(10)의 제작과정은 다음과 같다.The manufacturing process of the semiconductor heat dissipation substrate 10 is as follows.

① 예비성형체 제작단계① Preparation of preform

본 단계에서는 실리콘카바이드에 니켈 또는 구리를 코팅하여 예비성형체 즉 제1 조성물(20)을 제작한다.In this step, nickel or copper is coated on silicon carbide to prepare a preform, that is, the first composition 20.

상술한 바와 같이 니켈 또는 구리를 이용해 코팅층을 형성할 때, 코팅층의 두께는 니켈의 경우 0.2~0.5㎛, 구리의 경우 0.04~0.2㎛가 되도록 하며, 이 코팅층에 의해 제2 조성물(30)과의 결합시 결합성이 증대된다.As described above, when the coating layer is formed using nickel or copper, the thickness of the coating layer is 0.2 to 0.5 µm for nickel and 0.04 to 0.2 µm for copper, and the coating layer is formed with the second composition 30. The bonding increases in bonding.

② 결합단계② Combined step

예비성형체 제작단계에서 제1 조성물(20)이 제작되면, 이에 제2 조성물(30)을 결합하는 결합단계를 실시한다.When the first composition 20 is manufactured in the preform manufacturing step, a bonding step of combining the second composition 30 is performed.

제2 조성물(30)은 상술한 바와 같이 알루미늄이 사용되며, 제1 조성물(20) 65 체적%에 제2 조성물(30) 35 체적%를 접합하게 되는데, 제1 조성물(20)의 상면과 하면에 제2 조성물(30)을 위치시키고 가압기(40)를 통해 가압하여 제1, 제2 조성물(20,30)을 가압하게 된다.Aluminum is used as the second composition 30 as described above, and the second composition 30 is bonded to 35 volume% of the second composition 30 to 65 volume% of the first composition 20. The second composition 30 is placed in the pressurizing unit 40 and pressurizes the first and second compositions 20 and 30.

상기 제1, 제2 조성물(20,30)의 결합시 결합조건은 다음과 같다.The bonding conditions when the first and second compositions 20 and 30 are combined are as follows.

먼저 온도는 400~750℃인 것이 바람직하며, 아르곤이나 헬륨 등의 가스를 통해 화학반응이 최소화되도록 비활성 분위기 상태에서 가압을 진행한다.First, the temperature is preferably 400 to 750 ° C., and pressurization is performed in an inert atmosphere so that chemical reactions are minimized through gases such as argon or helium.

상기 제1, 제2 조성물(20,30)은 가압기(40)에서 50~150MPa로 가압이 이루어진다.The first and second compositions 20 and 30 are pressurized to 50 to 150 MPa in the pressurizer 40.

결합과정에서의 온도가 750℃를 초과하고, 가압력이 150MPa을 초과하는 경우에는 실리콘카바이드에 함침된 알루미늄이 외부로 도출되는 현상이 발생하게 되며, 온도가 400℃ 미만이고, 압력이 50MPa 미만인 경우에는 알루미늄과 실리콘카바이드의 결합부분에서의 확산 현상이 원활하게 이루어지지 못하여 결합성이 저하되고 신뢰성이 낮아지게 되는 문제가 있다.If the temperature in the bonding process exceeds 750 ℃, the pressing pressure exceeds 150MPa, the aluminum impregnated in the silicon carbide is brought out to the outside, the temperature is less than 400 ℃, if the pressure is less than 50MPa The diffusion phenomenon in the bonding portion of aluminum and silicon carbide is not made smoothly, there is a problem that the bondability is lowered and the reliability is lowered.

따라서 제1, 제2 조성물의 가압과정은 상기 온도범위와 압력 범위 내에서 이루어지는 것이 바람직하다. Therefore, the pressurizing process of the first and second compositions is preferably made within the temperature range and the pressure range.

본 발명은 도면에 도시된 실시예를 참고로 설명되었으나 이는 예시적인 것에 불과하며, 본 기술 분야의 통상의 지식을 가진 사람이라면 이로부터 다양한 변형 및 균등한 타 실시예가 가능하다는 점을 이해할 것이다. 따라서, 본 발명의 진정한 기술적 보호 범위는 첨부된 등록 청구 범위의 기술적 사상에 의해 정해져야 할 것이다.Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

도 1은 본 발명에 따른 반도체용 방열기판의 제작을 위한 가압과정을 도시한 개념도,1 is a conceptual diagram showing a pressing process for manufacturing a heat dissipation substrate for a semiconductor according to the present invention;

도 2는 실리콘 카바이드와 알루미늄의 조성비에 따른 열팽창계수의 변화 추이를 나타낸 그래프이다.2 is a graph showing the change in the coefficient of thermal expansion according to the composition ratio of silicon carbide and aluminum.

<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>

10; 반도체용 방열기판10; Heat Dissipation Board for Semiconductor

20; 제1 조성물20; First composition

30; 제2 조성물30; Second composition

Claims (5)

삭제delete 삭제delete 실리콘카바이드에 니켈을 0.2 내지 0.5㎛ 두께로 무전해 코팅하여 제1 조성물을 제작하는 예비성형체 제작단계와;Preparing a preform to produce a first composition by electrolessly coating nickel to silicon carbide in a thickness of 0.2 to 0.5 µm; 상기 제1 조성물에 알루미늄을 포함하는 제2 조성물을 혼합하는 결합단계;를 포함하며,And a bonding step of mixing a second composition including aluminum in the first composition. 상기 제2 조성물은 상기 제1 조성물을 100 기준 체적부로 했을 때, 45 내지 65 체적부가 상기 제1 조성물의 상부와 하부에 접합되어 형성되고,The second composition is formed by joining the upper portion and the lower portion of the first composition when 45 to 65 volume portion when the first composition to 100 reference volume portion, 상기 결합단계는 온도가 400 내지 750K이며, 아르곤 또는 헬륨가스로 비활성 상태인 분위기에서 상호 접촉된 제1, 제2 조성물을 50 내지 150MPa의 압력으로 가압하여 이루어지는 것을 특징으로 하는 반도체용 방열기판 제작방법.The bonding step is a temperature of 400 to 750K, a method for manufacturing a heat-radiating substrate for semiconductors, characterized in that by pressing the first and second compositions in contact with each other in an atmosphere of inert state with argon or helium gas at a pressure of 50 to 150MPa. . 삭제delete 삭제delete
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100312237B1 (en) * 1997-03-20 2001-12-12 포만 제프리 엘 Electronic device modules using a thermally conductive compliant sheet
JP2005327930A (en) * 2004-05-14 2005-11-24 Shin Etsu Polymer Co Ltd Electromagnetic wave noise suppressor and its manufacturing method
KR100588423B1 (en) * 1998-10-09 2006-06-09 크리 인코포레이티드 Simulated diamond gemstones formed of aluminum nitride and aluminum nitride:silicon carbide alloys
KR100925143B1 (en) * 2001-11-30 2009-11-05 소니 가부시끼 가이샤 Electron emitter, cold-cathode field electron emitter and method for manufacturing cold-cathode field electron emission display

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100312237B1 (en) * 1997-03-20 2001-12-12 포만 제프리 엘 Electronic device modules using a thermally conductive compliant sheet
KR100588423B1 (en) * 1998-10-09 2006-06-09 크리 인코포레이티드 Simulated diamond gemstones formed of aluminum nitride and aluminum nitride:silicon carbide alloys
KR100925143B1 (en) * 2001-11-30 2009-11-05 소니 가부시끼 가이샤 Electron emitter, cold-cathode field electron emitter and method for manufacturing cold-cathode field electron emission display
JP2005327930A (en) * 2004-05-14 2005-11-24 Shin Etsu Polymer Co Ltd Electromagnetic wave noise suppressor and its manufacturing method

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