KR101021344B1 - Method of manufacturing flexible printed circuit board - Google Patents

Method of manufacturing flexible printed circuit board Download PDF

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Publication number
KR101021344B1
KR101021344B1 KR1020090099343A KR20090099343A KR101021344B1 KR 101021344 B1 KR101021344 B1 KR 101021344B1 KR 1020090099343 A KR1020090099343 A KR 1020090099343A KR 20090099343 A KR20090099343 A KR 20090099343A KR 101021344 B1 KR101021344 B1 KR 101021344B1
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South Korea
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layer
copper foil
insulating layer
copper
substrate
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KR1020090099343A
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Korean (ko)
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양호민
김도영
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(주)인터플렉스
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0041—Etching of the substrate by chemical or physical means by plasma etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0055—After-treatment, e.g. cleaning or desmearing of holes

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PURPOSE: A method for manufacturing a printed circuit board is provided to simultaneously manufacture two substrates through one process by separating the substrate by a carrier tape. CONSTITUTION: A first copper layer and a first insulation layer are laminated on a first single side substrate. A second copper layer and a second insulation layer are laminated on a second single side substrate(S110). A first insulation layer and a second insulation layer are partially processed to expose the part of the first and second copper layer(S120). The first single side substrate is attached to the second signal substrate by arranging a carrier tape between the first copper layer and the second copper layer(S130). The surface of the insulation layer is conducted with the exposed part of the copper layer by forming seed layers on the surface of the first and second single substrates and the exposed parts of the first and second copper layers(S140). The upper side of the seed layer is plated with copper(S150). The first and second single side substrates are separated by removing a carrier tape(S160).

Description

연성인쇄회로기판의 제조방법{Method of manufacturing flexible printed circuit board}Method of manufacturing flexible printed circuit board

본 발명은 인쇄회로기판의 제조방법에 관한 것으로, 보다 상세하게는 굴곡성과 유연성을 가진 연성인쇄회로기판의 제조방법에 관한 것이다. The present invention relates to a method for manufacturing a printed circuit board, and more particularly, to a method for manufacturing a flexible printed circuit board having flexibility and flexibility.

반도체 집적회로의 집적도 발전, 소형 칩 부품을 직접 탑재하는 표면실장 기술의 발전 및 전자 장비들의 소형화 추세에 따라 더욱 복잡하고 협소한 공간에서도 내장이 용이한 연성인쇄회로기판(Flexible Printed Circuit Board;FPCB)이 개발되었다.Flexible printed circuit boards (FPCBs), which are easy to embed in more complex and narrow spaces, due to the development of semiconductor integrated circuits, the development of surface mount technology for directly mounting small chip components, and the miniaturization of electronic equipment. This was developed.

이러한 연성인쇄회로기판은 연성 동박적층판(Flexible Copper Clad Laminate;FCCL)을 기판 소재로 사용하여 제조되며, 이를 이용하여 양면 연성인쇄회로기판의 제조가 가능하다.The flexible printed circuit board is manufactured by using a flexible copper clad laminate (FCCL) as a substrate material, and a double-sided flexible printed circuit board can be manufactured using the flexible printed circuit board.

그런데, 이렇게 제조된 종래의 양면 연성인쇄회로기판의 경우, 상하층의 양면을 도통하기 위하여 관통홀을 형성한 이후에 동도금을 수행하여야 했는데, 이러한 과정을 수행하면서 기판의 두께가 전체적으로 상승하였고 이에 따라 미세회로 패턴의 형성이 어려운 문제점이 발생하였다.However, in the case of the conventional double-sided flexible printed circuit board manufactured as described above, copper plating was to be performed after the through holes were formed in order to conduct both surfaces of the upper and lower layers, and as a result, the thickness of the substrate increased as a whole. There is a problem that the formation of the microcircuit pattern is difficult.

본 발명은 상하층이 도통하면서도 두께가 얇은 양면 연성인쇄회로기판의 제조가 가능함은 물론이며 양산성을 향상시킴과 동시에 불량률을 감소시킬 수 있는 연성인쇄회로기판의 제조방법을 제공하는데 목적이 있다.An object of the present invention is to provide a method of manufacturing a flexible printed circuit board, which is capable of manufacturing a double-sided flexible printed circuit board having a thin thickness while conducting upper and lower layers, as well as improving mass productivity.

본 발명은, 제1동박층과 제1절연층이 상하로 적층된 제1단면기판과, 제2동박층과 제2절연층이 상하로 적층된 제2단면기판을 준비하는 단계와, 상기 제1동박층과 제2동박층의 일부분이 노출되도록 상기 제1절연층과 제2절연층의 일부분을 각각 가공하는 단계와, 상기 제1동박층과 상기 제2동박층 사이에 캐리어 테이프를 배치하여, 상기 제1단면기판과 제2단면기판을 서로 부착하는 단계와, 상기 제1절연층의 표면과 상기 제1동박층의 노출된 부분, 및 상기 제2절연층의 표면과 상기 제2동박층의 노출된 부분에 각각 씨드층을 형성하여, 상기 절연층의 표면과 상기 동박층의 노출된 부분을 서로 도통시키는 단계와, 상기 씨드층의 상부를 동도금하는 단계, 및 상기 캐리어 테이프를 제거하여 상기 제1단면기판과 제2단면기판을 분리하는 단계를 포함하는 연성인쇄회로기판의 제조방법을 제공한다.According to an aspect of the present invention, there is provided a method, comprising preparing a first cross-sectional substrate having a first copper foil layer and a first insulating layer stacked vertically, and a second cross-sectional substrate having a second copper foil layer and a second insulating layer stacked vertically. Processing a portion of the first insulating layer and the second insulating layer to expose a portion of the first copper foil layer and the second copper foil layer, and placing a carrier tape between the first copper foil layer and the second copper foil layer. Attaching the first cross-sectional substrate and the second cross-sectional substrate to each other, the exposed portion of the surface of the first insulating layer and the first copper foil layer, and the surface of the second insulating layer and the second copper foil layer. Forming a seed layer on each exposed portion of the conductive layer, conducting the surface of the insulating layer and the exposed portion of the copper foil layer to each other, copper plating an upper portion of the seed layer, and removing the carrier tape; Flexible comprising separating the first cross-sectional substrate and the second cross-sectional substrate It provides a process for the production of printing circuit boards.

여기서, 상기 씨드층을 형성하는 단계는, 고주파 유도가열 방식, 저항 가열방식, 일렉트론 빔 방식 또는 플라즈마 방식 중의 하나 또는 복수 개의 방식을 이용할 수 있다. Here, the forming of the seed layer may include one or a plurality of methods of high frequency induction heating, resistance heating, electron beam, or plasma.

또한, 상기 씨드층은, 니켈-크롬, 구리 또는 니켈을 포함할 수 있다.In addition, the seed layer may include nickel-chromium, copper or nickel.

또한, 상기 제1절연층과 제2절연층의 일부분을 가공하는 단계는, 상기 제1동박층과 제2동박층의 일부분을 함께 가공하여 관통홀을 형성하고, 상기 씨드층을 형성하는 단계는, 상기 제1절연층의 표면과 상기 관통홀, 및 상기 캐리어테이프의 노출된 부분에 각각 씨드층을 형성할 수 있다.In addition, the processing of the portion of the first insulating layer and the second insulating layer, the process of processing the portion of the first copper foil layer and the second copper foil layer together to form a through hole, the forming of the seed layer The seed layer may be formed on a surface of the first insulating layer, the through hole, and an exposed portion of the carrier tape.

본 발명에 따른 연성인쇄회로기판의 제조방법에 따르면, 각 단면기판이 캐리어 테이프에 의해 동일한 공정을 동시에 거친 후에 분리됨에 따라 한 번의 공정으로 두 개의 단면기판이 동시 제조될 수 있는 이점이 있다. 이에 따라, 기판의 생산성이 향상되고, 기판의 제조 비용 및 시간이 절약될 수 있다. 더욱이, 상기 캐리어 테이프에 의해, 제조 공정시 기판의 두께가 상승하게 되어 기판의 구김 불량 문제를 해결할 수 있다.According to the method of manufacturing a flexible printed circuit board according to the present invention, since the single-sided substrates are simultaneously separated by the carrier tape and then separated, the two-sided substrates can be simultaneously manufactured in one process. Accordingly, the productivity of the substrate can be improved, and the manufacturing cost and time of the substrate can be saved. In addition, the carrier tape increases the thickness of the substrate during the manufacturing process, thereby solving the problem of poor wrinkle of the substrate.

도 1은 본 발명의 실시예에 따른 인쇄회로기판의 제조방법의 흐름도이다. 도 2 및 도 3은 도 1의 제조방법을 나타내는 단면도이다. 1 is a flowchart of a method of manufacturing a printed circuit board according to an exemplary embodiment of the present invention. 2 and 3 are cross-sectional views showing the manufacturing method of FIG.

이하에서는 상기 연성인쇄회로기판의 제조방법에 관하여 도 1 내지 도 3을 참조로 하여 상세히 알아보고자 한다.Hereinafter, a method of manufacturing the flexible printed circuit board will be described in detail with reference to FIGS. 1 to 3.

먼저, 도 1 및 도 2를 참조하면, 제1동박층(111)과 제1절연층(112)이 상하로 적층된 제1단면기판(110)과, 제2동박층(121)과 제2절연층(122)이 상하로 적층된 제2단면기판(120)을 준비한다(S110).First, referring to FIGS. 1 and 2, the first cross-sectional substrate 110 and the second copper foil layer 121 and the second copper foil layer 111 and the first insulating layer 112 are stacked on top of each other. A second cross-sectional substrate 120 having an insulating layer 122 stacked up and down is prepared (S110).

상기 절연층(112,122)으로는 FCCL의 절연층에 해당되는 폴리이미드 기판이 사용된다. 물론, 상기 절연층(112,122)으로는 상기 폴리이미드 이외에도, PEN(폴리에틸렌 나프탈레이트), PET(폴리에틸렌 테레프탈레이트), LCP(리퀴드 크리스탈 폴리머) 등이 사용될 수 있다.As the insulating layers 112 and 122, a polyimide substrate corresponding to an insulating layer of FCCL is used. Of course, in addition to the polyimide, PEN (polyethylene naphthalate), PET (polyethylene terephthalate), LCP (liquid crystal polymer), etc. may be used as the insulating layers 112 and 122.

이후에는, 상기 제1동박층(111)과 제2동박층(121)의 일부분이 노출되도록, 상기 제1절연층(112)과 제2절연층(122)의 일부분(113,123)을 각각 가공한다(S120). 이때, 가공의 방식은 통상의 기판 가공에 사용되는 다양한 방식 중 선택적으로 채용 가능하다. 물론, 절연층(112,122)과 동박층(111,121)을 동시에 가공하여 관통홀을 형성하는 실시예도 가능하며, 이는 추후 상세히 설명하기로 한다.Subsequently, portions 113 and 123 of the first insulating layer 112 and the second insulating layer 122 are processed so that portions of the first copper foil layer 111 and the second copper foil layer 121 are exposed. (S120). In this case, the method of processing may be selectively employed among various methods used for normal substrate processing. Of course, an embodiment in which a through hole is formed by simultaneously processing the insulating layers 112 and 122 and the copper foil layers 111 and 121 is also possible, which will be described in detail later.

그런 다음, 상기 제1동박층(111)의 후면과 상기 제2동박층(121)의 후면 사이에 캐리어 테이프(Carrier tape;130)를 배치하여, 상기 제1단면기판(110)과 제2단면기판(120)을 서로 부착한다(S130). Then, a carrier tape 130 is disposed between the rear surface of the first copper foil layer 111 and the rear surface of the second copper foil layer 121, so that the first cross-sectional substrate 110 and the second cross section are disposed. The substrates 120 are attached to each other (S130).

상기 캐리어 테이프(130)는, 각 단면기판(110,120)에 대해, 후술할 씨드층 형성 공정(S140) 및 동도금 공정(S150)이 한 번에 수행될 수 있도록 한다.The carrier tape 130 allows the seed layer forming process (S140) and the copper plating process (S150) to be described later to be performed on each end substrate (110, 120) at a time.

상기 S130단계 이후에는, 상기 제1절연층(112)의 표면과 상기 제1동박층(111)의 노출된 부분, 및 상기 제2절연층(122)의 표면과 상기 제2동박층(121)의 노출된 부분에 각각 씨드층(140,150)을 형성함에 따라, 상기 절연층(112,122)의 표면과 상기 동박층(111,121)의 노출된 부분을 서로 도통시킨다(S140). After the step S130, the exposed portion of the surface of the first insulating layer 112 and the first copper layer 111, the surface of the second insulating layer 122 and the second copper layer 121 are formed. As the seed layers 140 and 150 are formed on the exposed portions of the insulating layers 112 and 150, the surfaces of the insulating layers 112 and 122 and the exposed portions of the copper foil layers 111 and 121 are electrically connected to each other (S140).

상기 씨드층(140,150)은 상기 절연층(112,122)의 표면에 동도금이 가능하도록 하기 위함이다. 이러한 씨드층(140,150)은 니켈-크롬(Ni-Cr), 구리(Cu) 또는 니켈(Ni)에 의해 형성되는데, 반드시 이에 한정되는 것은 아니다.The seed layers 140 and 150 are intended to enable copper plating on the surfaces of the insulating layers 112 and 122. The seed layers 140 and 150 are formed of nickel-chromium (Ni-Cr), copper (Cu), or nickel (Ni), but are not necessarily limited thereto.

상기 씨드층(140,150)을 형성하기 위한 플라즈마, 표면처리 이온빔, 또는 디스미어 동작은, 상기 절연층(112,122)의 표면과 상기 동박층(111,121)의 노출된 부분을 향하여 발생되고, 씨드층(140,150)은 절연층(112,122)의 표면과 상기 동박층(111,121)의 노출된 부분에 형성된다. 상기 씨드층(120)을 형성시키기 위한 증착(Sputtering) 공법으로는, 고주파 유도가열 방식, 저항 가열방식, 일렉트론 빔 방식 및 플라즈마 방식 중의 하나 또는 복수 개의 방식을 이용한다. Plasma, surface treatment ion beam, or desmear operation for forming the seed layers 140 and 150 occurs toward the surfaces of the insulating layers 112 and 122 and the exposed portions of the copper foil layers 111 and 121, and the seed layers 140 and 150. ) Is formed on the surfaces of the insulating layers 112 and 122 and the exposed portions of the copper foil layers 111 and 121. As a sputtering method for forming the seed layer 120, one or more of a high frequency induction heating method, a resistance heating method, an electron beam method, and a plasma method are used.

도 1 및 도 3을 참조하면, 상기 씨드층(140,150)을 형성한 이후에는, 상기 씨드층(140,150)의 상부를 동도금(160,170)한다(S150). 이러한 동도금(160,170)을 통해 상기 절연층(112,122)의 표면과 상기 동박층(111,121)의 노출된 부분을 설정된 두께로 전기적으로 연결한다. 상기 동도금(160,170)은 전기 동도금 등이 이용될 수 있다.Referring to FIGS. 1 and 3, after the seed layers 140 and 150 are formed, copper plating 160 and 170 is performed on the top of the seed layers 140 and 150 (S150). The copper platings 160 and 170 electrically connect the surfaces of the insulating layers 112 and 122 and the exposed portions of the copper foil layers 111 and 121 to a predetermined thickness. The copper plating 160, 170 may be used, such as electric copper plating.

여기서, 각 단면기판(110,120)은 이송 및 취급 과정에서 연약해져서 흐물흐물해지고 구겨질 수 있는데, 상기 캐리어 테이프(130)는 상기 각 단면기판(110,120) 부분을 일정 두께 및 형태로 유지시켜 줌에 따라, 기판의 구김 불량과 휨 문제를 해결해주는 이점이 있다. Here, each of the cross-sectional substrates 110 and 120 may be soft and crumpled in the process of conveying and handling. As the carrier tape 130 maintains each of the cross-sectional substrates 110 and 120 in a predetermined thickness and shape, There is an advantage to solve the problem of wrinkles and bending of the substrate.

상기 동도금 이후에는, 상기 캐리어 테이프(130)를 제거함으로써 상기 제1단면기판(110)과 제2단면기판(120)을 분리한다(S160). After the copper plating, the first cross-sectional substrate 110 and the second cross-sectional substrate 120 are separated by removing the carrier tape 130 (S160).

즉, 상술한 각 단계를 거친 단면기판(110,120)은 상기 캐리어 테이프(130)에 의해 동일한 공정을 동시에 거친 후에 분리됨에 따라, 한 번의 공정으로 두 단면기판(110,120)이 동시 제조될 수 있는 이점이 있다. 이는 곧, 스퍼터링 및 동도금의 생산성을 증가시킴과 함께, 기판의 제조 비용 및 시간을 절약할 수 있음을 의미한다. 더욱이, 상기 캐리어 테이프에 의해 기판의 두께가 상승하게 되어, 공정 과정에서 기판의 구김 불량 문제를 해결할 수 있다. 또한, 상하층이 도통하면서도 두께가 얇은 양면형의 연성인쇄회로기판의 제조가 가능한 이점이 있다.That is, the cross-sectional substrates 110 and 120 which have been subjected to the above-described steps are separated after being subjected to the same process by the carrier tape 130 at the same time, so that both cross-sectional substrates 110 and 120 may be simultaneously manufactured in one process. have. This means that, while increasing the productivity of sputtering and copper plating, it is possible to save the manufacturing cost and time of the substrate. In addition, the thickness of the substrate is increased by the carrier tape, thereby solving the problem of wrinkles in the substrate during the process. In addition, there is an advantage that the upper and lower layers are conductive, but the thickness of the thin double-sided flexible printed circuit board can be manufactured.

도 4 및 도 5는 도 1의 S120단계에서 관통홀을 형성한 제조방법을 나타내는 단면도이다. 이러한 도 4 및 도 5의 과정은, 110 단계 내지 S160단계 중 S120단계시에 가공을 더 수행하여 관통홀을 형성한다는 점에서, 상기 도 2 및 도 3의 과정과 차이점이 있다.4 and 5 are cross-sectional views showing a manufacturing method of forming a through hole in step S120 of FIG. 4 and 5 are different from the processes of FIGS. 2 and 3 in that the through holes are formed by further processing at the step S120 in steps 110 to S160.

즉, 도 4 및 도 5를 참조하면, 이러한 S120단계에서 상기 제1절연층(112)과 제2절연층(122)의 일부분을 가공할 때, 상기 제1동박층(111)과 제2동박층(121)의 일부분을 함께 가공하여 관통홀(213,223)을 형성하게 된다.That is, referring to FIGS. 4 and 5, when processing a part of the first insulating layer 112 and the second insulating layer 122 in the step S120, the first copper foil layer 111 and the second copper foil. A portion of the layer 121 is processed together to form through holes 213 and 223.

이러한 경우, S140단계에서는 상기 제1절연층(112)의 표면과 상기 관통홀(213,223), 그리고 상기 캐리어테이프(140)의 노출된 부분에 각각 씨드층(140,150)을 형성함에 따라, 상기 절연층(112,122)의 표면과 상기 관통홀(213,223) 부분, 그리고 상기 캐리어테이프(140)의 노출된 부분을 서로 도통시킨다. 이외의 언급하지 않은 단계는 도 2 및 도 3의 단계와 일치하므로 보다 상세한 설명은 생략하기로 한다.In this case, in step S140, the seed layers 140 and 150 are formed on the surfaces of the first insulating layer 112, the through holes 213 and 223, and the exposed portions of the carrier tape 140, respectively. Surfaces of the 112 and 122, the through-holes 213 and 223, and the exposed portions of the carrier tape 140 are connected to each other. Other steps not mentioned are the same as the steps of FIGS. 2 and 3, and thus, more detailed description will be omitted.

본 발명은 도면에 도시된 실시예를 참고로 설명되었으나 이는 예시적인 것에 불과하며 본 기술 분야의 통상의 지식을 가진 자라면 이로부터 다양한 변형 및 균등한 다른 실시예가 가능한 점을 이해할 것이다. 따라서, 본 발명의 진정한 기술적 보호범위는 첨부된 특허청구범위의 기술적 사상에 의하여 정해져야 할 것이다.Although the present invention has been described with reference to the embodiments shown in the drawings, these are merely exemplary and those skilled in the art will understand that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

도 1은 본 발명의 실시예에 따른 인쇄회로기판의 제조방법의 흐름도이다.1 is a flowchart of a method of manufacturing a printed circuit board according to an exemplary embodiment of the present invention.

도 2 및 도 3은 도 1의 제조방법을 나타내는 단면도이다.2 and 3 are cross-sectional views showing the manufacturing method of FIG.

도 4 및 도 5는 도 1의 S120단계에서 관통홀을 형성한 제조방법을 나타내는 단면도이다.4 and 5 are cross-sectional views showing a manufacturing method of forming a through hole in step S120 of FIG.

< 도면의 주요 부분에 대한 부호의 간단한 설명 >BRIEF DESCRIPTION OF THE DRAWINGS FIG.

110: 제1단면기판 111: 제1동박층110: first cross-sectional substrate 111: first copper foil layer

112: 제1절연층 120: 제2단면기판112: first insulating layer 120: second cross-sectional substrate

121: 제2동박층 122: 제2절연층121: second copper foil layer 122: second insulating layer

130: 캐리어 테이프 140,150: 씨드층130: carrier tape 140, 150 seed layer

160,170: 동도금160,170: copper plating

Claims (4)

제1동박층과 제1절연층이 상하로 적층된 제1단면기판과, 제2동박층과 제2절연층이 상하로 적층된 제2단면기판을 준비하는 단계;Preparing a first cross-sectional substrate having a first copper foil layer and a first insulating layer stacked up and down, and a second cross-sectional substrate having a second copper foil layer and a second insulating layer stacked up and down; 상기 제1동박층과 제2동박층의 일부분이 노출되도록 상기 제1절연층과 제2절연층의 일부분을 각각 가공하는 단계;Processing a portion of the first insulating layer and the second insulating layer to expose portions of the first copper foil layer and the second copper foil layer, respectively; 상기 제1동박층과 상기 제2동박층 사이에 캐리어 테이프를 배치하여, 상기 제1단면기판과 제2단면기판을 서로 부착하는 단계;Disposing a carrier tape between the first copper foil layer and the second copper foil layer to attach the first cross-sectional substrate and the second cross-sectional substrate to each other; 상기 제1절연층의 표면과 상기 제1동박층의 노출된 부분, 및 상기 제2절연층의 표면과 상기 제2동박층의 노출된 부분에 각각 씨드층을 형성하여, 상기 절연층의 표면과 상기 동박층의 노출된 부분을 서로 도통시키는 단계;A seed layer is formed on a surface of the first insulating layer and an exposed portion of the first copper foil layer, a surface of the second insulating layer and an exposed portion of the second copper foil layer, respectively, Conducting exposed portions of the copper foil layer to each other; 상기 씨드층의 상부를 동도금하는 단계; 및Copper plating an upper portion of the seed layer; And 상기 캐리어 테이프를 제거하여 상기 제1단면기판과 제2단면기판을 분리하는 단계를 포함하는 연성인쇄회로기판의 제조방법.And removing the carrier tape to separate the first cross-sectional substrate and the second cross-sectional substrate. 청구항 1에 있어서, 상기 씨드층을 형성하는 단계는,The method of claim 1, wherein the forming of the seed layer, 고주파 유도가열 방식, 저항 가열방식, 일렉트론 빔 방식 또는 플라즈마 방식 중의 하나 또는 복수 개의 방식을 이용하는 연성인쇄회로기판의 제조방법.A method of manufacturing a flexible printed circuit board using one or a plurality of methods of high frequency induction heating, resistance heating, electron beam, or plasma. 청구항 1 또는 청구항 2에 있어서, 상기 씨드층은,The method according to claim 1 or 2, wherein the seed layer, 니켈-크롬, 구리 또는 니켈을 포함하는 연성인쇄회로기판의 제조방법.Method for manufacturing a flexible printed circuit board containing nickel-chromium, copper or nickel. 청구항 1에 있어서, 상기 제1절연층과 제2절연층의 일부분을 가공하는 단계는,The method of claim 1, wherein processing a portion of the first insulating layer and the second insulating layer, 상기 제1동박층과 제2동박층의 일부분을 함께 가공하여 관통홀을 형성하고,A portion of the first copper foil layer and the second copper foil layer are processed together to form a through hole, 상기 씨드층을 형성하는 단계는, Forming the seed layer, 상기 제1절연층의 표면과 상기 관통홀, 및 상기 캐리어테이프의 노출된 부분에 각각 씨드층을 형성하는 연성인쇄회로기판의 제조방법.And forming a seed layer on a surface of the first insulating layer, the through hole, and an exposed portion of the carrier tape, respectively.
KR1020090099343A 2009-10-19 2009-10-19 Method of manufacturing flexible printed circuit board KR101021344B1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100872131B1 (en) 2007-07-10 2008-12-08 삼성전기주식회사 Manufacturing method for printed circuit board
KR100874172B1 (en) 2007-07-13 2008-12-15 (주)아큐텍반도체기술 Method for manufacturing flexible printed circuit board and metallic wiring pattern of flexible printed circuit board using thereof
KR20090002718A (en) * 2007-07-04 2009-01-09 삼성전기주식회사 Carrier and method for manufacturing printed circuit board
KR20090101404A (en) * 2008-04-18 2009-09-28 대덕전자 주식회사 Method of manufacturing coreless printed circuit board

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20090002718A (en) * 2007-07-04 2009-01-09 삼성전기주식회사 Carrier and method for manufacturing printed circuit board
KR100872131B1 (en) 2007-07-10 2008-12-08 삼성전기주식회사 Manufacturing method for printed circuit board
KR100874172B1 (en) 2007-07-13 2008-12-15 (주)아큐텍반도체기술 Method for manufacturing flexible printed circuit board and metallic wiring pattern of flexible printed circuit board using thereof
KR20090101404A (en) * 2008-04-18 2009-09-28 대덕전자 주식회사 Method of manufacturing coreless printed circuit board

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