KR100624963B1 - 고전압 소자의 제조방법 - Google Patents
고전압 소자의 제조방법 Download PDFInfo
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- KR100624963B1 KR100624963B1 KR1020050067700A KR20050067700A KR100624963B1 KR 100624963 B1 KR100624963 B1 KR 100624963B1 KR 1020050067700 A KR1020050067700 A KR 1020050067700A KR 20050067700 A KR20050067700 A KR 20050067700A KR 100624963 B1 KR100624963 B1 KR 100624963B1
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- 238000000034 method Methods 0.000 title claims abstract description 36
- 238000005468 ion implantation Methods 0.000 claims abstract description 18
- 238000004519 manufacturing process Methods 0.000 claims abstract description 15
- 150000002500 ions Chemical class 0.000 claims description 19
- 239000004065 semiconductor Substances 0.000 claims description 7
- 125000006850 spacer group Chemical group 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 7
- 238000004140 cleaning Methods 0.000 claims description 6
- 239000011229 interlayer Substances 0.000 claims description 4
- 238000002955 isolation Methods 0.000 claims description 4
- 239000010410 layer Substances 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 claims description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 2
- 229910001873 dinitrogen Inorganic materials 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims 4
- 239000000203 mixture Substances 0.000 claims 2
- -1 LDD ions Chemical class 0.000 claims 1
- 230000003213 activating effect Effects 0.000 claims 1
- 230000015556 catabolic process Effects 0.000 abstract description 11
- 230000005684 electric field Effects 0.000 abstract description 4
- 239000012535 impurity Substances 0.000 description 5
- 238000000137 annealing Methods 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000009499 grossing Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- High Energy & Nuclear Physics (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Toxicology (AREA)
- Health & Medical Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
Claims (11)
- 반도체 기판에 소자분리막 및 게이트를 형성하는 단계;틸트각을 갖고 DDD 이온을 주입하여 완만한 경사를 갖는 DDD 접합을 형성하는 단계;전면에 LDD 이온을 주입하는 단계;상기 게이트 양측면에 스페이서를 형성하는 단계;상기 게이트 및 스페이서 양측 DDD 접합 내에 고농도 소오스 및 드레인 접합을 형성하는 단계를 포함하는 고전압 소자의 제조방법.
- 제 1항에 있어서,상기 틸트각은 3~7°인 것을 특징으로 하는 고전압 소자의 제조방법.
- 제 1항에 있어서,상기 스페이서를 형성한 이후에 전면에 버퍼 산화막을 형성하는 단계를 더 포함하는 것을 특징으로 하는 고전압 소자의 제조방법.
- 제 3항에 있어서,상기 버퍼 산화막을 50~150Å의 두께로 형성하는 것을 특징으로 하는 고전압 소자의 제조방법.
- 제 1 항에 있어서,상기 고농도 소오스 및 드레인 접합을 형성한 이후에 크리닝 공정을 실시하는 단계;전표면상에 스탑퍼 산화막과 스탑퍼 질화막을 형성하는 단계;전면에 층간 절연막을 형성하는 단계;상기 층간 절연막에 상기 고농도 소오스 및 드레인 접합을 노출하는 콘택홀을 형성하는 단계;상기 콘택홀 하부의 반도체 기판에 오믹 콘택을 형성하는 단계; 및상기 콘택홀내에 플러그를 형성하는 단계를 더 포함하는 것을 특징으로 하는 고전압 소자의 제조방법.
- 제 5항에 있어서,상기 크리닝 공정시 SPM(H2SO4와 H2O2의 혼합액)과 APM(NH4OH와 H2O2 및 H2O의 혼합액)의 혼합액을 사용하는 것을 특징으로 하는 고전압 소자의 제조방법.
- 제 5항에 있어서,상기 스탑퍼 산화막을 50~200Å의 두께로 형성하는 것을 특징으로 하는 고전압 소자의 제조방법.
- 제 5항에 있어서,상기 오믹 콘택은 상기 콘택홀 하부에 플러그 이온을 주입하여 형성하는 것을 특징으로 하는 고전압 소자의 제조방법.
- 제 8항에 있어서,상기 플러그 이온으로 P31 이온을 이용하고, 이온 주입 에너지는 5~20KeV, 틸트각은 0°, 이온주입량은 5E14~2E15ions/㎤가 되도록 하는 것을 특징으로 하는 고전압 소자의 제조방법.
- 제 8항에 있어서,상기 플러그 이온을 주입한 이후에 상기 플러그 이온의 활성화를 위하여 질소 가스 분위기에서 급속열처리하는 단계를 더 포함하는 것을 특징으로 하는 고전압 소자의 제조방법.
- 제 10항에 있어서,상기 급속열처리 공정의 온도는 1000℃, 열처리 시간은 30~60분으로 설정하고, 열처리 온도의 랩프업 비율은 200~250℃/sec가 되도록 하는 것을 특징으로 하는 고전압 소자의 제조방법.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050067700A KR100624963B1 (ko) | 2005-07-26 | 2005-07-26 | 고전압 소자의 제조방법 |
US11/438,992 US7361564B2 (en) | 2005-07-26 | 2006-05-23 | Method of manufacturing high-voltage device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR1020050067700A KR100624963B1 (ko) | 2005-07-26 | 2005-07-26 | 고전압 소자의 제조방법 |
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KR100624963B1 true KR100624963B1 (ko) | 2006-09-15 |
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KR1020050067700A KR100624963B1 (ko) | 2005-07-26 | 2005-07-26 | 고전압 소자의 제조방법 |
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US (1) | US7361564B2 (ko) |
KR (1) | KR100624963B1 (ko) |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
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WO1994027325A1 (en) * | 1993-05-07 | 1994-11-24 | Vlsi Technology, Inc. | Integrated circuit structure and method |
US6069031A (en) * | 1998-01-26 | 2000-05-30 | Texas Instruments - Acer Incorporated | Process to form CMOS devices with higher ESD and hot carrier immunity |
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- 2005-07-26 KR KR1020050067700A patent/KR100624963B1/ko not_active IP Right Cessation
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- 2006-05-23 US US11/438,992 patent/US7361564B2/en not_active Expired - Fee Related
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US7361564B2 (en) | 2008-04-22 |
US20070026618A1 (en) | 2007-02-01 |
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