KR100265939B1 - Forming method of oxidation layer - Google Patents

Forming method of oxidation layer Download PDF

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KR100265939B1
KR100265939B1 KR1019970038197A KR19970038197A KR100265939B1 KR 100265939 B1 KR100265939 B1 KR 100265939B1 KR 1019970038197 A KR1019970038197 A KR 1019970038197A KR 19970038197 A KR19970038197 A KR 19970038197A KR 100265939 B1 KR100265939 B1 KR 100265939B1
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oxide film
ion doping
film
oxygen
layer
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KR1019970038197A
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Korean (ko)
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KR19990015855A (en
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최동욱
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구본준
엘지.필립스 엘시디주식회사
론 위라하디락사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate

Abstract

PURPOSE: A method for forming an oxide film is provided to form an oxide film at an ion doping process temperature by doping oxygen plasma to a polysilicon layer using a normal ion doping method to oxidize the top of a polysilicon layer. CONSTITUTION: A method for forming an oxide film forms a ploysilicon layer on an insulating substrate(30). An active layer(31L) is formed by a normal etching technology. An ion doping process using oxygen plasma is implemented to supply oxygen(33) into the polysilicon layer being the active layer(31L). Heat is supplied so that the temperature of the substrate(30) can be maintained at the temperature of about 150-200 Celsius degree. Supply of heat allows oxygen(33) to be combined with silicon particles(31) without destruction of the structure of the polysilicon layer. Thus, the active layer(31L) into which oxygen particle are injected is oxidized to form an oxide film.

Description

산화막 형성방법Oxide Formation Method

본 발명은 산화막 형성방법에 관한 것으로 특히, 저온에서도 실리콘층과의 계면 접촉이 양호한 산화막을 형성할 수 있는 산화막 형성방법에 관한 것이다.The present invention relates to an oxide film forming method, and more particularly, to an oxide film forming method capable of forming an oxide film having good interfacial contact with a silicon layer even at low temperatures.

액정표시장치의 제조에서는 대면적을 가지는 화면을 이루고, 고해상도를 실현하기 위하여 캐리어의 이동도를 높이는 방법이 관건인데, 이를 만족시키기 위한 기술이 저온 다결정실리콘 박막트랜지스터 기술이다. 저온 다결정실리콘 박막트랜지스터의 공정온도는 사용하는 유리기판의 내열온도에 의해 결정된다. 400℃ 이하의 온도조건에서 유리기판 상에 다결정실리콘을 형성해야 물리적 특성이 좋은 박막트랜지스터를 형성할 수 있다.In manufacturing a liquid crystal display device, a method of increasing the mobility of a carrier in order to achieve a high-resolution screen and to realize high resolution is a key technology for satisfying the low temperature polysilicon thin film transistor technology. The process temperature of the low temperature polycrystalline silicon thin film transistor is determined by the heat resistance temperature of the glass substrate used. Polycrystalline silicon should be formed on a glass substrate at a temperature of 400 ° C. or lower to form a thin film transistor having good physical properties.

박막트랜지스터 액정표시장치의 일 구성인 게이트절연막은 활성층인 다결정실리콘층과 게이트 전극 사이에 형성된다. 이때, 게이트절연막은 활성층의 구성물질인 다결정실리콘층과의 계면특성이 좋고, 게이트전극과의 밀착성이 좋으며, 절연내압이 좋아야 한다.A gate insulating film, which is one component of a thin film transistor liquid crystal display device, is formed between a polysilicon layer, which is an active layer, and a gate electrode. In this case, the gate insulating film should have good interface characteristics with the polysilicon layer, which is a constituent material of the active layer, good adhesion with the gate electrode, and good insulation breakdown voltage.

종래의 경우, 절연막을 형성하기 위하여 널리 쓰 여왔던 증착 기술은 CVD(CVD:Chemical Vapor Deposition)에 의한 산화물 증착 방법이다.In the conventional case, a deposition technique that has been widely used to form an insulating film is an oxide deposition method by CVD (Chemical Vapor Deposition).

CVD는 반응성이 강한 기체 상태의 화합물을 반응장치 안에 주입하여 이를 빛, 열, 플라즈마, 자장 등을 이용하여 반응성 가스를 활성화시켜 반도체 기판위에 막을 형성하는 공정 기술을 말한다. 또한, CVD는 형성시키려고 하는 박막 재료를 구성하는 원소로 된 1종 또는 그 이상의 화합물, 단체의 가스를 공급해 화학 반응에 의해서 소망하는 박막을 기판 상에 형성시키는 방법이다.CVD refers to a process technology in which a highly gaseous compound is injected into a reactor and a film is formed on a semiconductor substrate by activating a reactive gas using light, heat, plasma, or magnetic field. In addition, CVD is a method of forming a desired thin film on a substrate by chemical reaction by supplying one or more compounds or elements of an element constituting the thin film material to be formed, or a single gas.

도 1은 CVD에 의하여 산화막을 형성하는 공정을 간단하게 나타낸 도면이다.1 is a diagram briefly showing a process of forming an oxide film by CVD.

활성층으로 사용될 다결정실리콘층(11L)이 형성된 유리기판(10)에 산화막(13L)을 형성하는데 필요한 원자(13)들이 다결정실리콘층(11L)에 증착되어 산화막(13L)이 형성되는 과정을 보여주고 있다. 산화막을 형성하기 위한 공급 원자인 막구성원자들이 다결정실리콘층(11L) 표면에서 실리콘 원자들과 결합하여 산화막(13L)을 키워나가는 것이다. 실리콘 산화막을 형성할 경우에는 통상적으로, SiH4, O2등의 가스에 의한 화학반응에 의하여 막을 형성한다.Atoms 13 needed to form the oxide film 13L on the glass substrate 10 having the polysilicon layer 11L to be used as the active layer are deposited on the polysilicon layer 11L to form the oxide film 13L. have. Film constituents, which are supply atoms for forming an oxide film, are combined with silicon atoms on the surface of the polysilicon layer 11L to grow the oxide film 13L. When forming a silicon oxide film is typically, SiH 4, O 2 to form a film by a chemical reaction by the gas and the like.

산화막은 그 제조공정의 온도에 영향을 받아 막의 특성이 결정된다. 즉, 소정의 온도 이상에서 산화공정을 진행할 경우에는 막구성원자들은 활발하게 이동하면서 막을 형성한다. 그런데 제조공정의 온도가 낮은 경우에는 막구성원자들의 이동이 활발하지 못하게 되고, 원자간 결합이 불량하여 막을 형성하여도 막 내부에 디펙트(defect)가 다량 발생한다. 또한, 다결정실리콘 원자와의 결합도 불량하여 다결정실리콘층과 산화막의 계면에서도 디펙트를 생성한다.The oxide film is affected by the temperature of the manufacturing process and the film properties are determined. That is, when the oxidation process is carried out at a predetermined temperature or more, the film constituents actively move to form a film. However, when the temperature of the manufacturing process is low, the movement of the membrane constituents becomes inactive, and even if the interatomic bonds are poor, a large amount of defects are generated inside the membrane. In addition, the bonding with the polysilicon atoms is also poor, producing defects at the interface between the polysilicon layer and the oxide film.

산화막 내부의 디펙트는 막의 결정구조가 부분적으로 손상되었음을 의미하며, 이 부분은 저항으로 작용한다. 즉, 막 구조의 손상은 운동하는 입자 즉, 캐리어를 포획하는 트랩(trap)현상을 야기시켜 박막트랜지스터의 신뢰성을 악화시킨다. 트랩 현상은 막 내부의 디펙트 뿐만 아니라, 다결정실리콘층과 산화막의 계면에서의 결함에 의해서도 발생한다. 따라서 산화막을 형성하는 공정은 디펙트 등의 결함을 적게 하는 것이 박막트랜지스터의 신뢰성에서 유리하다.The defect inside the oxide film means that the crystal structure of the film is partially damaged, and this part acts as a resistance. In other words, damage to the membrane structure causes trapping to trap moving particles, i.e. carriers, thereby degrading the reliability of the thin film transistor. The trapping phenomenon is caused not only by the defect inside the film but also by the defect at the interface between the polysilicon layer and the oxide film. Therefore, it is advantageous in the reliability of the thin film transistor to reduce defects such as defects in the process of forming the oxide film.

도 2는 막 내부의 디펙트가 박막트랜지스터의 신뢰성에 영향을 주는 것을 설명하는 그래프이다. 산화막내 디펙트 등의 결함이 박막트랜지스터의 스위칭작동에 영향을 주고 있음을 보여준다. 도면에서 실선(I)은 막에 디펙트가 적은 경우를, 점선(II)은 막내 디펙트가 많은 경우에 있어서의 드레인전류 특성을 나타낸다. 막내 디펙트가 많은 경우에는 온/오프 전류비가 작을 뿐만 아니라, 온전류가 작고 오프전류가 상당히 크기 때문에 스위칭 특성이 좋지 않다. 이와 같이 다결정실리콘 박막트랜지스터의 경우, 산화막 내부의 특성과 산화막과 다결정실리콘층의 계면 특성은 박막트랜지스터의 안정성이나 신뢰성을 결정해주는 중요한 요소이다. 이는 막 내부에 혹은 계면에서의 디펙트가 캐리어의 이동을 방해하기 때문이다. 따라서 산화막 형성시, 디펙트를 감소시킴으로써, 다결정실리콘 박막트랜지스터의 신뢰성을 향상시키는 것이 중요하다.2 is a graph illustrating that the defects inside the film affect the reliability of the thin film transistor. Defects such as defects in the oxide film affect the switching operation of the thin film transistor. In the figure, the solid line (I) shows the drain current characteristics when the film has few defects, and the dotted line (II) shows the case where the film has many defects. In the case of a large number of defects in the film, not only the on / off current ratio is small but also the switching characteristics are not good because the on current is small and the off current is considerably large. As described above, in the case of the polysilicon thin film transistor, the characteristics of the inside of the oxide film and the interfacial properties of the oxide film and the polysilicon layer are important factors for determining the stability or reliability of the thin film transistor. This is because defects inside the film or at the interface interfere with the movement of the carrier. Therefore, it is important to improve the reliability of the polysilicon thin film transistor by reducing defects in forming the oxide film.

산화막의 디펙트 생성은 막을 구성하는 막구성원자의 운동성과 관련이 있는데, 통상적인 경우, 400∼500℃ 이상의 공정조건하에서 산화막을 형성해야 산화막 내의 막구성원자들이 안정한 결합을 하게 되어 디펙트(defect)가 적게 생긴다. 그러나 이와 같은 공정온도는 저온 다결정실리콘 박막트랜지스터를 제조하는데 있어서는 문제가 된다. 즉, 좋은 계면을 얻기 위해서는 고온 공정 조건이 필요하겠지만, 유리기판에 다결정실리콘 박막트랜지스터를 제조하기 위해서는 저온 공정 조건이 필요하기 때문이다. 결국, 저온 공정 조건하에서도 안정된 결합 구조를 가지는 산화막을 형성하는 것이 요구된다.Defect generation of the oxide film is related to the motility of the film constituents constituting the film. In general, an oxide film must be formed under a process condition of 400 to 500 ° C. or higher to ensure stable bonding of film constituents in the oxide film. Less occurs. However, such a process temperature is a problem in manufacturing a low temperature polysilicon thin film transistor. In other words, high temperature process conditions are required to obtain a good interface, but low temperature process conditions are required to fabricate a polysilicon thin film transistor on a glass substrate. As a result, it is required to form an oxide film having a stable bonding structure even under low temperature process conditions.

본 발명은 통상적인 이온 도핑 방법을 이용하여 산소 플라즈마를 다결정실리콘층에 도핑시켜 다결정실리콘층의 상부를 산화시킴으로써, 이온도핑 공정 온도에서도 산화막을 형성하려 하는 것이다.The present invention is to oxidize the upper portion of the polysilicon layer by doping an oxygen plasma to the polysilicon layer using a conventional ion doping method, to form an oxide film even at the ion doping process temperature.

상기 목적을 달성하기 위하여 본 발명은 절연기판 사엥 다결정 실리콘 박막을 형성하는 공정과, 상기 다결정 실리콘 박막을 산소 플라즈마를 사용하는 이온도핑 공정에 의하여 산화시키되, 상기 이오노핑 공정을 300℃이하의저온조건하에서는 진행하는 공정을 포함하는 산화막 형성방법을 제공한다.In order to achieve the above object, the present invention oxidizes the polycrystalline silicon thin film by an ion doping process using an oxygen plasma and a process of forming an insulating substrate Saeng polycrystalline silicon thin film, the ionoping process is a low temperature condition of less than 300 ℃ In the following, an oxide film forming method including an ongoing process is provided.

제1도는종래의 기술에 의한 산화막 형성방법을 설명하기 위한 개략도.1 is a schematic diagram for explaining a method of forming an oxide film by a conventional technique.

제2도는 산화막과 트랜지스터의 신뢰성을 나타낸 그래프.2 is a graph showing the reliability of the oxide film and the transistor.

제3도과 제4도는 본 발명에 의한 산화막 형성 방법을 설명하기 위한 개략도.3 and 4 are schematic diagrams for explaining the oxide film forming method according to the present invention.

이하, 첨부된 도면을 참조하여 본 발명을 설명하면 다음과 같다.Hereinafter, the present invention will be described with reference to the accompanying drawings.

도 3과 도4는 본 발명의 실시에에 따른 산화막 형성 방법을 설명하기 위한 개략도를 나타낸 것이다.3 and 4 show schematic views for explaining the oxide film forming method according to the embodiment of the present invention.

언급한 바와 같이, 본 발명은 통상적인 이온 도핑 방법을 이용하여 산소 플라즈마를 다결정 실리콘층에 도핑시켜 다결정 실리콘층의 상부를 산화시킴으로써, 이온도핑 공정 온도에서도 산화막을 형성하려 하는 것이다.As mentioned, the present invention intends to form an oxide film even at an ion doping process temperature by oxidizing an upper portion of the polycrystalline silicon layer by doping an oxygen plasma to the polycrystalline silicon layer using a conventional ion doping method.

통상적으로 CVD 기술은 약 300~500℃ 전도에서 진행되는데, 이온도핑 공정기술은 약 150~200℃ 정도에서 진행된다.Typically, CVD technology is conducted at about 300-500 ° C conduction, and ion doping process technology is performed at about 150-200 ° C.

도 3을 참조하면, 절연기판(30) 위에 다결정 실리콘층을 형성한 후, 통상적인 식각기술에 의하여 활성층(31L)을 형성한다. 이어서, 산소 플라즈마를 사용하는 이온 도핑 공정을 실시하여 활성층(31L)인 다결정 실리콘층에 산소(33)를 도핑한다. 이때 기판의 온도를 약 150~200℃ 전도를 유지할 수 있도록 열을 공급한다. 이러한 열의 공급은 공급된 산소(33)가 다결정 실리콘층의 구조를 파괴하지 않고 주입되어 실리콘 입자(31)와 안정한 결합을 하게 한다. 이때 너무 낮은 온도에서 산소 플라즈마 도핑 공정을 실시하면 산소 입자(33)가 실리콘 입자(31)와 결합하는 과정에서, 물리적 충격에 의하여 그 결정 구조가 파괴될 수 있다.Referring to FIG. 3, after forming the polycrystalline silicon layer on the insulating substrate 30, the active layer 31L is formed by a conventional etching technique. Subsequently, an ion doping process using an oxygen plasma is performed to dope the oxygen 33 into the polycrystalline silicon layer, which is the active layer 31L. At this time, heat is supplied to maintain the temperature of the substrate about 150 ~ 200 ℃ conduction. This supply of heat causes the supplied oxygen 33 to be injected without destroying the structure of the polycrystalline silicon layer to make stable bonding with the silicon particles 31. In this case, if the oxygen plasma doping process is performed at a temperature that is too low, the crystal structure may be destroyed by physical impact in the process of combining the oxygen particles 33 with the silicon particles 31.

따라서, 본 발명은 도 4에 보인 바와 같이, 종래의 증착 기술인 덮는 개념이 아닌 입자가 실리콘층에 들어가서 실리콘 입자와 결합을 함으로써, 산소 입자가 주입된 활성층(31L)부분을 산화시켜 산화막(33L)을 형성하는 것이다.Therefore, the present invention, as shown in Figure 4, by the non-overlapping particles of the conventional deposition technique enters the silicon layer and bonds with the silicon particles, thereby oxidizing the portion of the active layer (31L) in which oxygen particles are injected to the oxide film 33L To form.

이때, 산소 플라즈마 도핑시, 산소 입자를 5∼20kV 정도, 적절하게는 10kV정도의 가속 전압으로 도핑시키는 경우, 활성층의 표면에서 약 150∼200Å정도로 산소가 주입되어 그 두께만큼 실리콘 상부를 산화시킬 수 있다. 즉, 실리콘층에 형성되는 산화막의 두께는 산소 플라즈마 도핑시, 도핑 가속 전압을 변화시킴으로서, 그 조절이 가능하다.At this time, in the case of oxygen plasma doping, when oxygen particles are doped at an acceleration voltage of about 5 to 20 kV, and preferably about 10 kV, oxygen is injected at about 150 to 200 kV from the surface of the active layer to oxidize the upper portion of silicon by the thickness thereof. have. That is, the thickness of the oxide film formed on the silicon layer can be adjusted by changing the doping acceleration voltage during oxygen plasma doping.

상술한 바와 같이 본 발명에서는 산화막을 형성하는 산소 입자등이 증착하는 개념이 아닌 실리콘층에 주입되어 실리콘 입자들과 안정한 결합을 하여 산화막을 형성한다. 따라서 반도체 활성층과 계면특성이 좋고 막내 디펙트가 적은 양질의 산화막을 형성할 수 있다. 더구나, 이러한 양질의 산화막은 고온 공정 조건이 필요한 CVD기술이 아닌 저온 공정 조건인 이온도핑 기술에 의하여 형성할 수 있다. 또한, 이온 도핑 기술에 의하여 선택적인 이온 주입이 가능하기 때문에 선택적인 산화막 형성이 가능하다. 본 발명에서 형성되는 산화막 상에 다른 절연막을 형성함으로써, 소자 형성시, 이중의 절연막으로 사용할 수도 있다.As described above, in the present invention, oxygen particles, which form an oxide film, are injected into a silicon layer, not a concept of depositing, to form stable oxide films with silicon particles. Therefore, a high quality oxide film having good interfacial properties with a small amount of defects in the film can be formed. Moreover, such a high quality oxide film can be formed by ion doping technology, which is a low temperature process condition, rather than a CVD technique requiring a high temperature process condition. In addition, since selective ion implantation is possible by an ion doping technique, selective oxide film formation is possible. By forming another insulating film on the oxide film formed in the present invention, it can be used as a double insulating film at the time of element formation.

본 발명은 유리기판에 저온 다결정 실리콘 박막트랜지스터를 제조하는데 있어서, 저온공정하에서도 실리콘 박막 상에 안정된 결합 구조를 가지는 산화막을 형성할 수 있다. 그 결과, 본 발명은 저온 조건에서도 반도체 활성층 상에 계면접촉이 좋고 막내 디펙트가 적은 양질의 산화막을 형성하는 것이 가능하여 신뢰성 있는 소자를 제작하는 것이 가능하다.According to the present invention, in manufacturing a low temperature polycrystalline silicon thin film transistor on a glass substrate, an oxide film having a stable bonding structure can be formed on a silicon thin film even under a low temperature process. As a result, the present invention can form a high quality oxide film having good interfacial contact on the semiconductor active layer and low defects in the film even at low temperature conditions, and thus it is possible to manufacture a reliable device.

Claims (3)

절연 기판상에 다결정 실리콘 박막을 형성하는 공정과, 상기 다결정 실리콘 박막을 산소 플라즈마를 사용하는 이온 도핑 공정에 의하여 산화시키되, 상기 이온도핑 공정을 300℃ 이하의 저온조건하에서는 진행하는 공정을 실시하여 상기 실리콘 박막의 상부를 산화시키는 산화막 형성 방법.Forming a polycrystalline silicon thin film on an insulating substrate and oxidizing the polycrystalline silicon thin film by an ion doping process using an oxygen plasma, and performing the ion doping process under a low temperature condition of 300 ° C. or lower. An oxide film forming method for oxidizing an upper portion of a silicon thin film. 청구항 1에 있어서,The method according to claim 1, 상기 이온 도핑 공정은 150∼200℃에서 실시하는 것을 산화막 형성 방법.The ion doping step is carried out at 150 ~ 200 ℃ oxide film formation method. 청구항 1에 있어서,The method according to claim 1, 상기 이온 도핑 공정은 5∼20kV정도의 온 가속 전압하에서 진행하는 산화막 형성 방법.And the ion doping step is performed under an on acceleration voltage of about 5 to 20 kV.
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JPH05299345A (en) * 1992-04-23 1993-11-12 Nippon Steel Corp Substrate for electronic element and its manufacture

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Publication number Priority date Publication date Assignee Title
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