JPWO2020230665A1 - - Google Patents
Info
- Publication number
- JPWO2020230665A1 JPWO2020230665A1 JP2021519379A JP2021519379A JPWO2020230665A1 JP WO2020230665 A1 JPWO2020230665 A1 JP WO2020230665A1 JP 2021519379 A JP2021519379 A JP 2021519379A JP 2021519379 A JP2021519379 A JP 2021519379A JP WO2020230665 A1 JPWO2020230665 A1 JP WO2020230665A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
- G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
- G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
- H10B20/27—ROM only
- H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
- H10B20/34—Source electrode or drain electrode programmed
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
- H10B20/27—ROM only
- H10B20/50—ROM only having transistors on different levels, e.g. 3D ROM
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2019090697 | 2019-05-13 | ||
PCT/JP2020/018392 WO2020230665A1 (ja) | 2019-05-13 | 2020-05-01 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2020230665A1 true JPWO2020230665A1 (ja) | 2020-11-19 |
JPWO2020230665A5 JPWO2020230665A5 (ja) | 2022-02-10 |
Family
ID=73290170
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2021519379A Pending JPWO2020230665A1 (ja) | 2019-05-13 | 2020-05-01 |
Country Status (3)
Country | Link |
---|---|
US (2) | US11881273B2 (ja) |
JP (1) | JPWO2020230665A1 (ja) |
WO (1) | WO2020230665A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2023157724A1 (ja) * | 2022-02-16 | 2023-08-24 | 株式会社ソシオネクスト | 半導体記憶装置 |
WO2024018875A1 (ja) * | 2022-07-21 | 2024-01-25 | 株式会社ソシオネクスト | 半導体記憶装置 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8654592B2 (en) * | 2007-06-12 | 2014-02-18 | Micron Technology, Inc. | Memory devices with isolation structures |
JP4907563B2 (ja) * | 2008-01-16 | 2012-03-28 | パナソニック株式会社 | 半導体記憶装置 |
US7715246B1 (en) * | 2008-06-27 | 2010-05-11 | Juhan Kim | Mask ROM with light bit line architecture |
JP5073014B2 (ja) * | 2010-06-11 | 2012-11-14 | 株式会社東芝 | 半導体装置およびその製造方法 |
US9400862B2 (en) * | 2014-06-23 | 2016-07-26 | Synopsys, Inc. | Cells having transistors and interconnects including nanowires or 2D material strips |
KR20180061478A (ko) * | 2016-11-28 | 2018-06-08 | 삼성전자주식회사 | 반도체 소자 |
-
2020
- 2020-05-01 WO PCT/JP2020/018392 patent/WO2020230665A1/ja active Application Filing
- 2020-05-01 JP JP2021519379A patent/JPWO2020230665A1/ja active Pending
-
2021
- 2021-11-11 US US17/524,535 patent/US11881273B2/en active Active
-
2023
- 2023-12-13 US US18/538,722 patent/US20240112746A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
US20220130478A1 (en) | 2022-04-28 |
US11881273B2 (en) | 2024-01-23 |
WO2020230665A1 (ja) | 2020-11-19 |
US20240112746A1 (en) | 2024-04-04 |
Similar Documents
Legal Events
Date | Code | Title | Description |
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A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20211014 |
|
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A131 | Notification of reasons for refusal |
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A521 | Request for written amendment filed |
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