JPWO2017187998A1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JPWO2017187998A1 JPWO2017187998A1 JP2018514257A JP2018514257A JPWO2017187998A1 JP WO2017187998 A1 JPWO2017187998 A1 JP WO2017187998A1 JP 2018514257 A JP2018514257 A JP 2018514257A JP 2018514257 A JP2018514257 A JP 2018514257A JP WO2017187998 A1 JPWO2017187998 A1 JP WO2017187998A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 193
- 229910052751 metal Inorganic materials 0.000 claims abstract description 419
- 239000002184 metal Substances 0.000 claims abstract description 418
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 33
- 239000010949 copper Substances 0.000 claims description 32
- 229910052802 copper Inorganic materials 0.000 claims description 31
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 28
- 229910052709 silver Inorganic materials 0.000 claims description 23
- 239000004332 silver Substances 0.000 claims description 23
- 239000002923 metal particle Substances 0.000 claims description 19
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 17
- 239000010953 base metal Substances 0.000 claims description 15
- 229910000510 noble metal Inorganic materials 0.000 claims description 13
- 239000010931 gold Substances 0.000 claims description 12
- 229910052737 gold Inorganic materials 0.000 claims description 11
- 239000002082 metal nanoparticle Substances 0.000 claims description 8
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- 229910045601 alloy Inorganic materials 0.000 claims description 7
- 239000000956 alloy Substances 0.000 claims description 7
- 239000011135 tin Substances 0.000 claims description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 6
- 229910052718 tin Inorganic materials 0.000 claims description 6
- 239000010410 layer Substances 0.000 description 99
- 239000007769 metal material Substances 0.000 description 36
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- 238000005304 joining Methods 0.000 description 20
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- 229920005989 resin Polymers 0.000 description 17
- 239000011347 resin Substances 0.000 description 17
- 238000000034 method Methods 0.000 description 14
- 238000001465 metallisation Methods 0.000 description 13
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
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- 229910000881 Cu alloy Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000009429 electrical wiring Methods 0.000 description 2
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- 125000006850 spacer group Chemical group 0.000 description 2
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- 239000004593 Epoxy Substances 0.000 description 1
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- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000001174 ascending effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001768 cations Chemical class 0.000 description 1
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- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
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Abstract
Description
まず、本発明の実施の形態1における半導体装置の構成を説明する。図1は、本発明の実施の形態1における半導体装置を示す断面図である。
図7は、本発明の実施の形態2における半導体装置を示す断面図である。図7において、図1と同じ符号を付けたものは、同一または対応する構成を示しており、その説明を省略する。本発明の実施の形態1とは、半導体素子がリードフレーム上ではなく、絶縁基板の回路パターン上に接合された構成が相違している。
図8は、本発明の実施の形態3における半導体装置を示す断面図である。図8において、図1および図7と同じ符号を付けたものは、同一または対応する構成を示しており、その説明を省略する。本発明の実施の形態1および2とは、絶縁基板上の回路パターンと配線部材であるリード端子とを導電性接合層で接合した構成が相違している。
図11は、本発明の実施の形態4における半導体装置を示す断面図である。図11において、図1と同じ符号を付けたものは、同一または対応する構成を示しており、その説明を省略する。本発明の実施の形態1とは、IGBT2およびFWD3をアルミワイヤの代わりに外部端子が設けられたリードフレームに導電性接合層で接合した構成が相違している。
図13は、本発明の実施の形態5における半導体装置を示す断面図である。図13において、図7と同じ符号を付けたものは、同一または対応する構成を示しており、その説明を省略する。本発明の実施の形態2とは、絶縁基板上に接合したIGBT2、FWD3、およびケース端子16d、16eを、金属ワイヤの代わりに回路パターンが形成された配線基板を用いて導電性接合層で接合した構成が相違している。
2 IGBT
3 FWD
8a、8b 半導体素子
9a、9b、9c、9d、9e、9f 導電性接合層
13 絶縁基板、13a 回路パターン、13b 絶縁層、13c 金属ベース板
16d、16e ケース端子
17f、17g リード端子
20 酸化膜
21a、21b、21c、21d、21e、21f、21g、21i、21j 第1の端部
22a、22b、22c、22d、22e、22f、22g、22i、22j 金属線
23a、23b、23c、23d、23e、23f、23g、23i、23j 第2の端部
24 電極(第2の金属部材)
25 第1の金属部材
29g、29h、29i、29j 接合部
35 配線基板、35a 回路パターン、35b 基材部、35c スルーホール
37 ピン端子
Claims (17)
- 第1の金属部材と、
前記第1の金属部材と電気的に接続される第2の金属部材と、
前記第1の金属部材と前記第2の金属部材との間に設けられ、前記第1の金属部材と前記第2の金属部材とに接合された導電性接合層と、
前記第1の金属部材に接合された第1の端部および前記導電性接合層内に設けられた胴体部を有し、前記胴体部が前記第1の金属部材の表面に沿って延伸した金属線と、
を備えた半導体装置。 - 前記金属線の前記胴体部が、前記第2の金属部材と接触している請求項1に記載の半導体装置。
- 前記金属線は、第2の端部をさらに有し、
前記第2の端部が、前記第1の金属部材に接合された請求項1または2に記載の半導体装置。 - 前記金属線は、前記第1の端部と前記第2の端部との間に設けられた接合部を有し、前記接合部が前記第1の金属部材に接合された請求項3に記載の半導体装置。
- 前記金属線を複数有し、
前記複数の金属線が放射状に設けられた請求項1から4のいずれか1項に記載の半導体装置。 - 前記金属線の第1の端部の断面積は、前記金属線の胴体部の断面積よりも大きい請求項1から5のいずれか1項に記載の半導体装置。
- 前記第1の金属部材は、卑金属または卑金属を含有する金属である請求項1から6のいずれか1項に記載の半導体装置。
- 前記卑金属は、アルミニウム、銅、ニッケル、錫のいずれかである請求項7に記載の電力用半導体装置。
- 前記金属線の前記胴体部の表面は、貴金属または貴金属を含有する合金である請求項1から8のいずれか1項に記載の半導体装置。
- 前記貴金属は、金、銀のいずれかである請求項9に記載の半導体装置。
- 前記導電性接合層は、金属粒子を含有する導電性接着剤である請求項1から10のいずれか1項に記載の半導体装置。
- 前記導電性接着剤は、前記金属粒子と金属結合した金属ナノ粒子を含有する請求項11に記載の半導体装置。
- 電極を有する半導体素子と、
前記半導体素子の電極と電気的に接続されたリードフレームと、
を備えた半導体装置であって、
前記半導体素子の電極または前記リードフレームのいずれか一方が前記第1の金属部材であり、前記半導体素子の電極または前記リードフレームの他方が前記第2の金属部材である請求項1から12のいずれか1項に記載の半導体装置。 - 半導体素子が接合された基板に設けられた回路パターンと、
前記回路パターンに電気的に接続されたリード端子と、
を備えた半導体装置であって、
前記回路パターンまたは前記リード端子のいずれか一方が前記第1の金属部材であり、前記回路パターンまたは前記リード端子の他方が前記第2の金属部材である請求項1から12のいずれか1項に記載の半導体装置。 - 電極を有する半導体素子と、
前記半導体素子が接合された基板に設けられ、前記半導体素子の電極と電気的に接続された回路パターンと、
を備えた半導体装置であって、
前記半導体素子の電極または前記回路パターンのいずれか一方が前記第1の金属部材であり、前記半導体素子の電極または前記回路パターンの他方が前記第2の金属部材である請求項1から12のいずれか1項に記載の半導体装置。 - 第1の電極および前記第1の電極の裏側に第2の電極を有する半導体素子と、
前記半導体素子が接合された第1の基板に設けられ、前記半導体素子の前記第1の電極と電気的に接続された第1の回路パターンと、
前記半導体素子が接合された第2の基板に設けられ、前記半導体素子の前記第2の電極と電気的に接続された第2の回路パターンと、
を備えた半導体装置であって、
前記半導体素子の前記第2の電極または前記第2の回路パターンのいずれか一方が前記第1の金属部材であり、前記半導体素子の前記第2の電極または前記第2の回路パターンの他方が前記第2の金属部材である請求項1から12のいずれか1項に記載の半導体装置。 - 前記第2の基板はスルーホールを有し、
前記第2の回路パターンが前記スルーホールに挿入されたピン端子を介して前記第1の回路パターンに電気的に接続された請求項16に記載の半導体装置。
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