JPWO2016052525A1 - エレクトレット素子及びその製造方法、センサー、電子回路並びに入力装置 - Google Patents
エレクトレット素子及びその製造方法、センサー、電子回路並びに入力装置 Download PDFInfo
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Abstract
Description
本実施の形態について図を参照して以下説明する。図1は、本実施の形態のエレクトレット素子の概念図であり、上段は断面図であり、下段は断面図に対応する平面図である。本素子は、一対の電極2と、一対の電極2で挟まれた半導体3と、半導体3に対してギャップを介した位置に半導体表面に対向するように設置されたエレクトレット部材5を備える基本構造を有する。本実施の形態では、図面上段の下側の基材1に電極対2と半導体3が装着され、ギャップを設けるための構造として、少なくとも半導体の周辺であり、電極対2の周囲の外側に、バンク構造体4を設けている。バンク構造体4は、エレクトレット部材5の外周を支持するように、一部又は全部に設けている。半導体が形成された基材と対向するように、かつギャップを無加圧時には恒常的に維持するように、バンク構造体4によって、エレクトレット部材5と導体薄膜6と基材1が設けられている。なお、基材1は、図面下側と図面上側とは別個に構成される。導体薄膜6は環境や周辺電子機器から発生する電磁波等のノイズを除去するために設けたものである。
本実施の形態について図を参照して以下説明する。本実施の形態では、第1の実施の形態で説明したエレクトレット素子を複数個設けて、エレクトレット部材に加えられた圧力もしくは振動のオンオフや大きさを1対の電極間に流れる電流により検知し、検知した位置を検出する。本実施の形態の装置はタッチパネル等の電子デバイスに用いる入力装置に適する。図9に、本実施の形態の装置を上から見た平面図を模式的に示す。図9では、第1の方向とこれに交差(例えば直交)する第2の方向に、エレクトレット素子を複数個配置して、アレイ状に素子を整列した例である。図9の電子回路は、8×8マトリックスアレイ回路の例である。第1の方向及び第2の方向に、独立した配線が複数列設けられ、半導体の両端のうちの一方の電極は第1の方向の配線に接続され、他方の電極は第2の方向の配線に接続されている。図9では、点線で囲まれる位置にエレクトレット部材が設けられ、半導体とエレクトレット部材との間は所定の間隔のギャップが設けられている。ギャップを形成するために、配線構造の上に、適宜、バンク構造体が設けられている。電極の間にある半導体の位置に対向する上部のエレクトレット部材が、下に向かう方向に加圧されることにより、加圧された位置の半導体の電気信号を効率的に検知することができる。本入力装置では、抵抗値の変化又はオンオフが生起された半導体を検出することにより、圧力の加わった位置を検出することができる。
本実施の形態は、第1の実施の形態のエレクトレット素子におけるバンク構造体等の間隙保持部を外し、半導体とエレクトレット部材が積層構造を有するものである。本実施の形態について図を参照して以下説明する。図10は、本実施の形態のエレクトレット素子の概念図であり、上段は断面図であり、下段は断面図に対応する平面図である。
2、22、32、42、62、72 電極対
3、23、33、43、63、73 半導体
4、34、44 バンク構造体
5、25、35、45、65、75 エレクトレット部材
6、66 導体薄膜
26 導体からなる構造体
27 基材の陥没部
36 ノイズ除去部
47 絶縁層
53 N型半導体
55 プラスに帯電したエレクトレット部材
56 N型半導体53中に誘起された電子
76 半導体中に誘起された電子
77 ミクロサイズの空隙
78 ミクロサイズの空隙が消失した接触面
Claims (12)
- 一対の電極で挟まれた半導体と、該半導体に対してギャップを介した位置に対向して設置されたエレクトレット部材とを備えることを特徴とするエレクトレット素子。
- 一対の電極で挟まれた半導体と、該半導体の表面に設置されたエレクトレット部材とからなる積層構造を有することを特徴とするエレクトレット素子。
- 前記エレクトレット部材がプラスもしくはマイナスに帯電された状態を半永久的に保持することを特徴とする請求項1又は2記載のエレクトレット素子。
- 前記エレクトレット部材が前記半導体に接近又は接触又は接触状態が変化することにより、前記1対の電極間に流れる電流量を制御することを特徴とする請求項1又は2記載のエレクトレット素子。
- 前記エレクトレット部材が基材に装着されており、基材に対して圧力もしくは振動を加えることにより、前記エレクトレット部材が前記半導体に対して相対的な位置を変化しエレクトレット部材が半導体に接触もしくは接近することを特徴とする請求項1記載のエレクトレット素子。
- 前記エレクトレット部材と前記半導体とを所定間隔に保持するための間隙保持部が前記半導体の周辺の一部に配置され、前記ギャップの間隔は外部からの力により可変であることを特徴とする請求項1記載のエレクトレット素子。
- ノイズ除去のための構造を備えることを特徴とする請求項1又は2記載のエレクトレット素子。
- 一方の基材に、電極及び半導体、エレクトレット部材、間隙保持部の内の1つ以上を形成し、他方の基材に、少なくとも前記一方の基材に形成されなかったものを形成した後、2つの基材を重ね合わせることを、特徴とするエレクトレット素子の製造方法。
- 前記エレクトレット部材を帯電することを特徴とする請求項8記載のエレクトレット素子の製造方法。
- 前記1対の電極間に流れる電流量を測定することにより、前記エレクトレット部材が前記半導体に接近又は接触又は接触状態が変化することを検出することを特徴とする請求項1又は2記載のエレクトレット素子を備えるセンサー。
- 前記エレクトレット素子を少なくとも1つ以上備え、前記電極に接続する配線を備えることを特徴とする、請求項1又は2記載のエレクトレット素子を備える電子回路。
- 前記エレクトレット素子を少なくとも1つ以上備え、接触もしくは圧力または振動が加えられた位置を検出して、前記位置を入力することを特徴とする請求項1又は2記載のエレクトレット素子を備える入力装置。
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