JPWO2011024214A1 - Fast recovery diode - Google Patents
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Abstract
高濃度第１導電型半導体基板１０１上に低濃度第１導電型半導体層１０３を形成し、低濃度第１導電型半導体層１０３の表面に複数に分割された第２導電型半導体層が形成され、第２導電型半導体層が表面から深部の方向に不純物濃度が低くなるように複数層に積層される高速回復ダイオード１００において、高濃度第１導電型半導体基板１０１と低濃度第１導電型半導体層１０３との間にさらに中濃度の第１導電型半導体層１０２を形成することにより、高速回復化と共に、さらなる低順方向電圧化とソフトリカバリー化を実現することができる。A low-concentration first conductive semiconductor layer 103 is formed on the high-concentration first conductive semiconductor substrate 101, and a plurality of divided second conductive semiconductor layers are formed on the surface of the low-concentration first conductive semiconductor layer 103. The high-concentration first conductive semiconductor substrate 101 and the low-concentration first conductive semiconductor in the fast recovery diode 100 in which the second conductive semiconductor layer is stacked in a plurality of layers so that the impurity concentration decreases from the surface toward the deep part. By forming the first-conductivity-type semiconductor layer 102 having a medium concentration between the layer 103 and the layer 103, it is possible to realize a further reduction in forward voltage and soft recovery as well as a high-speed recovery.
Description
本発明は高速回復ダイオードに関するものである。 The present invention relates to a fast recovery diode.
一般的にダイオードの特性として、高速スイッチングのための逆回復の高速化や、順方向電圧の低電圧化，ソフトリカバリー化が求められている。 In general, diode characteristics are required to increase reverse recovery for high-speed switching, lower forward voltage, and soft recovery.
ここで、図４を用いて高速回復ダイオードのソフトリカバリーについて説明する。 Here, the soft recovery of the fast recovery diode will be described with reference to FIG.
図４は逆回復時間（ｔｒｒ）を示す図であり、横軸に時間Ｔ、縦軸に電流量ＩＦを示す。 FIG. 4 is a diagram showing the reverse recovery time (trr), where the horizontal axis represents time T and the vertical axis represents the current amount IF.
図４に示すように、高速回復を実現するために、単位時間当たりに回復する電流量（回復速度：ｄＩＦ／ｄＴ）を大きくすると、電流が収束するまでの電流振幅が大きくなりスパイク１が発生する場合がある（グラフ２）。そのため、逆回復時間を抑制しながら逆電流を抑制して回復する電流速度を遅くするソフトリカバリーが求められている。例えば、グラフ３において、逆電流Ｉ２をグラフ２の逆電流Ｉ１より小さくし、逆回復時間ｔｒｒを同じにすることにより回復速度を小さくすることができ、高速回復を実現しながらスパイクの発生を抑制することができる。As shown in FIG. 4, when the amount of current recovered per unit time (recovery speed: dIF / dT) is increased in order to realize high-speed recovery, the current amplitude until the current converges increases and spike 1 is generated. (Graph 2). Therefore, there is a demand for soft recovery that suppresses the reverse current while suppressing the reverse current and slows down the current speed for recovery. For example, in the graph 3, the reverse current I 2 smaller than the reverse current I 1 graph 2, the reverse recovery time trr can be reduced recovery rate by the same spikes generated while achieving fast recovery Can be suppressed.
従来からも、これらの特性を向上させるために様々な構成が提案されている。 Conventionally, various configurations have been proposed in order to improve these characteristics.
以下、図５を用いて従来の高速回復ダイオードの構成を説明する。 Hereinafter, the configuration of a conventional fast recovery diode will be described with reference to FIG.
図５は従来の高速回復ダイオードの構成を示す断面図である。 FIG. 5 is a cross-sectional view showing the configuration of a conventional fast recovery diode.
図５に示すように、高濃度Ｎ型基板であるＮ＋基板１２上に低濃度Ｎ型層であるＮ−層１１がエピタキシャル法等で形成され、Ｎ−層１１の表面に一定の間隔を隔てて複数のＰ型層１０が形成されてＰ−Ｎ接合が構成されている。さらに、Ｐ型層１０は１または複数の層に分割され、Ｎ−層１１の表面近傍からＮ＋基板１２方向に順にＰ型不純物濃度が低くなるように各層が形成されている。図５ではＰ層型１０を２層構造とし、Ｎ−層１１の表面側に高濃度のＰ＋層１３を形成し、Ｎ−層１１の深部側に低濃度のＰ−層１４を形成する構成を例示している。また、Ｎ−層１１の表面上にＰ＋層１３と接する金属のアノード電極１５が形成され、Ｎ＋基板１２のＮ−層１１形成面の反対面である裏面にＮ＋基板１２と接する金属のカソード電極１６が形成されてＰ−Ｎ接合ダイオードが形成される。このような構成により、Ｐ−Ｎ接合面の濃度勾配が小さくなるため、少数キャリアの注入が抑制されて高速回復を実現すると共に、Ｐ型層１０とアノード電極１５とのオーミック接合面での抵抗を低抵抗化することで順方向電圧の低下を実現していた（例えば、特許文献１参照）。As shown in FIG. 5, an N − layer 11, which is a low concentration N-type layer, is formed on an N + substrate 12, which is a high concentration N type substrate, by an epitaxial method or the like, and a certain interval is formed on the surface of the N − layer 11. A plurality of P-type layers 10 are formed apart from each other to form a PN junction. Further, the P-type layer 10 is divided into one or a plurality of layers, and each layer is formed so that the P-type impurity concentration decreases in order from the vicinity of the surface of the N − layer 11 toward the N + substrate 12. 5 the P-layer 10 has a two-layer structure, N - the high concentration P + layer 13 is formed on the surface side of the layer 11, N - forming a layer 14 - P deep side low concentration layer 11 The structure is illustrated. A metal anode electrode 15 in contact with the P + layer 13 is formed on the surface of the N − layer 11, and a metal in contact with the N + substrate 12 on the back surface, which is the opposite surface of the N − layer 11 formation surface, of the N + substrate 12. The cathode electrode 16 is formed to form a PN junction diode. With such a configuration, since the concentration gradient of the PN junction surface is reduced, minority carrier injection is suppressed to achieve high-speed recovery, and resistance at the ohmic junction surface between the P-type layer 10 and the anode electrode 15 is achieved. The forward voltage has been reduced by lowering the resistance (see, for example, Patent Document 1).
しかしながら、上記従来の構成では、低抵抗化により高電流帯では順方向電圧を抑制することができ、動作範囲内での最大順方向電圧を抑制することができるが、実動作電流帯となる比較的低電流な帯域では、Ｎ＋−Ｎ−領域で不純物濃度の影響が大きくなり十分な順方向電圧の低下が実現できないという問題点があった。However, in the above conventional configuration, the forward voltage can be suppressed in the high current band due to the low resistance, and the maximum forward voltage within the operating range can be suppressed. In a band with a relatively low current, the influence of the impurity concentration is large in the N + -N − region, and there is a problem that a sufficient forward voltage drop cannot be realized.
さらに、近年、ダイオードに対する高速回復によるスイッチング速度の向上と共に、低消費電力化の要求が大きくなっている。そのため、さらなる低順方向電圧化とスパイクを抑制したソフトリカバリー化が求められている。 Furthermore, in recent years, the demand for lower power consumption has increased along with the improvement of switching speed due to high-speed recovery of diodes. Therefore, further lower forward voltage and soft recovery with suppressed spikes are required.
本発明の高速回復ダイオードは、上記課題を解決するために、高速回復化と共に、さらなる低順方向電圧化とソフトリカバリー化を実現することを目的とする。 In order to solve the above-described problems, the fast recovery diode of the present invention aims to realize further lower forward voltage and soft recovery as well as faster recovery.
前記目的を達成するために、本発明の高速回復ダイオードは、第１導電型半導体基板と、前記第１導電型半導体基板上に形成される第１の第１導電型半導体層と、前記第１の第１導電型半導体層上に形成される第２の第１導電型半導体層と、前記第２の第１導電型半導体層の前記第１の第１導電型半導体層との接続面に対する反対面である表面に互いに離間して形成される複数の第２導電型半導体層とを有し、前記第２導電型半導体層が前記表面側に近い層の不純物濃度がより高くなる複数の層からなり、前記１の第１導電型半導体層の不純物濃度が前記第１導電型半導体基板の不純物濃度より小さく、前記第２の第１導電型半導体層の不純物濃度が前記１の第１導電型半導体層の不純物濃度より小さいことを特徴とする。 To achieve the above object, a fast recovery diode according to the present invention includes a first conductive semiconductor substrate, a first first conductive semiconductor layer formed on the first conductive semiconductor substrate, and the first conductive semiconductor layer. The second first conductivity type semiconductor layer formed on the first conductivity type semiconductor layer is opposite to the connection surface between the second first conductivity type semiconductor layer and the first first conductivity type semiconductor layer. A plurality of second conductivity type semiconductor layers formed on the surface that is spaced apart from each other, and the second conductivity type semiconductor layer is formed of a plurality of layers having a higher impurity concentration in a layer close to the surface side. The impurity concentration of the first first conductivity type semiconductor layer is smaller than the impurity concentration of the first conductivity type semiconductor substrate, and the impurity concentration of the second first conductivity type semiconductor layer is the first conductivity type semiconductor of the first. It is characterized by being smaller than the impurity concentration of the layer.
以上により、高速回復化と共に、さらなる低順方向電圧化とソフトリカバリー化を実現することができる。 As described above, it is possible to realize further low forward voltage and soft recovery as well as high speed recovery.
以上のように、高濃度第１導電型半導体基板上に低濃度第１導電型半導体層を形成し、低濃度第１導電型半導体層の表面に複数に分割された第２導電型半導体層が形成され、第２導電型半導体層が表面から深部の方向に不純物濃度が低くなるように複数層に積層される高速回復ダイオードにおいて、高濃度第１導電型半導体基板と低濃度第１導電型半導体層との間にさらに中濃度の第１導電型半導体層を形成することにより、高速回復化と共に、さらなる低順方向電圧化とソフトリカバリー化を実現することができる。 As described above, the low-concentration first conductive semiconductor layer is formed on the high-concentration first conductive semiconductor substrate, and the second conductive semiconductor layer divided into a plurality of portions on the surface of the low-concentration first conductive semiconductor layer is formed. In the fast recovery diode formed and stacked in a plurality of layers so that the second conductivity type semiconductor layer has a lower impurity concentration in the direction from the surface to the deep part, the high concentration first conductivity type semiconductor substrate and the low concentration first conductivity type semiconductor By forming the first-conductivity-type semiconductor layer having a medium concentration between the layers, it is possible to realize a further reduction in forward voltage and soft recovery as well as high-speed recovery.
本発明は、高濃度第１導電型半導体基板上に低濃度第１導電型半導体層を形成し、低濃度第１導電型半導体層の表面に互いに離間して複数に分割された第２導電型半導体層を形成し、第２導電型半導体層が表面から深部の方向に不純物濃度が低くなるように１または複数層に積層される高速回復ダイオードにおいて、高濃度第１導電型半導体基板と低濃度第１導電型半導体層との間にさらに中濃度の第１導電型半導体層を形成することを特徴とする。ここで、中濃度の第１導電型半導体層の不純物濃度は、高濃度第１導電型半導体基板の不純物濃度と低濃度第１導電型半導体層の不純物濃度との間の不純物濃度とする。 According to the present invention, a low-concentration first conductive semiconductor layer is formed on a high-concentration first conductive semiconductor substrate, and the second conductive type is divided into a plurality of portions separated from each other on the surface of the low-concentration first conductive semiconductor layer. In a fast recovery diode in which a semiconductor layer is formed and the second conductivity type semiconductor layer is stacked in one or more layers so that the impurity concentration decreases from the surface toward the deep portion, the high concentration first conductivity type semiconductor substrate and the low concentration An intermediate-concentration first conductive semiconductor layer is further formed between the first conductive semiconductor layer and the first conductive semiconductor layer. Here, the impurity concentration of the medium-concentration first conductive semiconductor layer is an impurity concentration between the impurity concentration of the high-concentration first conductive semiconductor substrate and the impurity concentration of the low-concentration first conductive semiconductor layer.
このように、Ｐ−Ｎ接合部分の濃度勾配を小さくして少数キャリアの注入を抑制することにより高速回復を実現しながら、中濃度の第１導電型半導体層を設けることにより、空乏層が狭くなり、ソフトリカバリー化のために十分な電荷を供給することができる。同時に、中濃度の第１導電型半導体層を設けることにより、実動作電流帯となる比較的低電流な帯域でも、十分な電荷が供給できるため、Ｐ−Ｎ接合部分でのキャリアの再結合が進み順方向電圧を低下させることができる。 Thus, the depletion layer is narrowed by providing the medium-concentration first conductivity type semiconductor layer while realizing high-speed recovery by reducing the concentration gradient of the PN junction portion and suppressing minority carrier injection. Thus, a sufficient charge for soft recovery can be supplied. At the same time, by providing the first-conductivity-type semiconductor layer having a medium concentration, sufficient charges can be supplied even in a relatively low current band, which is an actual operating current band, so that recombination of carriers at the PN junction portion can be achieved. The forward voltage can be reduced.
以下、具体的な実施の形態について、図１〜図４を参照しながら説明する。 Hereinafter, specific embodiments will be described with reference to FIGS.
図１は本発明の高速回復ダイオードの構成を示す断面図である。 FIG. 1 is a cross-sectional view showing the configuration of the fast recovery diode of the present invention.
図１に示すように、本発明の高速回復ダイオード１００は、Ｎ＋基板１０１上にＮ型層１０２を介してＮ−層１０３が形成され、Ｎ−層１０３の表面に複数のＰ−層１０４が離間して形成されている。また、各Ｐ−層１０４の表面にＰ＋層１０５が形成され、Ｎ−層１０３の表面上のＰ型層に表面側が高濃度となる濃度勾配を持たせている。そして、Ｎ−層１０３とＰ−層１０４の間にＰＮ接合構造を形成している。また、１０６はカソード電極であり、Ｎ型層１０２が形成されたＮ＋基板表面に対する裏面に形成されている。同様に、Ｐ＋層１０５に接して、Ｎ−層１０３表面にアノード電極１０７が設けられている。例えば、Ｎ＋基板１０１は１〜３Ｅ１９／ｃｍ３の高濃度のＮ型不純物が添加され、Ｎ型層１０２は１〜３Ｅ１８／ｃｍ３の中濃度のＮ型不純物が添加され、Ｎ−層１０３は１〜３Ｅ１４／ｃｍ３の低濃度のＮ型不純物が添加される。また、Ｐ−層１０４のＰ型不純物添加量は１〜３Ｅ１３／ｃｍ３であり、Ｐ＋層１０５のＰ型不純物添加量は１〜３Ｅ１９／ｃｍ３である。As shown in FIG. 1, in the fast recovery diode 100 of the present invention, an N − layer 103 is formed on an N + substrate 101 via an N-type layer 102, and a plurality of P − layers 104 are formed on the surface of the N − layer 103. Are formed apart from each other. Further, a P + layer 105 is formed on the surface of each P − layer 104, and the P-type layer on the surface of the N − layer 103 has a concentration gradient in which the surface side has a high concentration. A PN junction structure is formed between the N − layer 103 and the P − layer 104. Reference numeral 106 denotes a cathode electrode, which is formed on the back surface of the N + substrate surface on which the N-type layer 102 is formed. Similarly, an anode electrode 107 is provided on the surface of the N − layer 103 in contact with the P + layer 105. For example, N + substrate 101 is doped with a high concentration N-type impurity 1~3E19 / cm 3, N-type layer 102 is added N-type impurity concentration in the 1~3E18 / cm 3, N - layer 103 Is added with a low concentration N-type impurity of 1 to 3E14 / cm 3 . Also, the P-type impurity addition amount of the P − layer 104 is 1 to 3E13 / cm 3 , and the P type impurity addition amount of the P + layer 105 is 1 to 3E19 / cm 3 .
このような構成のダイオードにおいて、Ｐ型層を２以上の複数層で構成し、表面から順に不純物濃度を低下させることにより、Ｐ−Ｎ接合部分の濃度勾配を小さくして少数キャリアの注入を抑制することにより高速回復を実現している。さらに、本発明の高速回復ダイオードでは、高不純物濃度のＮ＋基板１０１と低不純物濃度のＮ−層１０３との間に、その間の不純物濃度となるＮ型層１０２を設けることにより、空乏層の領域が狭くなりソフトリカバリー化を実現するために十分な電荷を供給することができる。また、Ｎ型層１０２を設けることにより、実動作電流帯となる比較的低電流な帯域でも、十分な電荷を供給することができ、Ｐ−Ｎ接合部分でのキャリアの再結合が進み電流密度が増加して順方向電圧を低下させることができる。In the diode having such a configuration, the P-type layer is composed of two or more layers, and the impurity concentration is decreased in order from the surface, thereby reducing the concentration gradient of the PN junction and suppressing the injection of minority carriers. To achieve high-speed recovery. Moreover, the fast recovery diode according to the present invention, the N + substrate 101 of high impurity concentration low impurity concentration the N - between the
以下、図２〜図４を用いて、本発明の高速回復ダイオードの特性を説明する。 Hereinafter, the characteristics of the fast recovery diode of the present invention will be described with reference to FIGS.
図２は濃度プロファイルを示す図、図３は電流量に対する順方向電圧の関係を示す図である。 FIG. 2 is a diagram showing a concentration profile, and FIG. 3 is a diagram showing a relationship of a forward voltage with respect to a current amount.
図２は図１，図５のＡ−Ａ’におけるＰＮ接合部の濃度プロファイルを示しており、図２（ａ）は本発明の高速回復ダイオードの濃度プロファイルを、図２（ｂ）は従来の高速回復ダイオードの濃度プロファイルを示す。図２において、横軸に示した断面上の位置に対するキャリア濃度Ｃを縦軸に示している。 FIG. 2 shows the concentration profile of the PN junction at AA ′ in FIGS. 1 and 5, FIG. 2 (a) shows the concentration profile of the fast recovery diode of the present invention, and FIG. 2 (b) shows the conventional concentration profile. The concentration profile of a fast recovery diode is shown. In FIG. 2, the vertical axis indicates the carrier concentration C with respect to the position on the cross section indicated on the horizontal axis.
高速回復ダイオードにおいては、ＰＮ接合のドリフト領域での不純物添加領域の形状と不純物の濃度分布によってダイオードの逆回復特性が決定される。図２（ｂ）に示すような従来の高速回復ダイオードにおけるＰＮ接合部からＮ−層１０３にわたるキャリア濃度プロファイルに比べて、図２（ａ）に示すように本発明の高速回復ダイオードでは、Ｎ型層１０２からＮ−層１０３にかけてキャリア濃度が徐々に低下している。このように、本発明の高速回復ダイオードでは、Ｎ＋基板１０１上にＮ型層１０２を接続し、キャリア濃度に勾配を持たせることで空乏層が広がる領域を減少することができ、ソフトリカバリー化実現のため十分な電荷を供給させることができる。ここで、Ｎ型層１０２の不純物添加量は空乏層がＮ型層１０２−Ｎ＋基板１０１接続領域まで広がらないような不純物添加量にする必要がある。In the fast recovery diode, the reverse recovery characteristic of the diode is determined by the shape of the impurity added region and the impurity concentration distribution in the drift region of the PN junction. Compared to the carrier concentration profile from the PN junction to the N − layer 103 in the conventional fast recovery diode as shown in FIG. 2B, the fast recovery diode of the present invention has an N-type as shown in FIG. The carrier concentration gradually decreases from the layer 102 to the N − layer 103. Thus, in the fast recovery diode of the present invention, the region where the depletion layer spreads can be reduced by connecting the N-type layer 102 on the N + substrate 101 and providing a gradient in the carrier concentration, thereby realizing soft recovery. A sufficient charge can be supplied for realization. Here, the impurity addition amount of the N-type layer 102 needs to be such an impurity addition amount that the depletion layer does not extend to the connection region of the N-type layer 102 -N + substrate 101.
また、ｐ−ｎ接合型ダイオードの順方向Ｉ−Ｖ特性は図３に示すように理想領域、実動作領域である高注入領域と、直列抵抗（ＲＳ）領域に分割でき、従来の高速回復ダイオードでは高注入領域の順方向電圧を低減することができなかった。本発明では、Ｎ＋基板１０１上にＮ型層１０２を接続することで、実動作電流帯となる比較的低電流な帯域でも、十分な電荷を蓄積することができるため、電流密度が増加して順方向電圧を低下させることができる。Further, the forward IV characteristics of the pn junction diode can be divided into an ideal region, a high injection region which is an actual operation region, and a series resistance (RS) region as shown in FIG. However, the forward voltage in the high implantation region could not be reduced. In the present invention, by connecting the N-type layer 102 on the N + substrate 101, sufficient electric charge can be accumulated even in a relatively low current band that is an actual operating current band, so that the current density increases. Thus, the forward voltage can be reduced.
以上のように、Ｎ＋基板１０１とＮ−層１０３との間にＮ型層１０２を設けることで、高速回復を維持しながら、ソフトリーリカバーとあらゆる帯域での順方向電圧の低下を実現でき、高速回復ダイオードの低消費電力化を実現することができる。As described above, by providing the N-type layer 102 between the N + substrate 101 and the N − layer 103, it is possible to realize soft recovery and reduction of the forward voltage in all bands while maintaining high-speed recovery. Thus, low power consumption of the fast recovery diode can be realized.
本発明は、高速回復化と共に、さらなる低順方向電圧化とソフトリカバリー化を実現することができる高速回復ダイオード等に有用である。 INDUSTRIAL APPLICABILITY The present invention is useful for a high-speed recovery diode or the like that can realize further lower forward voltage and soft recovery along with high-speed recovery.
本発明は高速回復ダイオードに関するものである。 The present invention relates to a fast recovery diode.
一般的にダイオードの特性として、高速スイッチングのための逆回復の高速化や、順方向電圧の低電圧化，ソフトリカバリー化が求められている。 In general, diode characteristics are required to increase reverse recovery for high-speed switching, lower forward voltage, and soft recovery.
ここで、図４を用いて高速回復ダイオードのソフトリカバリーについて説明する。 Here, the soft recovery of the fast recovery diode will be described with reference to FIG.
図４は逆回復時間（ｔｒｒ）を示す図であり、横軸に時間Ｔ、縦軸に電流量ＩＦを示す。 FIG. 4 is a diagram showing the reverse recovery time (trr), where the horizontal axis represents time T and the vertical axis represents the current amount IF.
図４に示すように、高速回復を実現するために、単位時間当たりに回復する電流量（回復速度：ｄＩＦ／ｄＴ）を大きくすると、電流が収束するまでの電流振幅が大きくなりスパイク１が発生する場合がある（グラフ２）。そのため、逆回復時間を抑制しながら逆電流を抑制して回復する電流速度を遅くするソフトリカバリーが求められている。例えば、グラフ３において、逆電流Ｉ２をグラフ２の逆電流Ｉ１より小さくし、逆回復時間ｔｒｒを同じにすることにより回復速度を小さくすることができ、高速回復を実現しながらスパイクの発生を抑制することができる。 As shown in FIG. 4, when the amount of current recovered per unit time (recovery speed: dIF / dT) is increased in order to realize high-speed recovery, the current amplitude until the current converges increases and spike 1 is generated. (Graph 2). Therefore, there is a demand for soft recovery that suppresses the reverse current while suppressing the reverse current and slows down the current speed for recovery. For example, in the graph 3, the reverse current I 2 smaller than the reverse current I 1 graph 2, the reverse recovery time trr can be reduced recovery rate by the same spikes generated while achieving fast recovery Can be suppressed.
従来からも、これらの特性を向上させるために様々な構成が提案されている。 Conventionally, various configurations have been proposed in order to improve these characteristics.
以下、図５を用いて従来の高速回復ダイオードの構成を説明する。 Hereinafter, the configuration of a conventional fast recovery diode will be described with reference to FIG.
図５は従来の高速回復ダイオードの構成を示す断面図である。 FIG. 5 is a cross-sectional view showing the configuration of a conventional fast recovery diode.
図５に示すように、高濃度Ｎ型基板であるＮ＋基板１２上に低濃度Ｎ型層であるＮ−層１１がエピタキシャル法等で形成され、Ｎ−層１１の表面に一定の間隔を隔てて複数のＰ型層１０が形成されてＰ−Ｎ接合が構成されている。さらに、Ｐ型層１０は１または複数の層に分割され、Ｎ−層１１の表面近傍からＮ＋基板１２方向に順にＰ型不純物濃度が低くなるように各層が形成されている。図５ではＰ層型１０を２層構造とし、Ｎ−層１１の表面側に高濃度のＰ＋層１３を形成し、Ｎ−層１１の深部側に低濃度のＰ−層１４を形成する構成を例示している。また、Ｎ−層１１の表面上にＰ＋層１３と接する金属のアノード電極１５が形成され、Ｎ＋基板１２のＮ−層１１形成面の反対面である裏面にＮ＋基板１２と接する金属のカソード電極１６が形成されてＰ−Ｎ接合ダイオードが形成される。このような構成により、Ｐ−Ｎ接合面の濃度勾配が小さくなるため、少数キャリアの注入が抑制されて高速回復を実現すると共に、Ｐ型層１０とアノード電極１５とのオーミック接合面での抵抗を低抵抗化することで順方向電圧の低下を実現していた（例えば、特許文献１参照）。 As shown in FIG. 5, an N − layer 11, which is a low concentration N-type layer, is formed on an N + substrate 12, which is a high concentration N type substrate, by an epitaxial method or the like, and a certain interval is formed on the surface of the N − layer 11. A plurality of P-type layers 10 are formed apart from each other to form a PN junction. Further, the P-type layer 10 is divided into one or a plurality of layers, and each layer is formed so that the P-type impurity concentration decreases in order from the vicinity of the surface of the N − layer 11 toward the N + substrate 12. 5 the P-layer 10 has a two-layer structure, N - the high concentration P + layer 13 is formed on the surface side of the layer 11, N - forming a layer 14 - P deep side low concentration layer 11 The structure is illustrated. A metal anode electrode 15 in contact with the P + layer 13 is formed on the surface of the N − layer 11, and a metal in contact with the N + substrate 12 on the back surface, which is the opposite surface of the N − layer 11 formation surface, of the N + substrate 12. The cathode electrode 16 is formed to form a PN junction diode. With such a configuration, since the concentration gradient of the PN junction surface is reduced, minority carrier injection is suppressed to achieve high-speed recovery, and resistance at the ohmic junction surface between the P-type layer 10 and the anode electrode 15 is achieved. The forward voltage has been reduced by lowering the resistance (see, for example, Patent Document 1).
しかしながら、上記従来の構成では、低抵抗化により高電流帯では順方向電圧を抑制することができ、動作範囲内での最大順方向電圧を抑制することができるが、実動作電流帯となる比較的低電流な帯域では、Ｎ＋−Ｎ−領域で不純物濃度の影響が大きくなり十分な順方向電圧の低下が実現できないという問題点があった。 However, in the above conventional configuration, the forward voltage can be suppressed in the high current band due to the low resistance, and the maximum forward voltage within the operating range can be suppressed. In a band with a relatively low current, the influence of the impurity concentration is large in the N + -N − region, and there is a problem that a sufficient forward voltage drop cannot be realized.
さらに、近年、ダイオードに対する高速回復によるスイッチング速度の向上と共に、低消費電力化の要求が大きくなっている。そのため、さらなる低順方向電圧化とスパイクを抑制したソフトリカバリー化が求められている。 Furthermore, in recent years, the demand for lower power consumption has increased along with the improvement of switching speed due to high-speed recovery of diodes. Therefore, further lower forward voltage and soft recovery with suppressed spikes are required.
本発明の高速回復ダイオードは、上記課題を解決するために、高速回復化と共に、さらなる低順方向電圧化とソフトリカバリー化を実現することを目的とする。 In order to solve the above-described problems, the fast recovery diode of the present invention aims to realize further lower forward voltage and soft recovery as well as faster recovery.
前記目的を達成するために、本発明の高速回復ダイオードは、第１導電型半導体基板と、前記第１導電型半導体基板上に形成される第１の第１導電型半導体層と、前記第１の第１導電型半導体層上に形成される第２の第１導電型半導体層と、前記第２の第１導電型半導体層の前記第１の第１導電型半導体層との接続面に対する反対面である表面に互いに離間して形成される複数の第２導電型半導体層とを有し、前記第２導電型半導体層が前記表面側に近い層の不純物濃度がより高くなる複数の層からなり、前記第１の第１導電型半導体層の不純物濃度が前記第１導電型半導体基板の不純物濃度より小さく、前記第２の第１導電型半導体層の不純物濃度が前記第１の第１導電型半導体層の不純物濃度より小さいことを特徴とする。 To achieve the above object, a fast recovery diode according to the present invention includes a first conductive semiconductor substrate, a first first conductive semiconductor layer formed on the first conductive semiconductor substrate, and the first conductive semiconductor layer. The second first conductivity type semiconductor layer formed on the first conductivity type semiconductor layer is opposite to the connection surface between the second first conductivity type semiconductor layer and the first first conductivity type semiconductor layer. A plurality of second conductivity type semiconductor layers formed on the surface that is spaced apart from each other, and the second conductivity type semiconductor layer is formed of a plurality of layers having a higher impurity concentration in a layer close to the surface side. Thus, the impurity concentration of the first first conductivity type semiconductor layer is lower than the impurity concentration of the first conductivity type semiconductor substrate, and the impurity concentration of the second first conductivity type semiconductor layer is the first first conductivity type. It is characterized by being smaller than the impurity concentration of the type semiconductor layer.
以上により、高速回復化と共に、さらなる低順方向電圧化とソフトリカバリー化を実現することができる。 As described above, it is possible to realize further low forward voltage and soft recovery as well as high speed recovery.
以上のように、高濃度第１導電型半導体基板上に低濃度第１導電型半導体層を形成し、低濃度第１導電型半導体層の表面に複数に分割された第２導電型半導体層が形成され、第２導電型半導体層が表面から深部の方向に不純物濃度が低くなるように複数層に積層される高速回復ダイオードにおいて、高濃度第１導電型半導体基板と低濃度第１導電型半導体層との間にさらに中濃度の第１導電型半導体層を形成することにより、高速回復化と共に、さらなる低順方向電圧化とソフトリカバリー化を実現することができる。 As described above, the low-concentration first conductive semiconductor layer is formed on the high-concentration first conductive semiconductor substrate, and the second conductive semiconductor layer divided into a plurality of portions on the surface of the low-concentration first conductive semiconductor layer is formed. In the fast recovery diode formed and stacked in a plurality of layers so that the second conductivity type semiconductor layer has a lower impurity concentration in the direction from the surface to the deep part, the high concentration first conductivity type semiconductor substrate and the low concentration first conductivity type semiconductor By forming the first-conductivity-type semiconductor layer having a medium concentration between the layers, it is possible to realize a further reduction in forward voltage and soft recovery as well as high-speed recovery.
本発明は、高濃度第１導電型半導体基板上に低濃度第１導電型半導体層を形成し、低濃度第１導電型半導体層の表面に互いに離間して複数に分割された第２導電型半導体層を形成し、第２導電型半導体層が表面から深部の方向に不純物濃度が低くなるように１または複数層に積層される高速回復ダイオードにおいて、高濃度第１導電型半導体基板と低濃度第１導電型半導体層との間にさらに中濃度の第１導電型半導体層を形成することを特徴とする。ここで、中濃度の第１導電型半導体層の不純物濃度は、高濃度第１導電型半導体基板の不純物濃度と低濃度第１導電型半導体層の不純物濃度との間の不純物濃度とする。 According to the present invention, a low-concentration first conductive semiconductor layer is formed on a high-concentration first conductive semiconductor substrate, and the second conductive type is divided into a plurality of portions separated from each other on the surface of the low-concentration first conductive semiconductor layer. In a fast recovery diode in which a semiconductor layer is formed and the second conductivity type semiconductor layer is stacked in one or more layers so that the impurity concentration decreases from the surface toward the deep portion, the high concentration first conductivity type semiconductor substrate and the low concentration An intermediate-concentration first conductive semiconductor layer is further formed between the first conductive semiconductor layer and the first conductive semiconductor layer. Here, the impurity concentration of the medium-concentration first conductive semiconductor layer is an impurity concentration between the impurity concentration of the high-concentration first conductive semiconductor substrate and the impurity concentration of the low-concentration first conductive semiconductor layer.
このように、Ｐ−Ｎ接合部分の濃度勾配を小さくして少数キャリアの注入を抑制することにより高速回復を実現しながら、中濃度の第１導電型半導体層を設けることにより、空乏層が狭くなり、ソフトリカバリー化のために十分な電荷を供給することができる。同時に、中濃度の第１導電型半導体層を設けることにより、実動作電流帯となる比較的低電流な帯域でも、十分な電荷が供給できるため、Ｐ−Ｎ接合部分でのキャリアの再結合が進み順方向電圧を低下させることができる。 Thus, the depletion layer is narrowed by providing the medium-concentration first conductivity type semiconductor layer while realizing high-speed recovery by reducing the concentration gradient of the PN junction portion and suppressing minority carrier injection. Thus, a sufficient charge for soft recovery can be supplied. At the same time, by providing the first-conductivity-type semiconductor layer having a medium concentration, sufficient charges can be supplied even in a relatively low current band, which is an actual operating current band, so that recombination of carriers at the PN junction portion can be achieved. The forward voltage can be reduced.
以下、具体的な実施の形態について、図１〜図３を参照しながら説明する。 Hereinafter, specific embodiments will be described with reference to FIGS.
図１は本発明の高速回復ダイオードの構成を示す断面図である。 FIG. 1 is a cross-sectional view showing the configuration of the fast recovery diode of the present invention.
図１に示すように、本発明の高速回復ダイオード１００は、Ｎ＋基板１０１上にＮ型層１０２を介してＮ−層１０３が形成され、Ｎ−層１０３の表面に複数のＰ−層１０４が離間して形成されている。また、各Ｐ−層１０４の表面にＰ＋層１０５が形成され、Ｎ−層１０３の表面上のＰ型層に表面側が高濃度となる濃度勾配を持たせている。そして、Ｎ−層１０３とＰ−層１０４の間にＰＮ接合構造を形成している。また、１０６はカソード電極であり、Ｎ型層１０２が形成されたＮ＋基板表面に対する裏面に形成されている。同様に、Ｐ＋層１０５に接して、Ｎ−層１０３表面にアノード電極１０７が設けられている。例えば、Ｎ＋基板１０１は１〜３Ｅ１９／ｃｍ３の高濃度のＮ型不純物が添加され、Ｎ型層１０２は１〜３Ｅ１８／ｃｍ３の中濃度のＮ型不純物が添加され、Ｎ−層１０３は１〜３Ｅ１４／ｃｍ３の低濃度のＮ型不純物が添加される。また、Ｐ−層１０４のＰ型不純物添加量は１〜３Ｅ１３／ｃｍ３であり、Ｐ＋層１０５のＰ型不純物添加量は１〜３Ｅ１９／ｃｍ３である。 As shown in FIG. 1, in the fast recovery diode 100 of the present invention, an N − layer 103 is formed on an N + substrate 101 via an N-type layer 102, and a plurality of P − layers 104 are formed on the surface of the N − layer 103. Are formed apart from each other. Further, a P + layer 105 is formed on the surface of each P − layer 104, and the P-type layer on the surface of the N − layer 103 has a concentration gradient in which the surface side has a high concentration. A PN junction structure is formed between the N − layer 103 and the P − layer 104. Reference numeral 106 denotes a cathode electrode, which is formed on the back surface of the N + substrate surface on which the N-type layer 102 is formed. Similarly, an anode electrode 107 is provided on the surface of the N − layer 103 in contact with the P + layer 105. For example, N + substrate 101 is doped with a high concentration N-type impurity 1~3E19 / cm 3, N-type layer 102 is added N-type impurity concentration in the 1~3E18 / cm 3, N - layer 103 Is added with a low concentration N-type impurity of 1 to 3E14 / cm 3 . Also, the P-type impurity addition amount of the P − layer 104 is 1 to 3E13 / cm 3 , and the P type impurity addition amount of the P + layer 105 is 1 to 3E19 / cm 3 .
このような構成のダイオードにおいて、Ｐ型層を２以上の複数層で構成し、表面から順に不純物濃度を低下させることにより、Ｐ−Ｎ接合部分の濃度勾配を小さくして少数キャリアの注入を抑制することにより高速回復を実現している。さらに、本発明の高速回復ダイオードでは、高不純物濃度のＮ＋基板１０１と低不純物濃度のＮ−層１０３との間に、その間の不純物濃度となるＮ型層１０２を設けることにより、空乏層の領域が狭くなりソフトリカバリー化を実現するために十分な電荷を供給することができる。また、Ｎ型層１０２を設けることにより、実動作電流帯となる比較的低電流な帯域でも、十分な電荷を供給することができ、Ｐ−Ｎ接合部分でのキャリアの再結合が進み電流密度が増加して順方向電圧を低下させることができる。
In the diode having such a configuration, the P-type layer is composed of two or more layers, and the impurity concentration is decreased in order from the surface, thereby reducing the concentration gradient of the PN junction and suppressing the injection of minority carriers. To achieve high-speed recovery. Moreover, the fast recovery diode according to the present invention, the N + substrate 101 of high impurity concentration low impurity concentration the N - between the
以下、図２〜図３を用いて、本発明の高速回復ダイオードの特性を説明する。 Hereinafter, the characteristics of the fast recovery diode of the present invention will be described with reference to FIGS.
図２は濃度プロファイルを示す図、図３は電流量に対する順方向電圧の関係を示す図である。 FIG. 2 is a diagram showing a concentration profile, and FIG. 3 is a diagram showing a relationship of a forward voltage with respect to a current amount.
図２は図１，図５のＡ−Ａ’におけるＰＮ接合部の濃度プロファイルを示しており、図２（ａ）は本発明の高速回復ダイオードの濃度プロファイルを、図２（ｂ）は従来の高速回復ダイオードの濃度プロファイルを示す。図２において、横軸に示した断面上の位置に対するキャリア濃度Ｃを縦軸に示している。 FIG. 2 shows the concentration profile of the PN junction at AA ′ in FIGS. 1 and 5, FIG. 2 (a) shows the concentration profile of the fast recovery diode of the present invention, and FIG. 2 (b) shows the conventional concentration profile. The concentration profile of a fast recovery diode is shown. In FIG. 2, the vertical axis indicates the carrier concentration C with respect to the position on the cross section indicated on the horizontal axis.
高速回復ダイオードにおいては、ＰＮ接合のドリフト領域での不純物添加領域の形状と不純物の濃度分布によってダイオードの逆回復特性が決定される。図２（ｂ）に示すような従来の高速回復ダイオードにおけるＰＮ接合部からＮ−層１０３にわたるキャリア濃度プロファイルに比べて、図２（ａ）に示すように本発明の高速回復ダイオードでは、Ｎ型層１０２からＮ−層１０３にかけてキャリア濃度が徐々に低下している。このように、本発明の高速回復ダイオードでは、Ｎ＋基板１０１上にＮ型層１０２を接続し、キャリア濃度に勾配を持たせることで空乏層が広がる領域を減少することができ、ソフトリカバリー化実現のため十分な電荷を供給させることができる。ここで、Ｎ型層１０２の不純物添加量は空乏層がＮ型層１０２−Ｎ＋基板１０１接続領域まで広がらないような不純物添加量にする必要がある。 In the fast recovery diode, the reverse recovery characteristic of the diode is determined by the shape of the impurity added region and the impurity concentration distribution in the drift region of the PN junction. Compared to the carrier concentration profile from the PN junction to the N − layer 103 in the conventional fast recovery diode as shown in FIG. 2B, the fast recovery diode of the present invention has an N-type as shown in FIG. The carrier concentration gradually decreases from the layer 102 to the N − layer 103. Thus, in the fast recovery diode of the present invention, the region where the depletion layer spreads can be reduced by connecting the N-type layer 102 on the N + substrate 101 and providing a gradient in the carrier concentration, thereby realizing soft recovery. A sufficient charge can be supplied for realization. Here, the impurity addition amount of the N-type layer 102 needs to be such an impurity addition amount that the depletion layer does not extend to the connection region of the N-type layer 102 -N + substrate 101.
また、ｐ−ｎ接合型ダイオードの順方向Ｉ−Ｖ特性は図３に示すように理想領域、実動作領域である高注入領域と、直列抵抗（ＲＳ）領域に分割でき、従来の高速回復ダイオードでは高注入領域の順方向電圧を低減することができなかった。本発明では、Ｎ＋基板１０１上にＮ型層１０２を接続することで、実動作電流帯となる比較的低電流な帯域でも、十分な電荷を蓄積することができるため、電流密度が増加して順方向電圧を低下させることができる。 Further, the forward IV characteristics of the pn junction diode can be divided into an ideal region, a high injection region which is an actual operation region, and a series resistance (RS) region as shown in FIG. However, the forward voltage in the high implantation region could not be reduced. In the present invention, by connecting the N-type layer 102 on the N + substrate 101, sufficient electric charge can be accumulated even in a relatively low current band that is an actual operating current band, so that the current density increases. Thus, the forward voltage can be reduced.
以上のように、Ｎ＋基板１０１とＮ−層１０３との間にＮ型層１０２を設けることで、高速回復を維持しながら、ソフトリーリカバーとあらゆる帯域での順方向電圧の低下を実現でき、高速回復ダイオードの低消費電力化を実現することができる。 As described above, by providing the N-type layer 102 between the N + substrate 101 and the N − layer 103, it is possible to realize soft recovery and reduction of the forward voltage in all bands while maintaining high-speed recovery. Thus, low power consumption of the fast recovery diode can be realized.
本発明は、高速回復化と共に、さらなる低順方向電圧化とソフトリカバリー化を実現することができる高速回復ダイオード等に有用である。 INDUSTRIAL APPLICABILITY The present invention is useful for a high-speed recovery diode or the like that can realize further lower forward voltage and soft recovery along with high-speed recovery.
１ スパイク
２ グラフ
３ グラフ
１０ Ｐ型層
１１ Ｎ−層
１２ Ｎ＋基板
１３ Ｐ＋層
１４ Ｐ−層
１５ アノード電極
１６ カソード電極
１００ 高速回復ダイオード
１０１ Ｎ＋基板
１０２ Ｎ型層
１０３ Ｎ−層
１０４ Ｐ−層
１０５ Ｐ＋層
１０６ カソード電極
１０７ アノード電極
1 spike 2 graph 3 graph 10 P-type layer 11 N - layer 12 N + substrate 13 P + layer 14 P - layer 15 anode electrode 16 cathode electrode 100 fast recovery diode 101 N + substrate 102 N-type layer 103 N - layer 104 P - layer 105 P + layer 106 a cathode electrode 107 anode electrode
Claims (1)
前記第１導電型半導体基板上に形成される第１の第１導電型半導体層と、
前記第１の第１導電型半導体層上に形成される第２の第１導電型半導体層と、
前記第２の第１導電型半導体層の前記第１の第１導電型半導体層との接続面に対する反対面である表面に互いに離間して形成される複数の第２導電型半導体層と
を有し、前記第２導電型半導体層が前記表面側に近い層の不純物濃度がより高くなる複数の層からなり、前記１の第１導電型半導体層の不純物濃度が前記第１導電型半導体基板の不純物濃度より小さく、前記第２の第１導電型半導体層の不純物濃度が前記１の第１導電型半導体層の不純物濃度より小さいことを特徴とする高速回復ダイオード。A first conductivity type semiconductor substrate;
A first first conductivity type semiconductor layer formed on the first conductivity type semiconductor substrate;
A second first conductivity type semiconductor layer formed on the first first conductivity type semiconductor layer;
A plurality of second conductivity type semiconductor layers formed on the surface of the second first conductivity type semiconductor layer opposite to the connection surface with the first first conductivity type semiconductor layer and spaced apart from each other; The second conductivity type semiconductor layer is composed of a plurality of layers in which the impurity concentration of the layer close to the surface side is higher, and the impurity concentration of the first first conductivity type semiconductor layer is higher than that of the first conductivity type semiconductor substrate. A fast recovery diode, wherein the impurity concentration is lower than the impurity concentration, and the impurity concentration of the second first conductivity type semiconductor layer is lower than the impurity concentration of the first first conductivity type semiconductor layer.
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| CN102832121B (en) * | 2011-06-17 | 2015-04-01 | 中国科学院微电子研究所 | fast recovery diode manufacturing method |
| KR101238232B1 (en) | 2011-09-14 | 2013-03-04 | 주식회사 시지트로닉스 | Structure and fabrication method of mhj-frd |
| CN102637727B (en) * | 2012-05-03 | 2016-01-20 | 杭州士兰集成电路有限公司 | A kind of diode and manufacture method thereof improving recovery softness characteristic |
| CN102820323B (en) * | 2012-09-07 | 2014-11-05 | 温州大学 | Nanometer silicon carbide/crystal silicon carbide double graded junction fast recovery diode and preparation method thereof |
| CN103579367B (en) * | 2013-11-08 | 2016-09-21 | 国家电网公司 | The fast recovery diode chip of a kind of low concentration doping launch site and manufacture method thereof |
| JP2016174041A (en) | 2015-03-16 | 2016-09-29 | 株式会社東芝 | Semiconductor device |
| CN106298512B (en) * | 2016-09-22 | 2024-05-14 | 全球能源互联网研究院 | Fast recovery diode and preparation method thereof |
| CN108054197B (en) * | 2017-12-12 | 2020-12-22 | 超仪科技股份有限公司 | Fast recovery Pin diode and manufacturing method thereof |
| DE102021000609A1 (en) | 2021-02-08 | 2022-08-11 | 3-5 Power Electronics GmbH | Stacked III-V semiconductor diode |
| DE102021000610A1 (en) * | 2021-02-08 | 2022-08-11 | 3-5 Power Electronics GmbH | Stacked III-V semiconductor diode |
| DE102021000611A1 (en) | 2021-02-08 | 2022-08-11 | 3-5 Power Electronics GmbH | Stacked III-V semiconductor diode |
| CN116487445B (en) * | 2023-06-19 | 2023-09-29 | 西安电子科技大学 | Silicon carbide power device with P+ gradual change ring surrounded by N-region and preparation method thereof |
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