JPS6471136A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6471136A JPS6471136A JP62228823A JP22882387A JPS6471136A JP S6471136 A JPS6471136 A JP S6471136A JP 62228823 A JP62228823 A JP 62228823A JP 22882387 A JP22882387 A JP 22882387A JP S6471136 A JPS6471136 A JP S6471136A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- chip
- solder material
- semiconductor device
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Die Bonding (AREA)
Abstract
PURPOSE:To obtain a semiconductor device, thermal and electrical connection between a semiconductor chip and an electrode substrate of which are stabilized, by joining the planar type Si semiconductor chip and an electrode metal composed of Al or an Al alloy through an Al-Si solder material. CONSTITUTION:An Al-Si solder material 12 is annexed onto the underside of an Si semiconductor chip 4 through a vacuum deposition method. An electrode substrate 1 is heated previously at 400 deg.C in an H2 atmosphere, and an oxide film on the surface is reduced and removed beforehand. The substrate 1 is heated at 590+ or -10 deg.C in the mixed atmosphere of H2 and N2, the chip 4 to which the solder material 12 is affixed is placed to the upper section of the substrate 1, and the solder material 12 is melted, thus joining and fixing the substrate 1 and the chip 4. Accordingly, a semiconductor device, thermal and electrical connection between the chip 4 and the substrate 1 of which are stabilized, is acquired.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62228823A JPS6471136A (en) | 1987-09-10 | 1987-09-10 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62228823A JPS6471136A (en) | 1987-09-10 | 1987-09-10 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6471136A true JPS6471136A (en) | 1989-03-16 |
Family
ID=16882418
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62228823A Pending JPS6471136A (en) | 1987-09-10 | 1987-09-10 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6471136A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0606522A3 (en) * | 1993-01-12 | 1996-04-10 | Mitsubishi Electric Corp | Semiconductor device and methods for producing and mounting the semiconductor device. |
JP2008041707A (en) * | 2006-08-01 | 2008-02-21 | Nissan Motor Co Ltd | Semiconductor device and manufacturing method therefor |
US9214617B2 (en) | 2006-03-08 | 2015-12-15 | Kabushiki Kaisha Toshiba | Electronic component module |
-
1987
- 1987-09-10 JP JP62228823A patent/JPS6471136A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0606522A3 (en) * | 1993-01-12 | 1996-04-10 | Mitsubishi Electric Corp | Semiconductor device and methods for producing and mounting the semiconductor device. |
EP0817254A2 (en) * | 1993-01-12 | 1998-01-07 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and methods for producing and mounting the semiconductor device |
EP0817254A3 (en) * | 1993-01-12 | 1998-01-21 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and methods for producing and mounting the semiconductor device |
US9214617B2 (en) | 2006-03-08 | 2015-12-15 | Kabushiki Kaisha Toshiba | Electronic component module |
JP2008041707A (en) * | 2006-08-01 | 2008-02-21 | Nissan Motor Co Ltd | Semiconductor device and manufacturing method therefor |
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