JPS6471136A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6471136A
JPS6471136A JP62228823A JP22882387A JPS6471136A JP S6471136 A JPS6471136 A JP S6471136A JP 62228823 A JP62228823 A JP 62228823A JP 22882387 A JP22882387 A JP 22882387A JP S6471136 A JPS6471136 A JP S6471136A
Authority
JP
Japan
Prior art keywords
substrate
chip
solder material
semiconductor device
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62228823A
Other languages
Japanese (ja)
Inventor
Noboru Terao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62228823A priority Critical patent/JPS6471136A/en
Publication of JPS6471136A publication Critical patent/JPS6471136A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Die Bonding (AREA)

Abstract

PURPOSE:To obtain a semiconductor device, thermal and electrical connection between a semiconductor chip and an electrode substrate of which are stabilized, by joining the planar type Si semiconductor chip and an electrode metal composed of Al or an Al alloy through an Al-Si solder material. CONSTITUTION:An Al-Si solder material 12 is annexed onto the underside of an Si semiconductor chip 4 through a vacuum deposition method. An electrode substrate 1 is heated previously at 400 deg.C in an H2 atmosphere, and an oxide film on the surface is reduced and removed beforehand. The substrate 1 is heated at 590+ or -10 deg.C in the mixed atmosphere of H2 and N2, the chip 4 to which the solder material 12 is affixed is placed to the upper section of the substrate 1, and the solder material 12 is melted, thus joining and fixing the substrate 1 and the chip 4. Accordingly, a semiconductor device, thermal and electrical connection between the chip 4 and the substrate 1 of which are stabilized, is acquired.
JP62228823A 1987-09-10 1987-09-10 Semiconductor device Pending JPS6471136A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62228823A JPS6471136A (en) 1987-09-10 1987-09-10 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62228823A JPS6471136A (en) 1987-09-10 1987-09-10 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6471136A true JPS6471136A (en) 1989-03-16

Family

ID=16882418

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62228823A Pending JPS6471136A (en) 1987-09-10 1987-09-10 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6471136A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0606522A3 (en) * 1993-01-12 1996-04-10 Mitsubishi Electric Corp Semiconductor device and methods for producing and mounting the semiconductor device.
JP2008041707A (en) * 2006-08-01 2008-02-21 Nissan Motor Co Ltd Semiconductor device and manufacturing method therefor
US9214617B2 (en) 2006-03-08 2015-12-15 Kabushiki Kaisha Toshiba Electronic component module

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0606522A3 (en) * 1993-01-12 1996-04-10 Mitsubishi Electric Corp Semiconductor device and methods for producing and mounting the semiconductor device.
EP0817254A2 (en) * 1993-01-12 1998-01-07 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and methods for producing and mounting the semiconductor device
EP0817254A3 (en) * 1993-01-12 1998-01-21 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and methods for producing and mounting the semiconductor device
US9214617B2 (en) 2006-03-08 2015-12-15 Kabushiki Kaisha Toshiba Electronic component module
JP2008041707A (en) * 2006-08-01 2008-02-21 Nissan Motor Co Ltd Semiconductor device and manufacturing method therefor

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