JPS6470880A - Digital image processor - Google Patents

Digital image processor

Info

Publication number
JPS6470880A
JPS6470880A JP22810087A JP22810087A JPS6470880A JP S6470880 A JPS6470880 A JP S6470880A JP 22810087 A JP22810087 A JP 22810087A JP 22810087 A JP22810087 A JP 22810087A JP S6470880 A JPS6470880 A JP S6470880A
Authority
JP
Japan
Prior art keywords
circuit
image
binary image
processing
many
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22810087A
Other languages
Japanese (ja)
Inventor
Yasuo Masaki
Kimitoshi Hori
Hiroshi Uchino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Minolta Co Ltd
Original Assignee
Minolta Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Minolta Co Ltd filed Critical Minolta Co Ltd
Priority to JP22810087A priority Critical patent/JPS6470880A/en
Publication of JPS6470880A publication Critical patent/JPS6470880A/en
Priority to US07/726,169 priority patent/US5157739A/en
Pending legal-status Critical Current

Links

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  • Processing Or Creating Images (AREA)

Abstract

PURPOSE:To improve processing capacity by connecting a data bus for transferring a binary image, outputting the binary image formed by the 1st processing circuit to the data bus and using the data bus for switching the processing function of the 2nd processing circuit. CONSTITUTION:An image input circuit 2 and an image output circuit 3 are connected to a data bus B1 to be usually used for many-valued images to input/ output many-valued image data between these circuits 2, 3 and an external circuit under control based upon a host CPU 1 to be a control means. The many-valued image on the bus B1 is stored in a many-valued image memory M1 or processed by the 1st many-valued image processing circuit P1. At the time of forming a binary image as the processed result of the circuit P1, the image is outputted to a binary image data bus B2, stored in a binary image memory M2 or processed by a 2nd binary image processing circuit P2. In this case, the binary image on the bus B2 is used as a binary image for switching the processing function of the circuit P2 and the circuit P2 is directly controlled by the binary image formed by the circuit P1 to execute parallel processing, so that the processing capacity can be improved.
JP22810087A 1987-09-10 1987-09-10 Digital image processor Pending JPS6470880A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP22810087A JPS6470880A (en) 1987-09-10 1987-09-10 Digital image processor
US07/726,169 US5157739A (en) 1987-09-10 1991-07-02 Digital image processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22810087A JPS6470880A (en) 1987-09-10 1987-09-10 Digital image processor

Publications (1)

Publication Number Publication Date
JPS6470880A true JPS6470880A (en) 1989-03-16

Family

ID=16871193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22810087A Pending JPS6470880A (en) 1987-09-10 1987-09-10 Digital image processor

Country Status (1)

Country Link
JP (1) JPS6470880A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1754809A2 (en) 2000-03-03 2007-02-21 Schott AG Large volume oriented single crystals with a homogeneous refractive index and low stress related birefringence
US7206869B2 (en) 1999-01-25 2007-04-17 Canon Kabushiki Kaisha Input/output control apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7206869B2 (en) 1999-01-25 2007-04-17 Canon Kabushiki Kaisha Input/output control apparatus
EP1754809A2 (en) 2000-03-03 2007-02-21 Schott AG Large volume oriented single crystals with a homogeneous refractive index and low stress related birefringence

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