JPS6450120A - Register file - Google Patents

Register file

Info

Publication number
JPS6450120A
JPS6450120A JP62206176A JP20617687A JPS6450120A JP S6450120 A JPS6450120 A JP S6450120A JP 62206176 A JP62206176 A JP 62206176A JP 20617687 A JP20617687 A JP 20617687A JP S6450120 A JPS6450120 A JP S6450120A
Authority
JP
Japan
Prior art keywords
address
circuit group
write
adder
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62206176A
Other languages
Japanese (ja)
Inventor
Yasuhiro Nakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62206176A priority Critical patent/JPS6450120A/en
Publication of JPS6450120A publication Critical patent/JPS6450120A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To decrease the hardware quantity, and also, to prevent the increase of a set-up time of a write address, by providing an address use sub-latching circuit and an address use main latching circuit having an address selector function. CONSTITUTION:In a register file which is stored temporarily a write address in an address use main latching circuit group 3, so that a data is written to a store position corresponding to this stored address, an address use sub-latching circuit group 12 is provided. In the circuit group 12, an output address of the circuit group 3 is stored, and to an output of the circuit group 3, '1' is added through an adder 11, and in response to a reset command signal, an input of the circuit group 3 is switched to an output of the adder 11 from the write address through a selector group 9, and in accordance with a reset instruction signal, the write data is supplied as '0'. In such a way, a value of the circuit group 3 is counted up through the circuit group 12 and the adder 11, whenever a reset signal is inputted, therefore, the hardware quantity is decreased and the increase of a set-up time of a write address can also be reduced.
JP62206176A 1987-08-19 1987-08-19 Register file Pending JPS6450120A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62206176A JPS6450120A (en) 1987-08-19 1987-08-19 Register file

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62206176A JPS6450120A (en) 1987-08-19 1987-08-19 Register file

Publications (1)

Publication Number Publication Date
JPS6450120A true JPS6450120A (en) 1989-02-27

Family

ID=16519069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62206176A Pending JPS6450120A (en) 1987-08-19 1987-08-19 Register file

Country Status (1)

Country Link
JP (1) JPS6450120A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5503787A (en) * 1993-03-11 1996-04-02 Hitachi, Ltd. Method for manufacturing multilayer ceramic substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5503787A (en) * 1993-03-11 1996-04-02 Hitachi, Ltd. Method for manufacturing multilayer ceramic substrate

Similar Documents

Publication Publication Date Title
JPS5345120A (en) Video special effect device
ES8405176A1 (en) Register control processing system.
ATE55528T1 (en) VIDEO SIGNAL PROCESSING CIRCUITS.
JPS54147738A (en) Data processing system
JPS6450120A (en) Register file
JPS55119747A (en) Microprogram control unit
JPS55105760A (en) Memory control unit
JPS5510620A (en) Output change-over circuit
JPS5552137A (en) Character output system
JPS5533282A (en) Buffer control system
JPS6453240A (en) Evaluating microprocessor
JPS5785148A (en) Instruction sequence control device
TW259868B (en) Delay circuit
JPS5733472A (en) Memory access control system
JPS5748127A (en) Data processor
JPS5577069A (en) Data memory system
JPS5614358A (en) Operation log storing system
KR0164769B1 (en) System program execution method
JPS57199055A (en) Information processing device
JPS5599652A (en) Microprogram control unit
JPS5781660A (en) Storage device executing parallel operation
JPS5727328A (en) Control device
JPS5730020A (en) Memory address controlling system
JPS5719856A (en) Memory control system
JPS5574603A (en) Sequence controller