JPS55105760A - Memory control unit - Google Patents
Memory control unitInfo
- Publication number
- JPS55105760A JPS55105760A JP1369779A JP1369779A JPS55105760A JP S55105760 A JPS55105760 A JP S55105760A JP 1369779 A JP1369779 A JP 1369779A JP 1369779 A JP1369779 A JP 1369779A JP S55105760 A JPS55105760 A JP S55105760A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- address
- control unit
- decoder
- memory control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To extend the memory capacity, by using a plurality of memories in the one memory address area, by commonly using a given memory address area to a plurality of memories.
CONSTITUTION: The decoder 2 outputs the address of the register 4 from the address bus AB, and the figure selecting the memory Mi outputted at the data bus DB is written in the register 4. On the other hand, the decoder 1 detects the address in the memory address area commonly used with the memory group M1WMn and outputs it to the decoder 3.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1369779A JPS55105760A (en) | 1979-02-07 | 1979-02-07 | Memory control unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1369779A JPS55105760A (en) | 1979-02-07 | 1979-02-07 | Memory control unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55105760A true JPS55105760A (en) | 1980-08-13 |
Family
ID=11840379
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1369779A Pending JPS55105760A (en) | 1979-02-07 | 1979-02-07 | Memory control unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55105760A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55164955A (en) * | 1979-05-09 | 1980-12-23 | Nec Corp | Information processor |
JPS5960663A (en) * | 1982-09-30 | 1984-04-06 | Fujitsu Ltd | Expansion system of address of microprocessor |
JPS59208663A (en) * | 1983-05-12 | 1984-11-27 | Konami Kogyo Kk | Method and apparatus for expanding number of addresses of read-only memory |
JPS59208662A (en) * | 1983-05-12 | 1984-11-27 | Konami Kogyo Kk | Circuit expanding number of addresses of read-only memory |
JPS6052540U (en) * | 1983-09-14 | 1985-04-13 | 株式会社ピ−エフユ− | Address decode circuit |
JPS60169954A (en) * | 1984-02-15 | 1985-09-03 | Fuji Electric Co Ltd | Memory access system |
JPS60205644A (en) * | 1984-03-29 | 1985-10-17 | Ascii Corp | Memory address extension system |
-
1979
- 1979-02-07 JP JP1369779A patent/JPS55105760A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55164955A (en) * | 1979-05-09 | 1980-12-23 | Nec Corp | Information processor |
JPS5960663A (en) * | 1982-09-30 | 1984-04-06 | Fujitsu Ltd | Expansion system of address of microprocessor |
JPS59208663A (en) * | 1983-05-12 | 1984-11-27 | Konami Kogyo Kk | Method and apparatus for expanding number of addresses of read-only memory |
JPS59208662A (en) * | 1983-05-12 | 1984-11-27 | Konami Kogyo Kk | Circuit expanding number of addresses of read-only memory |
JPS6052540U (en) * | 1983-09-14 | 1985-04-13 | 株式会社ピ−エフユ− | Address decode circuit |
JPS60169954A (en) * | 1984-02-15 | 1985-09-03 | Fuji Electric Co Ltd | Memory access system |
JPS60205644A (en) * | 1984-03-29 | 1985-10-17 | Ascii Corp | Memory address extension system |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS56116147A (en) | Digital semiconductor integrated circuit and digital control system using it | |
JPS5652454A (en) | Input/output control method of variable word length memory | |
JPS55105760A (en) | Memory control unit | |
JPS55134442A (en) | Data transfer unit | |
JPS5591030A (en) | Address extending system of microprocessor | |
JPS5326632A (en) | Common memory control unit | |
JPS5544613A (en) | Memory device | |
JPS5563422A (en) | Data transfer system | |
JPS5393735A (en) | Memory control system | |
JPS5436144A (en) | Address conversion unit | |
JPS5421231A (en) | Data input system | |
JPS54145440A (en) | Memory control system | |
JPS5458316A (en) | Control memory unit | |
JPS55105761A (en) | Address conversion system | |
JPS54145455A (en) | Trap control system | |
JPS5378745A (en) | Composing system of control memory | |
JPS5365022A (en) | Buffer memory control system | |
JPS5335439A (en) | Store control system | |
JPS52101935A (en) | Data transmission method | |
JPS5439541A (en) | Data processor | |
JPS55112661A (en) | Memory control unit | |
JPS5528101A (en) | Constitution control system of main memory | |
JPS55157047A (en) | Information processor | |
JPS5682928A (en) | Data processor | |
JPS5430734A (en) | Display unit |