JPS6448413A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS6448413A
JPS6448413A JP20398387A JP20398387A JPS6448413A JP S6448413 A JPS6448413 A JP S6448413A JP 20398387 A JP20398387 A JP 20398387A JP 20398387 A JP20398387 A JP 20398387A JP S6448413 A JPS6448413 A JP S6448413A
Authority
JP
Japan
Prior art keywords
silicon layer
polycrystalline silicon
substrate
whole surface
charges
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20398387A
Other languages
Japanese (ja)
Inventor
Tsunenori Yamauchi
Hiroyuki Fukuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20398387A priority Critical patent/JPS6448413A/en
Publication of JPS6448413A publication Critical patent/JPS6448413A/en
Pending legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the generation of breakdown by charges resulting from ion implantation by selectively implanting ions into a partial region in a polycrystalline silicon layer widely formed onto the whole surface of a substrate. CONSTITUTION:An insulating film 2 is shaped onto an silicon substrate 1 to which an element is formed, and a polycrystalline silicon layer 4 is shaped onto the insulating film 2. Impurity ions are implanted selectively to the polycrystalline silicon layer 4 in a resistance region, and the polycrystalline silicon layer 4 is removed from a section except the resistance region and a resistor composed of the polycrystalline silicon layer containing an impurity is formed. Consequently, charges are injected only into a resistance formation predetermined region, and the charges spread on the whole surface of the polycrystalline silicon layer covering the whole surface of the substrate. Accordingly, the potential of the polycrystalline silicon layer hardly rises, thus preventing the possibility of breakdown.
JP20398387A 1987-08-19 1987-08-19 Semiconductor device and manufacture thereof Pending JPS6448413A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20398387A JPS6448413A (en) 1987-08-19 1987-08-19 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20398387A JPS6448413A (en) 1987-08-19 1987-08-19 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS6448413A true JPS6448413A (en) 1989-02-22

Family

ID=16482851

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20398387A Pending JPS6448413A (en) 1987-08-19 1987-08-19 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS6448413A (en)

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