JPS6437649A - Input/output control system - Google Patents
Input/output control systemInfo
- Publication number
- JPS6437649A JPS6437649A JP19368887A JP19368887A JPS6437649A JP S6437649 A JPS6437649 A JP S6437649A JP 19368887 A JP19368887 A JP 19368887A JP 19368887 A JP19368887 A JP 19368887A JP S6437649 A JPS6437649 A JP S6437649A
- Authority
- JP
- Japan
- Prior art keywords
- processor
- biu1
- mpu1
- cpu
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE:To make processing efficient by constituting the titled system so that interruption processing based upon an I/O processor is not executed at the time of generating a status input instruction. CONSTITUTION:A central processing unit (CPU) 101 has an arithmetic processor 103 and a bus control unit (BIU0) 104 is connected to a bus 110 through the BIU0 104. On the other hand, an I/O processor (IOP) 102 has an I/O processor (MPU1) 106, a bus control unit (BIU1) 105 and a local memory (LM) 107 and is connected to the bus 110 through the BIU1 105 and connected to an I/O device 108 through the MPU1 106. When the CPU 101 executes a status input instruction to the IOP 102, the BIU1 105 reads out status information stored in a previously determined address in the LM 107 without generating an interruption to the MPU1 106 and transfers the concerned status information to the CPU 101.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19368887A JPH0682348B2 (en) | 1987-08-04 | 1987-08-04 | I / O control method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19368887A JPH0682348B2 (en) | 1987-08-04 | 1987-08-04 | I / O control method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6437649A true JPS6437649A (en) | 1989-02-08 |
JPH0682348B2 JPH0682348B2 (en) | 1994-10-19 |
Family
ID=16312127
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19368887A Expired - Lifetime JPH0682348B2 (en) | 1987-08-04 | 1987-08-04 | I / O control method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0682348B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0441928U (en) * | 1990-07-20 | 1992-04-09 |
-
1987
- 1987-08-04 JP JP19368887A patent/JPH0682348B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0441928U (en) * | 1990-07-20 | 1992-04-09 |
Also Published As
Publication number | Publication date |
---|---|
JPH0682348B2 (en) | 1994-10-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5326539A (en) | Data exchenge system | |
JPS57182257A (en) | Data interchange system of data processing system | |
JPS6437649A (en) | Input/output control system | |
JPS57141756A (en) | Program processor | |
JPS5362946A (en) | Data processor | |
JPS5495133A (en) | Input/output processing control system | |
JPS5336439A (en) | Information processor | |
JPS57168367A (en) | Handshake method of master central processing unit and slave central processing unit | |
JPS5727322A (en) | Input and output controlling system of computer | |
JPS57139833A (en) | Interruption controlling circuit | |
JPS5654509A (en) | Sequence controller | |
JPS5518720A (en) | Multiple computer system | |
JPS5563423A (en) | Data transfer system | |
JPS6417129A (en) | Control system for input/output interruption of virtual computer | |
JPS6414655A (en) | Data transfer device | |
JPS57182248A (en) | Arithmetic processor | |
JPS57197653A (en) | Control device of microprogram | |
JPS5373934A (en) | Data exchange control system | |
EP0369407A3 (en) | Central processing unit for data processor having emulation function | |
JPS57120145A (en) | Input and output controller | |
JPS5663657A (en) | Memory switching system | |
JPS56166533A (en) | Electronic computer | |
JPS57105021A (en) | Input/output device | |
JPS57176461A (en) | Data transfer control system | |
JPS5363825A (en) | Input/output control system in information processing system |