JPS6432652A - Manufacture of wiring board for loading semiconductor element - Google Patents
Manufacture of wiring board for loading semiconductor elementInfo
- Publication number
- JPS6432652A JPS6432652A JP18913187A JP18913187A JPS6432652A JP S6432652 A JPS6432652 A JP S6432652A JP 18913187 A JP18913187 A JP 18913187A JP 18913187 A JP18913187 A JP 18913187A JP S6432652 A JPS6432652 A JP S6432652A
- Authority
- JP
- Japan
- Prior art keywords
- resin layer
- insulating resin
- mold
- semiconductor
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
Abstract
PURPOSE:To obtain a wiring board, from which an insulating resin layer in a semiconductor loading section is removed, by mold-releasing and treating one part of the surface of a metallic plate, forming the insulating resin layer and getting rid of the upper section of mold-release treatment in the insulating resin layer. CONSTITUTION:A semiconductor-element loading section in a metallic plate 1 is mold-released and treated 2, and an insulating resin layer 3 is shaped onto the whole surface of the metallic plate 1. A conductor circuit 4 is formed, and the insulating resin layer 3 in the semiconductor-element loading section is taken off. Mold-release treatment 2 is executed through the applying method of an silicone group or fluorine group mold release agent, etc. A semirigid resin film, resin-impregnated paper, a resin-impregnated glass fabric or a resin- impregnated Kepler's fabric is used as the insulating resin layer 3. Accordingly, a wiring board, from which the insulating resin layer 3 in the semiconductor loading section is removed, is acquired.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18913187A JPS6432652A (en) | 1987-07-29 | 1987-07-29 | Manufacture of wiring board for loading semiconductor element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18913187A JPS6432652A (en) | 1987-07-29 | 1987-07-29 | Manufacture of wiring board for loading semiconductor element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6432652A true JPS6432652A (en) | 1989-02-02 |
Family
ID=16235922
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18913187A Pending JPS6432652A (en) | 1987-07-29 | 1987-07-29 | Manufacture of wiring board for loading semiconductor element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6432652A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04119653A (en) * | 1990-09-11 | 1992-04-21 | Toppan Printing Co Ltd | Integrated circuit element |
JP2007294671A (en) * | 2006-04-25 | 2007-11-08 | Sharp Corp | Element loading method and element loading device |
JP2008047843A (en) * | 2006-07-20 | 2008-02-28 | Sanyo Electric Co Ltd | Circuit device, manufacturing method thereof, wiring board, and manufacturing method thereof |
-
1987
- 1987-07-29 JP JP18913187A patent/JPS6432652A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04119653A (en) * | 1990-09-11 | 1992-04-21 | Toppan Printing Co Ltd | Integrated circuit element |
JP2007294671A (en) * | 2006-04-25 | 2007-11-08 | Sharp Corp | Element loading method and element loading device |
JP2008047843A (en) * | 2006-07-20 | 2008-02-28 | Sanyo Electric Co Ltd | Circuit device, manufacturing method thereof, wiring board, and manufacturing method thereof |
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