JPS6432522A - Power-on reset circuit - Google Patents

Power-on reset circuit

Info

Publication number
JPS6432522A
JPS6432522A JP18850287A JP18850287A JPS6432522A JP S6432522 A JPS6432522 A JP S6432522A JP 18850287 A JP18850287 A JP 18850287A JP 18850287 A JP18850287 A JP 18850287A JP S6432522 A JPS6432522 A JP S6432522A
Authority
JP
Japan
Prior art keywords
potential
channel mos
rises
circuit
reset
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18850287A
Other languages
Japanese (ja)
Inventor
Yasuhiro Miyahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP18850287A priority Critical patent/JPS6432522A/en
Publication of JPS6432522A publication Critical patent/JPS6432522A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To make the size of a power-on reset circuit small by releasing the reset when a potential of a power supply being a minimum potential reaches a specific value in a combination circuit comprising a P-channel MOS transistor(TR) and an N-channel MOS TR. CONSTITUTION:A source of a P-channel MOS TR P1 connects to a highest potential VDD and a drain connects to a gate of an N-channel MOS TR N1 through a connecting point A. A potential VA at a point A is given to a Schmitt trigger circuit 1. Moreover, a back gate of the TR N1 connects to a minimum potential VSS via TRs N2, N3. With the potential VDD and the intermediate ground potential GND given, the potential VSS is energized and raised. Then the threshold voltage of the TR N1 rises and the source and drain of the TR N1 are turned off and the potential VA rises and approaches the potential VDD. The pulse of the output voltage OUT of the circuit 1 rises on the way of the change to release the reset. The circuits are made small in size through the constitution of TRs.
JP18850287A 1987-07-27 1987-07-27 Power-on reset circuit Pending JPS6432522A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18850287A JPS6432522A (en) 1987-07-27 1987-07-27 Power-on reset circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18850287A JPS6432522A (en) 1987-07-27 1987-07-27 Power-on reset circuit

Publications (1)

Publication Number Publication Date
JPS6432522A true JPS6432522A (en) 1989-02-02

Family

ID=16224849

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18850287A Pending JPS6432522A (en) 1987-07-27 1987-07-27 Power-on reset circuit

Country Status (1)

Country Link
JP (1) JPS6432522A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180030583A (en) * 2015-08-10 2018-03-23 후지필름 가부시키가이샤 Laminated film

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6237331B2 (en) * 1977-04-16 1987-08-12 Mtu Muenchen Gmbh

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6237331B2 (en) * 1977-04-16 1987-08-12 Mtu Muenchen Gmbh

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180030583A (en) * 2015-08-10 2018-03-23 후지필름 가부시키가이샤 Laminated film

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