JPS6431251A - Microprocessor - Google Patents

Microprocessor

Info

Publication number
JPS6431251A
JPS6431251A JP62189095A JP18909587A JPS6431251A JP S6431251 A JPS6431251 A JP S6431251A JP 62189095 A JP62189095 A JP 62189095A JP 18909587 A JP18909587 A JP 18909587A JP S6431251 A JPS6431251 A JP S6431251A
Authority
JP
Japan
Prior art keywords
cpu
buses
plural
transfer
switches
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62189095A
Other languages
Japanese (ja)
Inventor
Takashi Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62189095A priority Critical patent/JPS6431251A/en
Publication of JPS6431251A publication Critical patent/JPS6431251A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To transfer data at high speed by dividing a bus so as to divide plural peripheral circuits into plural groups by a control signal from a CPU. CONSTITUTION:The titled processor consists of the CPU 1, the peripheral circuits 3-8, the buses 2a-2c and switches for opening and closing parts between these buses, the bus is divided correspondingly to the three groups 20-22, for instance, and the parts therebetween are connected by the switches 9, 10 controlled by the CPU 1. Namely, the buses 2a-2c are divided into plural to control a connection between the respective buses according to a control mode. Accordingly, at the time of executing a DMA (Direct Memory Access) transfer, in the CPU 1 itself, the parallel execution of a processing routine except the access of a hardware relating to the DMA transfer can be attained. Thereby, the high speed operation can be realized.
JP62189095A 1987-07-28 1987-07-28 Microprocessor Pending JPS6431251A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62189095A JPS6431251A (en) 1987-07-28 1987-07-28 Microprocessor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62189095A JPS6431251A (en) 1987-07-28 1987-07-28 Microprocessor

Publications (1)

Publication Number Publication Date
JPS6431251A true JPS6431251A (en) 1989-02-01

Family

ID=16235257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62189095A Pending JPS6431251A (en) 1987-07-28 1987-07-28 Microprocessor

Country Status (1)

Country Link
JP (1) JPS6431251A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4851272A (en) * 1986-09-15 1989-07-25 Reynolds Metals Company Plastics film laminates
JPH0340162A (en) * 1989-07-07 1991-02-20 Fujitsu Ltd One-chip microcomputer
JPH0348356A (en) * 1989-04-18 1991-03-01 Mitsubishi Electric Corp Bus circuit
US5026610A (en) * 1987-10-20 1991-06-25 Courtaulds Films & Packaging (Holdings) Ltd. Polymeric films
JPH0417050A (en) * 1990-05-10 1992-01-21 Mitsubishi Electric Corp One-chip microcomputer
JPH05108553A (en) * 1991-10-21 1993-04-30 Matsushita Electric Ind Co Ltd Bus coupling device
US6249833B1 (en) 1997-12-22 2001-06-19 Nec Corporation Dual bus processing apparatus wherein second control means request access of first data bus from first control means while occupying second data bus
US6434646B1 (en) 1998-04-07 2002-08-13 Nec Corporation Signal distribution system and method based on bus arrangement

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991736A (en) * 1972-12-31 1974-09-02

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991736A (en) * 1972-12-31 1974-09-02

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4851272A (en) * 1986-09-15 1989-07-25 Reynolds Metals Company Plastics film laminates
US5026610A (en) * 1987-10-20 1991-06-25 Courtaulds Films & Packaging (Holdings) Ltd. Polymeric films
JPH0348356A (en) * 1989-04-18 1991-03-01 Mitsubishi Electric Corp Bus circuit
JPH0340162A (en) * 1989-07-07 1991-02-20 Fujitsu Ltd One-chip microcomputer
JPH0417050A (en) * 1990-05-10 1992-01-21 Mitsubishi Electric Corp One-chip microcomputer
JPH05108553A (en) * 1991-10-21 1993-04-30 Matsushita Electric Ind Co Ltd Bus coupling device
US6249833B1 (en) 1997-12-22 2001-06-19 Nec Corporation Dual bus processing apparatus wherein second control means request access of first data bus from first control means while occupying second data bus
US6434646B1 (en) 1998-04-07 2002-08-13 Nec Corporation Signal distribution system and method based on bus arrangement

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